1 /*
2 * Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "c1/c1_CodeStubs.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_MacroAssembler.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "nativeInst_arm.hpp"
33 #include "runtime/sharedRuntime.hpp"
34 #include "utilities/macros.hpp"
35 #include "vmreg_arm.inline.hpp"
36
37 #define __ ce->masm()->
38
39 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
40 __ bind(_entry);
41 ce->store_parameter(_bci, 0);
42 ce->store_parameter(_method->as_constant_ptr()->as_metadata(), 1);
43 __ call(Runtime1::entry_for(Runtime1::counter_overflow_id), relocInfo::runtime_call_type);
44 ce->add_call_info_here(_info);
45 ce->verify_oop_map(_info);
46
47 __ b(_continuation);
48 }
49
50
51 // TODO: ARM - is it possible to inline these stubs into the main code stream?
52
53
54 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index, LIR_Opr array)
55 : _throw_index_out_of_bounds_exception(false), _index(index), _array(array) {
56 assert(info != NULL, "must have info");
57 _info = new CodeEmitInfo(info);
58 }
59
60 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index)
61 : _throw_index_out_of_bounds_exception(true), _index(index), _array(NULL) {
62 assert(info != NULL, "must have info");
63 _info = new CodeEmitInfo(info);
64 }
65
66 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
67 __ bind(_entry);
68
69 if (_info->deoptimize_on_exception()) {
70 #ifdef AARCH64
71 __ NOT_TESTED();
72 #endif
73 __ call(Runtime1::entry_for(Runtime1::predicate_failed_trap_id), relocInfo::runtime_call_type);
74 ce->add_call_info_here(_info);
75 ce->verify_oop_map(_info);
76 debug_only(__ should_not_reach_here());
77 return;
78 }
79 // Pass the array index on stack because all registers must be preserved
80 ce->verify_reserved_argument_area_size(_throw_index_out_of_bounds_exception ? 1 : 2);
81 if (_index->is_cpu_register()) {
82 __ str_32(_index->as_register(), Address(SP));
83 } else {
84 __ mov_slow(Rtemp, _index->as_jint()); // Rtemp should be OK in C1
85 __ str_32(Rtemp, Address(SP));
86 }
87
88 if (_throw_index_out_of_bounds_exception) {
89 #ifdef AARCH64
90 __ NOT_TESTED();
91 #endif
92 __ call(Runtime1::entry_for(Runtime1::throw_index_exception_id), relocInfo::runtime_call_type);
93 } else {
94 __ str(_array->as_pointer_register(), Address(SP, BytesPerWord)); // ??? Correct offset? Correct instruction?
95 __ call(Runtime1::entry_for(Runtime1::throw_range_check_failed_id), relocInfo::runtime_call_type);
96 }
97 ce->add_call_info_here(_info);
98 ce->verify_oop_map(_info);
99 DEBUG_ONLY(STOP("RangeCheck");)
100 }
101
102 PredicateFailedStub::PredicateFailedStub(CodeEmitInfo* info) {
103 _info = new CodeEmitInfo(info);
104 }
105
106 void PredicateFailedStub::emit_code(LIR_Assembler* ce) {
107 __ bind(_entry);
108 __ call(Runtime1::entry_for(Runtime1::predicate_failed_trap_id), relocInfo::runtime_call_type);
109 ce->add_call_info_here(_info);
110 ce->verify_oop_map(_info);
111 debug_only(__ should_not_reach_here());
112 }
113
114 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
115 if (_offset != -1) {
116 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
117 }
118 __ bind(_entry);
119 __ call(Runtime1::entry_for(Runtime1::throw_div0_exception_id),
120 relocInfo::runtime_call_type);
121 ce->add_call_info_here(_info);
122 DEBUG_ONLY(STOP("DivByZero");)
123 }
124
125
126 // Implementation of NewInstanceStub
127
128 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
129 _result = result;
130 _klass = klass;
131 _klass_reg = klass_reg;
132 _info = new CodeEmitInfo(info);
133 assert(stub_id == Runtime1::new_instance_id ||
134 stub_id == Runtime1::fast_new_instance_id ||
135 stub_id == Runtime1::fast_new_instance_init_check_id,
136 "need new_instance id");
137 _stub_id = stub_id;
138 }
139
140
141 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
142 assert(_result->as_register() == R0, "runtime call setup");
143 assert(_klass_reg->as_register() == R1, "runtime call setup");
144 __ bind(_entry);
145 __ call(Runtime1::entry_for(_stub_id), relocInfo::runtime_call_type);
146 ce->add_call_info_here(_info);
147 ce->verify_oop_map(_info);
148 __ b(_continuation);
149 }
150
151
152 // Implementation of NewTypeArrayStub
153
154 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
155 _klass_reg = klass_reg;
156 _length = length;
157 _result = result;
158 _info = new CodeEmitInfo(info);
159 }
160
161
162 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
163 assert(_result->as_register() == R0, "runtime call setup");
164 assert(_klass_reg->as_register() == R1, "runtime call setup");
165 assert(_length->as_register() == R2, "runtime call setup");
166 __ bind(_entry);
167 __ call(Runtime1::entry_for(Runtime1::new_type_array_id), relocInfo::runtime_call_type);
168 ce->add_call_info_here(_info);
169 ce->verify_oop_map(_info);
170 __ b(_continuation);
171 }
172
173
174 // Implementation of NewObjectArrayStub
175
176 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
177 _klass_reg = klass_reg;
178 _result = result;
179 _length = length;
180 _info = new CodeEmitInfo(info);
181 }
182
183
184 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
185 assert(_result->as_register() == R0, "runtime call setup");
186 assert(_klass_reg->as_register() == R1, "runtime call setup");
187 assert(_length->as_register() == R2, "runtime call setup");
188 __ bind(_entry);
189 __ call(Runtime1::entry_for(Runtime1::new_object_array_id), relocInfo::runtime_call_type);
190 ce->add_call_info_here(_info);
191 ce->verify_oop_map(_info);
192 __ b(_continuation);
193 }
194
195
196 // Implementation of MonitorAccessStubs
197
198 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
199 : MonitorAccessStub(obj_reg, lock_reg)
200 {
201 _info = new CodeEmitInfo(info);
202 }
203
204
205 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
206 __ bind(_entry);
207 const Register obj_reg = _obj_reg->as_pointer_register();
208 const Register lock_reg = _lock_reg->as_pointer_register();
209
210 ce->verify_reserved_argument_area_size(2);
211 #ifdef AARCH64
212 __ stp(obj_reg, lock_reg, Address(SP));
213 #else
214 if (obj_reg < lock_reg) {
215 __ stmia(SP, RegisterSet(obj_reg) | RegisterSet(lock_reg));
216 } else {
217 __ str(obj_reg, Address(SP));
218 __ str(lock_reg, Address(SP, BytesPerWord));
219 }
220 #endif // AARCH64
221
222 Runtime1::StubID enter_id = ce->compilation()->has_fpu_code() ?
223 Runtime1::monitorenter_id :
224 Runtime1::monitorenter_nofpu_id;
225 __ call(Runtime1::entry_for(enter_id), relocInfo::runtime_call_type);
226 ce->add_call_info_here(_info);
227 ce->verify_oop_map(_info);
228 __ b(_continuation);
229 }
230
231
232 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
233 __ bind(_entry);
234 if (_compute_lock) {
235 ce->monitor_address(_monitor_ix, _lock_reg);
236 }
237 const Register lock_reg = _lock_reg->as_pointer_register();
238
239 ce->verify_reserved_argument_area_size(1);
240 __ str(lock_reg, Address(SP));
241
242 // Non-blocking leaf routine - no call info needed
243 Runtime1::StubID exit_id = ce->compilation()->has_fpu_code() ?
244 Runtime1::monitorexit_id :
245 Runtime1::monitorexit_nofpu_id;
246 __ call(Runtime1::entry_for(exit_id), relocInfo::runtime_call_type);
247 __ b(_continuation);
248 }
249
250
251 // Call return is directly after patch word
252 int PatchingStub::_patch_info_offset = 0;
253
254 void PatchingStub::align_patch_site(MacroAssembler* masm) {
255 #if 0
256 // TODO: investigate if we required to implement this
257 ShouldNotReachHere();
258 #endif
259 }
260
261 void PatchingStub::emit_code(LIR_Assembler* ce) {
262 const int patchable_instruction_offset = AARCH64_ONLY(NativeInstruction::instruction_size) NOT_AARCH64(0);
263
264 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF,
265 "not enough room for call");
266 assert((_bytes_to_copy & 3) == 0, "must copy a multiple of four bytes");
267 Label call_patch;
268 bool is_load = (_id == load_klass_id) || (_id == load_mirror_id) || (_id == load_appendix_id);
269
270 #ifdef AARCH64
271 assert(nativeInstruction_at(_pc_start)->is_nop(), "required for MT safe patching");
272
273 // Same alignment of reg2mem code and PatchingStub code. Required to make copied bind_literal() code properly aligned.
274 __ align(wordSize);
275 #endif // AARCH64
276
277 if (is_load NOT_AARCH64(&& !VM_Version::supports_movw())) {
278 address start = __ pc();
279
280 // The following sequence duplicates code provided in MacroAssembler::patchable_mov_oop()
281 // without creating relocation info entry.
282 #ifdef AARCH64
283 // Extra nop for MT safe patching
284 __ nop();
285 #endif // AARCH64
286
287 assert((__ pc() - start) == patchable_instruction_offset, "should be");
288 #ifdef AARCH64
289 __ ldr(_obj, __ pc());
290 #else
291 __ ldr(_obj, Address(PC));
292 // Extra nop to handle case of large offset of oop placeholder (see NativeMovConstReg::set_data).
293 __ nop();
294 #endif // AARCH64
295
296 #ifdef ASSERT
297 for (int i = 0; i < _bytes_to_copy; i++) {
298 assert(((address)_pc_start)[i] == start[i], "should be the same code");
299 }
300 #endif // ASSERT
301 }
302
303 address being_initialized_entry = __ pc();
304 if (CommentedAssembly) {
305 __ block_comment(" patch template");
306 }
307 if (is_load) {
308 address start = __ pc();
309 if (_id == load_mirror_id || _id == load_appendix_id) {
310 __ patchable_mov_oop(_obj, (jobject)Universe::non_oop_word(), _index);
311 } else {
312 __ patchable_mov_metadata(_obj, (Metadata*)Universe::non_oop_word(), _index);
313 }
314 #ifdef ASSERT
315 for (int i = 0; i < _bytes_to_copy; i++) {
316 assert(((address)_pc_start)[i] == start[i], "should be the same code");
317 }
318 #endif // ASSERT
319 } else {
320 int* start = (int*)_pc_start;
321 int* end = start + (_bytes_to_copy / BytesPerInt);
322 while (start < end) {
323 __ emit_int32(*start++);
324 }
325 }
326 address end_of_patch = __ pc();
327
328 int bytes_to_skip = 0;
329 if (_id == load_mirror_id) {
330 int offset = __ offset();
331 if (CommentedAssembly) {
332 __ block_comment(" being_initialized check");
333 }
334
335 assert(_obj != noreg, "must be a valid register");
336 // Rtemp should be OK in C1
337 __ ldr(Rtemp, Address(_obj, java_lang_Class::klass_offset_in_bytes()));
338 __ ldr(Rtemp, Address(Rtemp, InstanceKlass::init_thread_offset()));
339 __ cmp(Rtemp, Rthread);
340 __ b(call_patch, ne);
341 __ b(_patch_site_continuation);
342
343 bytes_to_skip += __ offset() - offset;
344 }
345
346 if (CommentedAssembly) {
347 __ block_comment("patch data - 3 high bytes of the word");
348 }
349 const int sizeof_patch_record = 4;
350 bytes_to_skip += sizeof_patch_record;
351 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
352 __ emit_int32(0xff | being_initialized_entry_offset << 8 | bytes_to_skip << 16 | _bytes_to_copy << 24);
353
354 address patch_info_pc = __ pc();
355 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
356
357 // runtime call will return here
358 Label call_return;
359 __ bind(call_return);
360 ce->add_call_info_here(_info);
361 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
362 __ b(_patch_site_entry);
363
364 address entry = __ pc();
365 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
366 address target = NULL;
367 relocInfo::relocType reloc_type = relocInfo::none;
368 switch (_id) {
369 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
370 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break;
371 case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break;
372 case load_appendix_id: target = Runtime1::entry_for(Runtime1::load_appendix_patching_id); reloc_type = relocInfo::oop_type; break;
373 default: ShouldNotReachHere();
374 }
375 __ bind(call_patch);
376
377 if (CommentedAssembly) {
378 __ block_comment("patch entry point");
379 }
380
381 // arrange for call to return just after patch word
382 __ adr(LR, call_return);
383 __ jump(target, relocInfo::runtime_call_type, Rtemp);
384
385 if (is_load) {
386 CodeSection* cs = __ code_section();
387 address pc = (address)_pc_start;
388 RelocIterator iter(cs, pc, pc + 1);
389 relocInfo::change_reloc_info_for_address(&iter, pc, reloc_type, relocInfo::none);
390 }
391 }
392
393 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
394 __ bind(_entry);
395 __ mov_slow(Rtemp, _trap_request);
396 ce->verify_reserved_argument_area_size(1);
397 __ str(Rtemp, Address(SP));
398 __ call(Runtime1::entry_for(Runtime1::deoptimize_id), relocInfo::runtime_call_type);
399 ce->add_call_info_here(_info);
400 DEBUG_ONLY(__ should_not_reach_here());
401 }
402
403
404 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
405 address a;
406 if (_info->deoptimize_on_exception()) {
407 // Deoptimize, do not throw the exception, because it is
408 // probably wrong to do it here.
409 a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id);
410 } else {
411 a = Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id);
412 }
413 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
414 __ bind(_entry);
415 __ call(a, relocInfo::runtime_call_type);
416 ce->add_call_info_here(_info);
417 ce->verify_oop_map(_info);
418 DEBUG_ONLY(STOP("ImplicitNullCheck");)
419 }
420
421
422 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
423 __ bind(_entry);
424 // Pass the object on stack because all registers must be preserved
425 if (_obj->is_cpu_register()) {
426 ce->verify_reserved_argument_area_size(1);
427 __ str(_obj->as_pointer_register(), Address(SP));
428 } else {
429 assert(_obj->is_illegal(), "should be");
430 }
431 __ call(Runtime1::entry_for(_stub), relocInfo::runtime_call_type);
432 ce->add_call_info_here(_info);
433 DEBUG_ONLY(STOP("SimpleException");)
434 }
435
436
437 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
438 __ bind(_entry);
439
440 VMRegPair args[5];
441 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT };
442 SharedRuntime::java_calling_convention(signature, args, 5, true);
443
444 Register r[5];
445 r[0] = src()->as_pointer_register();
446 r[1] = src_pos()->as_register();
447 r[2] = dst()->as_pointer_register();
448 r[3] = dst_pos()->as_register();
449 r[4] = length()->as_register();
450
451 for (int i = 0; i < 5; i++) {
452 VMReg arg = args[i].first();
453 if (arg->is_stack()) {
454 __ str(r[i], Address(SP, arg->reg2stack() * VMRegImpl::stack_slot_size));
455 } else {
456 assert(r[i] == arg->as_Register(), "Calling conventions must match");
457 }
458 }
459
460 ce->emit_static_call_stub();
461 if (ce->compilation()->bailed_out()) {
462 return; // CodeCache is full
463 }
464 int ret_addr_offset = __ patchable_call(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
465 assert(ret_addr_offset == __ offset(), "embedded return address not allowed");
466 ce->add_call_info_here(info());
467 ce->verify_oop_map(info());
468 __ b(_continuation);
469 }
470
471 #undef __