114 // TODO: PPC port } else {
115 // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
116 }
117
118 if (PowerArchitecturePPC64 >= 8) {
119 if (FLAG_IS_DEFAULT(SuperwordUseVSX)) {
120 FLAG_SET_ERGO(bool, SuperwordUseVSX, true);
121 }
122 } else {
123 if (SuperwordUseVSX) {
124 warning("SuperwordUseVSX specified, but needs at least Power8.");
125 FLAG_SET_DEFAULT(SuperwordUseVSX, false);
126 }
127 }
128 MaxVectorSize = SuperwordUseVSX ? 16 : 8;
129 #endif
130
131 // Create and print feature-string.
132 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
133 jio_snprintf(buf, sizeof(buf),
134 "ppc64%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
135 (has_fsqrt() ? " fsqrt" : ""),
136 (has_isel() ? " isel" : ""),
137 (has_lxarxeh() ? " lxarxeh" : ""),
138 (has_cmpb() ? " cmpb" : ""),
139 //(has_mftgpr()? " mftgpr" : ""),
140 (has_popcntb() ? " popcntb" : ""),
141 (has_popcntw() ? " popcntw" : ""),
142 (has_fcfids() ? " fcfids" : ""),
143 (has_vand() ? " vand" : ""),
144 (has_lqarx() ? " lqarx" : ""),
145 (has_vcipher() ? " aes" : ""),
146 (has_vpmsumb() ? " vpmsumb" : ""),
147 (has_mfdscr() ? " mfdscr" : ""),
148 (has_vsx() ? " vsx" : ""),
149 (has_ldbrx() ? " ldbrx" : ""),
150 (has_stdbrx() ? " stdbrx" : ""),
151 (has_vshasig() ? " sha" : "")
152 // Make sure number of %s matches num_features!
153 );
154 _features_string = os::strdup(buf);
155 if (Verbose) {
156 print_features();
157 }
158
159 // PPC64 supports 8-byte compare-exchange operations (see Atomic::cmpxchg)
160 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
161 _supports_cx8 = true;
162
163 // Used by C1.
164 _supports_atomic_getset4 = true;
165 _supports_atomic_getadd4 = true;
166 _supports_atomic_getset8 = true;
167 _supports_atomic_getadd8 = true;
168
169 UseSSE = 0; // Only on x86 and x64
170
171 intx cache_line_size = L1_data_cache_line_size();
302 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
303 UseMontgomerySquareIntrinsic = true;
304 }
305
306 if (UseVectorizedMismatchIntrinsic) {
307 warning("UseVectorizedMismatchIntrinsic specified, but not available on this CPU.");
308 FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false);
309 }
310
311
312 // Adjust RTM (Restricted Transactional Memory) flags.
313 if (UseRTMLocking) {
314 // If CPU or OS do not support TM:
315 // Can't continue because UseRTMLocking affects UseBiasedLocking flag
316 // setting during arguments processing. See use_biased_locking().
317 // VM_Version_init() is executed after UseBiasedLocking is used
318 // in Thread::allocate().
319 if (PowerArchitecturePPC64 < 8) {
320 vm_exit_during_initialization("RTM instructions are not available on this CPU.");
321 }
322 bool os_support_tm = false;
323 #ifdef AIX
324 // Actually, this is supported since AIX 7.1.. Unfortunately, this first
325 // contained bugs, so that it can only be enabled after AIX 7.1.3.30.
326 // The Java property os.version, which is used in RTM tests to decide
327 // whether the feature is available, only knows major and minor versions.
328 // We don't want to change this property, as user code might depend on it.
329 // So the tests can not check on subversion 3.30, and we only enable RTM
330 // with AIX 7.2.
331 if (os::Aix::os_version() >= 0x07020000) { // At least AIX 7.2.
332 os_support_tm = true;
333 }
334 #endif
335 #if defined(LINUX) && defined(VM_LITTLE_ENDIAN)
336 unsigned long auxv = getauxval(AT_HWCAP2);
337
338 if (auxv & PPC_FEATURE2_HTM_NOSC) {
339 if (auxv & PPC_FEATURE2_HAS_HTM) {
340 // TM on POWER8 and POWER9 in compat mode (VM) is supported by the JVM.
341 // TM on POWER9 DD2.1 NV (baremetal) is not supported by the JVM (TM on
342 // POWER9 DD2.1 NV has a few issues that need a couple of firmware
343 // and kernel workarounds, so there is a new mode only supported
344 // on non-virtualized P9 machines called HTM with no Suspend Mode).
345 // TM on POWER9 D2.2+ NV is not supported at all by Linux.
346 os_support_tm = true;
347 }
348 }
349 #endif
350 if (!os_support_tm) {
351 vm_exit_during_initialization("RTM is not supported on this OS version.");
352 }
353 }
354
355 if (UseRTMLocking) {
356 #if INCLUDE_RTM_OPT
357 if (!UnlockExperimentalVMOptions) {
358 vm_exit_during_initialization("UseRTMLocking is only available as experimental option on this platform. "
359 "It must be enabled via -XX:+UnlockExperimentalVMOptions flag.");
360 } else {
361 warning("UseRTMLocking is only available as experimental option on this platform.");
362 }
363 if (!FLAG_IS_CMDLINE(UseRTMLocking)) {
364 // RTM locking should be used only for applications with
365 // high lock contention. For now we do not use it by default.
366 vm_exit_during_initialization("UseRTMLocking flag should be only set on command line");
367 }
368 #else
369 // Only C2 does RTM locking optimization.
370 // Can't continue because UseRTMLocking affects UseBiasedLocking flag
738 if (code[feature_cntr++]) features |= popcntw_m;
739 if (code[feature_cntr++]) features |= fcfids_m;
740 if (code[feature_cntr++]) features |= vand_m;
741 if (code[feature_cntr++]) features |= lqarx_m;
742 if (code[feature_cntr++]) features |= vcipher_m;
743 if (code[feature_cntr++]) features |= vpmsumb_m;
744 if (code[feature_cntr++]) features |= mfdscr_m;
745 if (code[feature_cntr++]) features |= vsx_m;
746 if (code[feature_cntr++]) features |= ldbrx_m;
747 if (code[feature_cntr++]) features |= stdbrx_m;
748 if (code[feature_cntr++]) features |= vshasig_m;
749
750 // Print the detection code.
751 if (PrintAssembly) {
752 ttyLocker ttyl;
753 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
754 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
755 }
756
757 _features = features;
758 }
759
760 // Power 8: Configure Data Stream Control Register.
761 void VM_Version::config_dscr() {
762 // 7 InstWords for each call (function descriptor + blr instruction).
763 const int code_size = (2+2*7)*BytesPerInstWord;
764
765 // Allocate space for the code.
766 ResourceMark rm;
767 CodeBuffer cb("config_dscr", code_size, 0);
768 MacroAssembler* a = new MacroAssembler(&cb);
769
770 // Emit code.
771 uint64_t (*get_dscr)() = (uint64_t(*)())(void *)a->function_entry();
772 uint32_t *code = (uint32_t *)a->pc();
773 a->mfdscr(R3);
774 a->blr();
775
776 void (*set_dscr)(long) = (void(*)(long))(void *)a->function_entry();
777 a->mtdscr(R3);
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114 // TODO: PPC port } else {
115 // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
116 }
117
118 if (PowerArchitecturePPC64 >= 8) {
119 if (FLAG_IS_DEFAULT(SuperwordUseVSX)) {
120 FLAG_SET_ERGO(bool, SuperwordUseVSX, true);
121 }
122 } else {
123 if (SuperwordUseVSX) {
124 warning("SuperwordUseVSX specified, but needs at least Power8.");
125 FLAG_SET_DEFAULT(SuperwordUseVSX, false);
126 }
127 }
128 MaxVectorSize = SuperwordUseVSX ? 16 : 8;
129 #endif
130
131 // Create and print feature-string.
132 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
133 jio_snprintf(buf, sizeof(buf),
134 "ppc64%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
135 (has_fsqrt() ? " fsqrt" : ""),
136 (has_isel() ? " isel" : ""),
137 (has_lxarxeh() ? " lxarxeh" : ""),
138 (has_cmpb() ? " cmpb" : ""),
139 //(has_mftgpr()? " mftgpr" : ""),
140 (has_popcntb() ? " popcntb" : ""),
141 (has_popcntw() ? " popcntw" : ""),
142 (has_fcfids() ? " fcfids" : ""),
143 (has_vand() ? " vand" : ""),
144 (has_lqarx() ? " lqarx" : ""),
145 (has_vcipher() ? " aes" : ""),
146 (has_vpmsumb() ? " vpmsumb" : ""),
147 (has_mfdscr() ? " mfdscr" : ""),
148 (has_vsx() ? " vsx" : ""),
149 (has_ldbrx() ? " ldbrx" : ""),
150 (has_stdbrx() ? " stdbrx" : ""),
151 (has_vshasig() ? " sha" : ""),
152 (has_tm() ? " rtm" : "")
153 // Make sure number of %s matches num_features!
154 );
155 _features_string = os::strdup(buf);
156 if (Verbose) {
157 print_features();
158 }
159
160 // PPC64 supports 8-byte compare-exchange operations (see Atomic::cmpxchg)
161 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
162 _supports_cx8 = true;
163
164 // Used by C1.
165 _supports_atomic_getset4 = true;
166 _supports_atomic_getadd4 = true;
167 _supports_atomic_getset8 = true;
168 _supports_atomic_getadd8 = true;
169
170 UseSSE = 0; // Only on x86 and x64
171
172 intx cache_line_size = L1_data_cache_line_size();
303 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
304 UseMontgomerySquareIntrinsic = true;
305 }
306
307 if (UseVectorizedMismatchIntrinsic) {
308 warning("UseVectorizedMismatchIntrinsic specified, but not available on this CPU.");
309 FLAG_SET_DEFAULT(UseVectorizedMismatchIntrinsic, false);
310 }
311
312
313 // Adjust RTM (Restricted Transactional Memory) flags.
314 if (UseRTMLocking) {
315 // If CPU or OS do not support TM:
316 // Can't continue because UseRTMLocking affects UseBiasedLocking flag
317 // setting during arguments processing. See use_biased_locking().
318 // VM_Version_init() is executed after UseBiasedLocking is used
319 // in Thread::allocate().
320 if (PowerArchitecturePPC64 < 8) {
321 vm_exit_during_initialization("RTM instructions are not available on this CPU.");
322 }
323
324 if (!has_tm()) {
325 vm_exit_during_initialization("RTM is not supported on this OS version.");
326 }
327 }
328
329 if (UseRTMLocking) {
330 #if INCLUDE_RTM_OPT
331 if (!UnlockExperimentalVMOptions) {
332 vm_exit_during_initialization("UseRTMLocking is only available as experimental option on this platform. "
333 "It must be enabled via -XX:+UnlockExperimentalVMOptions flag.");
334 } else {
335 warning("UseRTMLocking is only available as experimental option on this platform.");
336 }
337 if (!FLAG_IS_CMDLINE(UseRTMLocking)) {
338 // RTM locking should be used only for applications with
339 // high lock contention. For now we do not use it by default.
340 vm_exit_during_initialization("UseRTMLocking flag should be only set on command line");
341 }
342 #else
343 // Only C2 does RTM locking optimization.
344 // Can't continue because UseRTMLocking affects UseBiasedLocking flag
712 if (code[feature_cntr++]) features |= popcntw_m;
713 if (code[feature_cntr++]) features |= fcfids_m;
714 if (code[feature_cntr++]) features |= vand_m;
715 if (code[feature_cntr++]) features |= lqarx_m;
716 if (code[feature_cntr++]) features |= vcipher_m;
717 if (code[feature_cntr++]) features |= vpmsumb_m;
718 if (code[feature_cntr++]) features |= mfdscr_m;
719 if (code[feature_cntr++]) features |= vsx_m;
720 if (code[feature_cntr++]) features |= ldbrx_m;
721 if (code[feature_cntr++]) features |= stdbrx_m;
722 if (code[feature_cntr++]) features |= vshasig_m;
723
724 // Print the detection code.
725 if (PrintAssembly) {
726 ttyLocker ttyl;
727 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
728 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
729 }
730
731 _features = features;
732
733 #ifdef AIX
734 // To enable it on AIX it's necessary POWER8 or above and at least AIX 7.2.
735 // Actually, this is supported since AIX 7.1.. Unfortunately, this first
736 // contained bugs, so that it can only be enabled after AIX 7.1.3.30.
737 // The Java property os.version, which is used in RTM tests to decide
738 // whether the feature is available, only knows major and minor versions.
739 // We don't want to change this property, as user code might depend on it.
740 // So the tests can not check on subversion 3.30, and we only enable RTM
741 // with AIX 7.2.
742 if (has_lqarx()) { // POWER8 or above
743 if (os::Aix::os_version() >= 0x07020000) { // At least AIX 7.2.
744 _features |= rtm_m;
745 }
746 }
747 #endif
748 #if defined(LINUX) && defined(VM_LITTLE_ENDIAN)
749 unsigned long auxv = getauxval(AT_HWCAP2);
750
751 if (auxv & PPC_FEATURE2_HTM_NOSC) {
752 if (auxv & PPC_FEATURE2_HAS_HTM) {
753 // TM on POWER8 and POWER9 in compat mode (VM) is supported by the JVM.
754 // TM on POWER9 DD2.1 NV (baremetal) is not supported by the JVM (TM on
755 // POWER9 DD2.1 NV has a few issues that need a couple of firmware
756 // and kernel workarounds, so there is a new mode only supported
757 // on non-virtualized P9 machines called HTM with no Suspend Mode).
758 // TM on POWER9 D2.2+ NV is not supported at all by Linux.
759 _features |= rtm_m;
760 }
761 }
762 #endif
763 }
764
765 // Power 8: Configure Data Stream Control Register.
766 void VM_Version::config_dscr() {
767 // 7 InstWords for each call (function descriptor + blr instruction).
768 const int code_size = (2+2*7)*BytesPerInstWord;
769
770 // Allocate space for the code.
771 ResourceMark rm;
772 CodeBuffer cb("config_dscr", code_size, 0);
773 MacroAssembler* a = new MacroAssembler(&cb);
774
775 // Emit code.
776 uint64_t (*get_dscr)() = (uint64_t(*)())(void *)a->function_entry();
777 uint32_t *code = (uint32_t *)a->pc();
778 a->mfdscr(R3);
779 a->blr();
780
781 void (*set_dscr)(long) = (void(*)(long))(void *)a->function_entry();
782 a->mtdscr(R3);
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