1 /*
2 * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2015 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
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24 */
25
26 #ifndef CPU_PPC_VM_GLOBALS_PPC_HPP
27 #define CPU_PPC_VM_GLOBALS_PPC_HPP
28
29 #include "utilities/globalDefinitions.hpp"
30 #include "utilities/macros.hpp"
31
32 // Sets the default values for platform dependent flags used by the runtime system.
33 // (see globals.hpp)
34
35 define_pd_global(bool, ConvertSleepToYield, true);
36 define_pd_global(bool, ShareVtableStubs, false); // Improves performance markedly for mtrt and compress.
37 define_pd_global(bool, NeedsDeoptSuspend, false); // Only register window machines need this.
38
39
40 define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks.
41 define_pd_global(bool, TrapBasedNullChecks, true);
42 define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast.
43
44 // Use large code-entry alignment.
45 define_pd_global(intx, CodeEntryAlignment, 128);
46 define_pd_global(intx, OptoLoopAlignment, 16);
47 define_pd_global(intx, InlineFrequencyCount, 100);
48 define_pd_global(intx, InlineSmallCode, 1500);
49
50 define_pd_global(intx, PreInflateSpin, 10);
51
52 // Flags for template interpreter.
53 define_pd_global(bool, RewriteBytecodes, true);
54 define_pd_global(bool, RewriteFrequentPairs, true);
55
56 define_pd_global(bool, UseMembar, false);
57
58 define_pd_global(bool, PreserveFramePointer, false);
59
60 // GC Ergo Flags
61 define_pd_global(size_t, CMSYoungGenPerWorker, 16*M); // Default max size of CMS young gen, per GC worker thread.
62
63 define_pd_global(uintx, TypeProfileLevel, 111);
64
65 // Platform dependent flag handling: flags only defined on this platform.
66 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
67 \
68 /* Load poll address from thread. This is used to implement per-thread */ \
69 /* safepoints on platforms != IA64. */ \
70 product(bool, LoadPollAddressFromThread, false, \
71 "Load polling page address from thread object (required for " \
72 "per-thread safepoints on platforms != IA64)") \
73 \
74 product(uintx, PowerArchitecturePPC64, 0, \
75 "CPU Version: x for PowerX. Currently recognizes Power5 to " \
76 "Power8. Default is 0. Newer CPUs will be recognized as Power8.") \
77 \
78 /* Reoptimize code-sequences of calls at runtime, e.g. replace an */ \
79 /* indirect call by a direct call. */ \
80 product(bool, ReoptimizeCallSequences, true, \
81 "Reoptimize code-sequences of calls at runtime.") \
82 \
83 /* Power 8: Configure Data Stream Control Register. */ \
84 product(uint64_t,DSCR_PPC64, (uintx)-1, \
85 "Power8 or later: Specify encoded value for Data Stream Control " \
86 "Register") \
87 product(uint64_t,DSCR_DPFD_PPC64, 8, \
88 "Power8 or later: DPFD (default prefetch depth) value of the " \
89 "Data Stream Control Register." \
90 " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch") \
91 product(uint64_t,DSCR_URG_PPC64, 8, \
92 "Power8 or later: URG (depth attainment urgency) value of the " \
93 "Data Stream Control Register." \
94 " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch") \
95 \
96 product(bool, UseLoadInstructionsForStackBangingPPC64, false, \
97 "Use load instructions for stack banging.") \
98 \
99 /* special instructions */ \
100 \
101 product(bool, UseCountLeadingZerosInstructionsPPC64, true, \
102 "Use count leading zeros instructions.") \
103 \
104 product(bool, UseExtendedLoadAndReserveInstructionsPPC64, false, \
105 "Use extended versions of load-and-reserve instructions.") \
106 \
107 product(bool, UseRotateAndMaskInstructionsPPC64, true, \
108 "Use rotate and mask instructions.") \
109 \
110 product(bool, UseStaticBranchPredictionInCompareAndSwapPPC64, true, \
111 "Use static branch prediction hints in CAS operations.") \
112 product(bool, UseStaticBranchPredictionForUncommonPathsPPC64, false, \
113 "Use static branch prediction hints for uncommon paths.") \
114 \
115 product(bool, UsePower6SchedulerPPC64, false, \
116 "Use Power6 Scheduler.") \
117 \
118 product(bool, InsertEndGroupPPC64, false, \
119 "Insert EndGroup instructions to optimize for Power6.") \
120 \
121 /* Trap based checks. */ \
122 /* Trap based checks use the ppc trap instructions to check certain */ \
123 /* conditions. This instruction raises a SIGTRAP caught by the */ \
124 /* exception handler of the VM. */ \
125 product(bool, UseSIGTRAP, true, \
126 "Allow trap instructions that make use of SIGTRAP. Use this to " \
127 "switch off all optimizations requiring SIGTRAP.") \
128 product(bool, TrapBasedICMissChecks, true, \
129 "Raise and handle SIGTRAP if inline cache miss detected.") \
130 product(bool, TrapBasedNotEntrantChecks, true, \
131 "Raise and handle SIGTRAP if calling not entrant or zombie" \
132 " method.") \
133 product(bool, TraceTraps, false, "Trace all traps the signal handler" \
134 "handles.") \
135 \
136 product(bool, ZapMemory, false, "Write 0x0101... to empty memory." \
137 " Use this to ease debugging.") \
138 \
139 /* Use Restricted Transactional Memory for lock eliding */ \
140 product(bool, UseRTMLocking, false, \
141 "Enable RTM lock eliding for inflated locks in compiled code") \
142 \
143 experimental(bool, UseRTMForStackLocks, false, \
144 "Enable RTM lock eliding for stack locks in compiled code") \
145 \
146 product(bool, UseRTMDeopt, false, \
147 "Perform deopt and recompilation based on RTM abort ratio") \
148 \
149 product(uintx, RTMRetryCount, 5, \
150 "Number of RTM retries on lock abort or busy") \
151 \
152 experimental(intx, RTMSpinLoopCount, 100, \
153 "Spin count for lock to become free before RTM retry") \
154 \
155 experimental(intx, RTMAbortThreshold, 1000, \
156 "Calculate abort ratio after this number of aborts") \
157 \
158 experimental(intx, RTMLockingThreshold, 10000, \
159 "Lock count at which to do RTM lock eliding without " \
160 "abort ratio calculation") \
161 \
162 experimental(intx, RTMAbortRatio, 50, \
163 "Lock abort ratio at which to stop use RTM lock eliding") \
164 \
165 experimental(intx, RTMTotalCountIncrRate, 64, \
166 "Increment total RTM attempted lock count once every n times") \
167 \
168 experimental(intx, RTMLockingCalculationDelay, 0, \
169 "Number of milliseconds to wait before start calculating aborts " \
170 "for RTM locking") \
171 \
172 experimental(bool, UseRTMXendForLockBusy, true, \
173 "Use RTM Xend instead of Xabort when lock busy") \
174
175 #endif // CPU_PPC_VM_GLOBALS_PPC_HPP
--- EOF ---