669 static ByteSize zmm_save_offset() { return byte_offset_of(CpuidInfo, zmm_save); }
670
671 // The value used to check ymm register after signal handle
672 static int ymm_test_value() { return 0xCAFEBABE; }
673
674 static void get_cpu_info_wrapper();
675 static void set_cpuinfo_segv_addr(address pc) { _cpuinfo_segv_addr = pc; }
676 static bool is_cpuinfo_segv_addr(address pc) { return _cpuinfo_segv_addr == pc; }
677 static void set_cpuinfo_cont_addr(address pc) { _cpuinfo_cont_addr = pc; }
678 static address cpuinfo_cont_addr() { return _cpuinfo_cont_addr; }
679
680 static void clean_cpuFeatures() { _features = 0; }
681 static void set_avx_cpuFeatures() { _features = (CPU_SSE | CPU_SSE2 | CPU_AVX | CPU_VZEROUPPER ); }
682 static void set_evex_cpuFeatures() { _features = (CPU_AVX512F | CPU_SSE | CPU_SSE2 | CPU_VZEROUPPER ); }
683
684
685 // Initialization
686 static void initialize();
687
688 // Override Abstract_VM_Version implementation
689 static void print_platform_virtualization_info(outputStream*);
690
691 // Override Abstract_VM_Version implementation
692 static bool use_biased_locking();
693
694 // Asserts
695 static void assert_is_initialized() {
696 assert(_cpuid_info.std_cpuid1_eax.bits.family != 0, "VM_Version not initialized");
697 }
698
699 //
700 // Processor family:
701 // 3 - 386
702 // 4 - 486
703 // 5 - Pentium
704 // 6 - PentiumPro, Pentium II, Celeron, Xeon, Pentium III, Athlon,
705 // Pentium M, Core Solo, Core Duo, Core2 Duo
706 // family 6 model: 9, 13, 14, 15
707 // 0x0f - Pentium 4, Opteron
708 //
709 // Note: The cpu family should be used to select between
710 // instruction sequences which are valid on all Intel
711 // processors. Use the feature test functions below to
916 return 320;
917 #endif
918 }
919 }
920 if (supports_sse2()) {
921 if (cpu_family() == 6) {
922 return 256; // Pentium M, Core, Core2
923 } else {
924 return 512; // Pentium 4
925 }
926 } else {
927 return 128; // Pentium 3 (and all other old CPUs)
928 }
929 }
930 }
931
932 // SSE2 and later processors implement a 'pause' instruction
933 // that can be used for efficient implementation of
934 // the intrinsic for java.lang.Thread.onSpinWait()
935 static bool supports_on_spin_wait() { return supports_sse2(); }
936
937 // support functions for virtualization detection
938 private:
939 static void check_virt_cpuid(uint32_t idx, uint32_t *regs);
940 static void check_virtualizations();
941 };
942
943 #endif // CPU_X86_VM_VERSION_X86_HPP
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669 static ByteSize zmm_save_offset() { return byte_offset_of(CpuidInfo, zmm_save); }
670
671 // The value used to check ymm register after signal handle
672 static int ymm_test_value() { return 0xCAFEBABE; }
673
674 static void get_cpu_info_wrapper();
675 static void set_cpuinfo_segv_addr(address pc) { _cpuinfo_segv_addr = pc; }
676 static bool is_cpuinfo_segv_addr(address pc) { return _cpuinfo_segv_addr == pc; }
677 static void set_cpuinfo_cont_addr(address pc) { _cpuinfo_cont_addr = pc; }
678 static address cpuinfo_cont_addr() { return _cpuinfo_cont_addr; }
679
680 static void clean_cpuFeatures() { _features = 0; }
681 static void set_avx_cpuFeatures() { _features = (CPU_SSE | CPU_SSE2 | CPU_AVX | CPU_VZEROUPPER ); }
682 static void set_evex_cpuFeatures() { _features = (CPU_AVX512F | CPU_SSE | CPU_SSE2 | CPU_VZEROUPPER ); }
683
684
685 // Initialization
686 static void initialize();
687
688 // Override Abstract_VM_Version implementation
689 static bool use_biased_locking();
690
691 // Asserts
692 static void assert_is_initialized() {
693 assert(_cpuid_info.std_cpuid1_eax.bits.family != 0, "VM_Version not initialized");
694 }
695
696 //
697 // Processor family:
698 // 3 - 386
699 // 4 - 486
700 // 5 - Pentium
701 // 6 - PentiumPro, Pentium II, Celeron, Xeon, Pentium III, Athlon,
702 // Pentium M, Core Solo, Core Duo, Core2 Duo
703 // family 6 model: 9, 13, 14, 15
704 // 0x0f - Pentium 4, Opteron
705 //
706 // Note: The cpu family should be used to select between
707 // instruction sequences which are valid on all Intel
708 // processors. Use the feature test functions below to
913 return 320;
914 #endif
915 }
916 }
917 if (supports_sse2()) {
918 if (cpu_family() == 6) {
919 return 256; // Pentium M, Core, Core2
920 } else {
921 return 512; // Pentium 4
922 }
923 } else {
924 return 128; // Pentium 3 (and all other old CPUs)
925 }
926 }
927 }
928
929 // SSE2 and later processors implement a 'pause' instruction
930 // that can be used for efficient implementation of
931 // the intrinsic for java.lang.Thread.onSpinWait()
932 static bool supports_on_spin_wait() { return supports_sse2(); }
933 };
934
935 #endif // CPU_X86_VM_VERSION_X86_HPP
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