1 /* 2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved. 3 * Copyright 2012, 2018 SAP AG. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #ifndef CPU_PPC_VM_REGISTER_PPC_HPP 27 #define CPU_PPC_VM_REGISTER_PPC_HPP 28 29 #include "asm/register.hpp" 30 #include "vm_version_ppc.hpp" 31 32 // forward declaration 33 class Address; 34 class VMRegImpl; 35 typedef VMRegImpl* VMReg; 36 37 // PPC64 registers 38 // 39 // See "64-bit PowerPC ELF ABI Supplement 1.7", IBM Corp. (2003-10-29). 40 // (http://math-atlas.sourceforge.net/devel/assembly/PPC-elf64abi-1.7.pdf) 41 // 42 // r0 Register used in function prologs (volatile) 43 // r1 Stack pointer (nonvolatile) 44 // r2 TOC pointer (volatile) 45 // r3 Parameter and return value (volatile) 46 // r4-r10 Function parameters (volatile) 47 // r11 Register used in calls by pointer and as an environment pointer for languages which require one (volatile) 48 // r12 Register used for exception handling and glink code (volatile) 49 // r13 Reserved for use as system thread ID 50 // r14-r31 Local variables (nonvolatile) 51 // 52 // f0 Scratch register (volatile) 53 // f1-f4 Floating point parameters and return value (volatile) 54 // f5-f13 Floating point parameters (volatile) 55 // f14-f31 Floating point values (nonvolatile) 56 // 57 // LR Link register for return address (volatile) 58 // CTR Loop counter (volatile) 59 // XER Fixed point exception register (volatile) 60 // FPSCR Floating point status and control register (volatile) 61 // 62 // CR0-CR1 Condition code fields (volatile) 63 // CR2-CR4 Condition code fields (nonvolatile) 64 // CR5-CR7 Condition code fields (volatile) 65 // 66 // ---------------------------------------------- 67 // On processors with the VMX feature: 68 // v0-v1 Volatile scratch registers 69 // v2-v13 Volatile vector parameters registers 70 // v14-v19 Volatile scratch registers 71 // v20-v31 Non-volatile registers 72 // vrsave Non-volatile 32-bit register 73 74 75 // Use Register as shortcut 76 class RegisterImpl; 77 typedef RegisterImpl* Register; 78 79 inline Register as_Register(int encoding) { 80 assert(encoding >= 0 && encoding < 32, "bad register encoding"); 81 return (Register)(intptr_t)encoding; 82 } 83 84 // The implementation of integer registers for the Power architecture 85 class RegisterImpl: public AbstractRegisterImpl { 86 public: 87 enum { 88 number_of_registers = 32 89 }; 90 91 // general construction 92 inline friend Register as_Register(int encoding); 93 94 // accessors 95 int encoding() const { assert(is_valid(), "invalid register"); return value(); } 96 VMReg as_VMReg(); 97 Register successor() const { return as_Register(encoding() + 1); } 98 99 // testers 100 bool is_valid() const { return ( 0 <= (value()&0x7F) && (value()&0x7F) < number_of_registers); } 101 bool is_volatile() const { return ( 0 <= (value()&0x7F) && (value()&0x7F) <= 13 ); } 102 bool is_nonvolatile() const { return (14 <= (value()&0x7F) && (value()&0x7F) <= 31 ); } 103 104 const char* name() const; 105 }; 106 107 // The integer registers of the PPC architecture 108 CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1)); 109 110 CONSTANT_REGISTER_DECLARATION(Register, R0, (0)); 111 CONSTANT_REGISTER_DECLARATION(Register, R1, (1)); 112 CONSTANT_REGISTER_DECLARATION(Register, R2, (2)); 113 CONSTANT_REGISTER_DECLARATION(Register, R3, (3)); 114 CONSTANT_REGISTER_DECLARATION(Register, R4, (4)); 115 CONSTANT_REGISTER_DECLARATION(Register, R5, (5)); 116 CONSTANT_REGISTER_DECLARATION(Register, R6, (6)); 117 CONSTANT_REGISTER_DECLARATION(Register, R7, (7)); 118 CONSTANT_REGISTER_DECLARATION(Register, R8, (8)); 119 CONSTANT_REGISTER_DECLARATION(Register, R9, (9)); 120 CONSTANT_REGISTER_DECLARATION(Register, R10, (10)); 121 CONSTANT_REGISTER_DECLARATION(Register, R11, (11)); 122 CONSTANT_REGISTER_DECLARATION(Register, R12, (12)); 123 CONSTANT_REGISTER_DECLARATION(Register, R13, (13)); 124 CONSTANT_REGISTER_DECLARATION(Register, R14, (14)); 125 CONSTANT_REGISTER_DECLARATION(Register, R15, (15)); 126 CONSTANT_REGISTER_DECLARATION(Register, R16, (16)); 127 CONSTANT_REGISTER_DECLARATION(Register, R17, (17)); 128 CONSTANT_REGISTER_DECLARATION(Register, R18, (18)); 129 CONSTANT_REGISTER_DECLARATION(Register, R19, (19)); 130 CONSTANT_REGISTER_DECLARATION(Register, R20, (20)); 131 CONSTANT_REGISTER_DECLARATION(Register, R21, (21)); 132 CONSTANT_REGISTER_DECLARATION(Register, R22, (22)); 133 CONSTANT_REGISTER_DECLARATION(Register, R23, (23)); 134 CONSTANT_REGISTER_DECLARATION(Register, R24, (24)); 135 CONSTANT_REGISTER_DECLARATION(Register, R25, (25)); 136 CONSTANT_REGISTER_DECLARATION(Register, R26, (26)); 137 CONSTANT_REGISTER_DECLARATION(Register, R27, (27)); 138 CONSTANT_REGISTER_DECLARATION(Register, R28, (28)); 139 CONSTANT_REGISTER_DECLARATION(Register, R29, (29)); 140 CONSTANT_REGISTER_DECLARATION(Register, R30, (30)); 141 CONSTANT_REGISTER_DECLARATION(Register, R31, (31)); 142 143 144 // 145 // Because Power has many registers, #define'ing values for them is 146 // beneficial in code size and is worth the cost of some of the 147 // dangers of defines. If a particular file has a problem with these 148 // defines then it's possible to turn them off in that file by 149 // defining DONT_USE_REGISTER_DEFINES. Register_definition_ppc.cpp 150 // does that so that it's able to provide real definitions of these 151 // registers for use in debuggers and such. 152 // 153 154 #ifndef DONT_USE_REGISTER_DEFINES 155 #define noreg ((Register)(noreg_RegisterEnumValue)) 156 157 #define R0 ((Register)(R0_RegisterEnumValue)) 158 #define R1 ((Register)(R1_RegisterEnumValue)) 159 #define R2 ((Register)(R2_RegisterEnumValue)) 160 #define R3 ((Register)(R3_RegisterEnumValue)) 161 #define R4 ((Register)(R4_RegisterEnumValue)) 162 #define R5 ((Register)(R5_RegisterEnumValue)) 163 #define R6 ((Register)(R6_RegisterEnumValue)) 164 #define R7 ((Register)(R7_RegisterEnumValue)) 165 #define R8 ((Register)(R8_RegisterEnumValue)) 166 #define R9 ((Register)(R9_RegisterEnumValue)) 167 #define R10 ((Register)(R10_RegisterEnumValue)) 168 #define R11 ((Register)(R11_RegisterEnumValue)) 169 #define R12 ((Register)(R12_RegisterEnumValue)) 170 #define R13 ((Register)(R13_RegisterEnumValue)) 171 #define R14 ((Register)(R14_RegisterEnumValue)) 172 #define R15 ((Register)(R15_RegisterEnumValue)) 173 #define R16 ((Register)(R16_RegisterEnumValue)) 174 #define R17 ((Register)(R17_RegisterEnumValue)) 175 #define R18 ((Register)(R18_RegisterEnumValue)) 176 #define R19 ((Register)(R19_RegisterEnumValue)) 177 #define R20 ((Register)(R20_RegisterEnumValue)) 178 #define R21 ((Register)(R21_RegisterEnumValue)) 179 #define R22 ((Register)(R22_RegisterEnumValue)) 180 #define R23 ((Register)(R23_RegisterEnumValue)) 181 #define R24 ((Register)(R24_RegisterEnumValue)) 182 #define R25 ((Register)(R25_RegisterEnumValue)) 183 #define R26 ((Register)(R26_RegisterEnumValue)) 184 #define R27 ((Register)(R27_RegisterEnumValue)) 185 #define R28 ((Register)(R28_RegisterEnumValue)) 186 #define R29 ((Register)(R29_RegisterEnumValue)) 187 #define R30 ((Register)(R30_RegisterEnumValue)) 188 #define R31 ((Register)(R31_RegisterEnumValue)) 189 #endif 190 191 // Use ConditionRegister as shortcut 192 class ConditionRegisterImpl; 193 typedef ConditionRegisterImpl* ConditionRegister; 194 195 inline ConditionRegister as_ConditionRegister(int encoding) { 196 assert(encoding >= 0 && encoding < 8, "bad condition register encoding"); 197 return (ConditionRegister)(intptr_t)encoding; 198 } 199 200 // The implementation of condition register(s) for the PPC architecture 201 class ConditionRegisterImpl: public AbstractRegisterImpl { 202 public: 203 enum { 204 number_of_registers = 8 205 }; 206 207 // construction. 208 inline friend ConditionRegister as_ConditionRegister(int encoding); 209 210 // accessors 211 int encoding() const { assert(is_valid(), "invalid register"); return value(); } 212 VMReg as_VMReg(); 213 214 // testers 215 bool is_valid() const { return (0 <= value() && value() < number_of_registers); } 216 bool is_nonvolatile() const { return (2 <= (value()&0x7F) && (value()&0x7F) <= 4 ); } 217 218 const char* name() const; 219 }; 220 221 // The (parts of the) condition register(s) of the PPC architecture 222 // sys/ioctl.h on AIX defines CR0-CR3, so I name these CCR. 223 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR0, (0)); 224 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR1, (1)); 225 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR2, (2)); 226 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR3, (3)); 227 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR4, (4)); 228 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR5, (5)); 229 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR6, (6)); 230 CONSTANT_REGISTER_DECLARATION(ConditionRegister, CCR7, (7)); 231 232 #ifndef DONT_USE_REGISTER_DEFINES 233 234 #define CCR0 ((ConditionRegister)(CCR0_ConditionRegisterEnumValue)) 235 #define CCR1 ((ConditionRegister)(CCR1_ConditionRegisterEnumValue)) 236 #define CCR2 ((ConditionRegister)(CCR2_ConditionRegisterEnumValue)) 237 #define CCR3 ((ConditionRegister)(CCR3_ConditionRegisterEnumValue)) 238 #define CCR4 ((ConditionRegister)(CCR4_ConditionRegisterEnumValue)) 239 #define CCR5 ((ConditionRegister)(CCR5_ConditionRegisterEnumValue)) 240 #define CCR6 ((ConditionRegister)(CCR6_ConditionRegisterEnumValue)) 241 #define CCR7 ((ConditionRegister)(CCR7_ConditionRegisterEnumValue)) 242 243 #endif // DONT_USE_REGISTER_DEFINES 244 245 246 // Use FloatRegister as shortcut 247 class FloatRegisterImpl; 248 typedef FloatRegisterImpl* FloatRegister; 249 250 inline FloatRegister as_FloatRegister(int encoding) { 251 assert(encoding >= 0 && encoding < 32, "bad float register encoding"); 252 return (FloatRegister)(intptr_t)encoding; 253 } 254 255 // The implementation of float registers for the PPC architecture 256 class FloatRegisterImpl: public AbstractRegisterImpl { 257 public: 258 enum { 259 number_of_registers = 32 260 }; 261 262 // construction 263 inline friend FloatRegister as_FloatRegister(int encoding); 264 265 // accessors 266 int encoding() const { assert(is_valid(), "invalid register"); return value(); } 267 VMReg as_VMReg(); 268 FloatRegister successor() const { return as_FloatRegister(encoding() + 1); } 269 270 // testers 271 bool is_valid() const { return (0 <= value() && value() < number_of_registers); } 272 273 const char* name() const; 274 }; 275 276 // The float registers of the PPC architecture 277 CONSTANT_REGISTER_DECLARATION(FloatRegister, fnoreg, (-1)); 278 279 CONSTANT_REGISTER_DECLARATION(FloatRegister, F0, ( 0)); 280 CONSTANT_REGISTER_DECLARATION(FloatRegister, F1, ( 1)); 281 CONSTANT_REGISTER_DECLARATION(FloatRegister, F2, ( 2)); 282 CONSTANT_REGISTER_DECLARATION(FloatRegister, F3, ( 3)); 283 CONSTANT_REGISTER_DECLARATION(FloatRegister, F4, ( 4)); 284 CONSTANT_REGISTER_DECLARATION(FloatRegister, F5, ( 5)); 285 CONSTANT_REGISTER_DECLARATION(FloatRegister, F6, ( 6)); 286 CONSTANT_REGISTER_DECLARATION(FloatRegister, F7, ( 7)); 287 CONSTANT_REGISTER_DECLARATION(FloatRegister, F8, ( 8)); 288 CONSTANT_REGISTER_DECLARATION(FloatRegister, F9, ( 9)); 289 CONSTANT_REGISTER_DECLARATION(FloatRegister, F10, (10)); 290 CONSTANT_REGISTER_DECLARATION(FloatRegister, F11, (11)); 291 CONSTANT_REGISTER_DECLARATION(FloatRegister, F12, (12)); 292 CONSTANT_REGISTER_DECLARATION(FloatRegister, F13, (13)); 293 CONSTANT_REGISTER_DECLARATION(FloatRegister, F14, (14)); 294 CONSTANT_REGISTER_DECLARATION(FloatRegister, F15, (15)); 295 CONSTANT_REGISTER_DECLARATION(FloatRegister, F16, (16)); 296 CONSTANT_REGISTER_DECLARATION(FloatRegister, F17, (17)); 297 CONSTANT_REGISTER_DECLARATION(FloatRegister, F18, (18)); 298 CONSTANT_REGISTER_DECLARATION(FloatRegister, F19, (19)); 299 CONSTANT_REGISTER_DECLARATION(FloatRegister, F20, (20)); 300 CONSTANT_REGISTER_DECLARATION(FloatRegister, F21, (21)); 301 CONSTANT_REGISTER_DECLARATION(FloatRegister, F22, (22)); 302 CONSTANT_REGISTER_DECLARATION(FloatRegister, F23, (23)); 303 CONSTANT_REGISTER_DECLARATION(FloatRegister, F24, (24)); 304 CONSTANT_REGISTER_DECLARATION(FloatRegister, F25, (25)); 305 CONSTANT_REGISTER_DECLARATION(FloatRegister, F26, (26)); 306 CONSTANT_REGISTER_DECLARATION(FloatRegister, F27, (27)); 307 CONSTANT_REGISTER_DECLARATION(FloatRegister, F28, (28)); 308 CONSTANT_REGISTER_DECLARATION(FloatRegister, F29, (29)); 309 CONSTANT_REGISTER_DECLARATION(FloatRegister, F30, (30)); 310 CONSTANT_REGISTER_DECLARATION(FloatRegister, F31, (31)); 311 312 #ifndef DONT_USE_REGISTER_DEFINES 313 #define fnoreg ((FloatRegister)(fnoreg_FloatRegisterEnumValue)) 314 #define F0 ((FloatRegister)( F0_FloatRegisterEnumValue)) 315 #define F1 ((FloatRegister)( F1_FloatRegisterEnumValue)) 316 #define F2 ((FloatRegister)( F2_FloatRegisterEnumValue)) 317 #define F3 ((FloatRegister)( F3_FloatRegisterEnumValue)) 318 #define F4 ((FloatRegister)( F4_FloatRegisterEnumValue)) 319 #define F5 ((FloatRegister)( F5_FloatRegisterEnumValue)) 320 #define F6 ((FloatRegister)( F6_FloatRegisterEnumValue)) 321 #define F7 ((FloatRegister)( F7_FloatRegisterEnumValue)) 322 #define F8 ((FloatRegister)( F8_FloatRegisterEnumValue)) 323 #define F9 ((FloatRegister)( F9_FloatRegisterEnumValue)) 324 #define F10 ((FloatRegister)( F10_FloatRegisterEnumValue)) 325 #define F11 ((FloatRegister)( F11_FloatRegisterEnumValue)) 326 #define F12 ((FloatRegister)( F12_FloatRegisterEnumValue)) 327 #define F13 ((FloatRegister)( F13_FloatRegisterEnumValue)) 328 #define F14 ((FloatRegister)( F14_FloatRegisterEnumValue)) 329 #define F15 ((FloatRegister)( F15_FloatRegisterEnumValue)) 330 #define F16 ((FloatRegister)( F16_FloatRegisterEnumValue)) 331 #define F17 ((FloatRegister)( F17_FloatRegisterEnumValue)) 332 #define F18 ((FloatRegister)( F18_FloatRegisterEnumValue)) 333 #define F19 ((FloatRegister)( F19_FloatRegisterEnumValue)) 334 #define F20 ((FloatRegister)( F20_FloatRegisterEnumValue)) 335 #define F21 ((FloatRegister)( F21_FloatRegisterEnumValue)) 336 #define F22 ((FloatRegister)( F22_FloatRegisterEnumValue)) 337 #define F23 ((FloatRegister)( F23_FloatRegisterEnumValue)) 338 #define F24 ((FloatRegister)( F24_FloatRegisterEnumValue)) 339 #define F25 ((FloatRegister)( F25_FloatRegisterEnumValue)) 340 #define F26 ((FloatRegister)( F26_FloatRegisterEnumValue)) 341 #define F27 ((FloatRegister)( F27_FloatRegisterEnumValue)) 342 #define F28 ((FloatRegister)( F28_FloatRegisterEnumValue)) 343 #define F29 ((FloatRegister)( F29_FloatRegisterEnumValue)) 344 #define F30 ((FloatRegister)( F30_FloatRegisterEnumValue)) 345 #define F31 ((FloatRegister)( F31_FloatRegisterEnumValue)) 346 #endif // DONT_USE_REGISTER_DEFINES 347 348 // Use SpecialRegister as shortcut 349 class SpecialRegisterImpl; 350 typedef SpecialRegisterImpl* SpecialRegister; 351 352 inline SpecialRegister as_SpecialRegister(int encoding) { 353 return (SpecialRegister)(intptr_t)encoding; 354 } 355 356 // The implementation of special registers for the Power architecture (LR, CTR and friends) 357 class SpecialRegisterImpl: public AbstractRegisterImpl { 358 public: 359 enum { 360 number_of_registers = 6 361 }; 362 363 // construction 364 inline friend SpecialRegister as_SpecialRegister(int encoding); 365 366 // accessors 367 int encoding() const { assert(is_valid(), "invalid register"); return value(); } 368 VMReg as_VMReg(); 369 370 // testers 371 bool is_valid() const { return 0 <= value() && value() < number_of_registers; } 372 373 const char* name() const; 374 }; 375 376 // The special registers of the PPC architecture 377 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_XER, (0)); 378 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_LR, (1)); 379 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_CTR, (2)); 380 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_VRSAVE, (3)); 381 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_SPEFSCR, (4)); 382 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_PPR, (5)); 383 384 #ifndef DONT_USE_REGISTER_DEFINES 385 #define SR_XER ((SpecialRegister)(SR_XER_SpecialRegisterEnumValue)) 386 #define SR_LR ((SpecialRegister)(SR_LR_SpecialRegisterEnumValue)) 387 #define SR_CTR ((SpecialRegister)(SR_CTR_SpecialRegisterEnumValue)) 388 #define SR_VRSAVE ((SpecialRegister)(SR_VRSAVE_SpecialRegisterEnumValue)) 389 #define SR_SPEFSCR ((SpecialRegister)(SR_SPEFSCR_SpecialRegisterEnumValue)) 390 #define SR_PPR ((SpecialRegister)(SR_PPR_SpecialRegisterEnumValue)) 391 #endif // DONT_USE_REGISTER_DEFINES 392 393 394 // Use VectorRegister as shortcut 395 class VectorRegisterImpl; 396 typedef VectorRegisterImpl* VectorRegister; 397 398 inline VectorRegister as_VectorRegister(int encoding) { 399 return (VectorRegister)(intptr_t)encoding; 400 } 401 402 // The implementation of vector registers for the Power architecture 403 class VectorRegisterImpl: public AbstractRegisterImpl { 404 public: 405 enum { 406 number_of_registers = 32 407 }; 408 409 // construction 410 inline friend VectorRegister as_VectorRegister(int encoding); 411 412 // accessors 413 int encoding() const { assert(is_valid(), "invalid register"); return value(); } 414 415 // testers 416 bool is_valid() const { return 0 <= value() && value() < number_of_registers; } 417 418 const char* name() const; 419 }; 420 421 // The Vector registers of the Power architecture 422 423 CONSTANT_REGISTER_DECLARATION(VectorRegister, vnoreg, (-1)); 424 425 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR0, ( 0)); 426 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR1, ( 1)); 427 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR2, ( 2)); 428 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR3, ( 3)); 429 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR4, ( 4)); 430 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR5, ( 5)); 431 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR6, ( 6)); 432 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR7, ( 7)); 433 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR8, ( 8)); 434 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR9, ( 9)); 435 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR10, (10)); 436 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR11, (11)); 437 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR12, (12)); 438 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR13, (13)); 439 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR14, (14)); 440 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR15, (15)); 441 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR16, (16)); 442 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR17, (17)); 443 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR18, (18)); 444 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR19, (19)); 445 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR20, (20)); 446 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR21, (21)); 447 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR22, (22)); 448 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR23, (23)); 449 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR24, (24)); 450 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR25, (25)); 451 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR26, (26)); 452 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR27, (27)); 453 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR28, (28)); 454 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR29, (29)); 455 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR30, (30)); 456 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR31, (31)); 457 458 #ifndef DONT_USE_REGISTER_DEFINES 459 #define vnoreg ((VectorRegister)(vnoreg_VectorRegisterEnumValue)) 460 #define VR0 ((VectorRegister)( VR0_VectorRegisterEnumValue)) 461 #define VR1 ((VectorRegister)( VR1_VectorRegisterEnumValue)) 462 #define VR2 ((VectorRegister)( VR2_VectorRegisterEnumValue)) 463 #define VR3 ((VectorRegister)( VR3_VectorRegisterEnumValue)) 464 #define VR4 ((VectorRegister)( VR4_VectorRegisterEnumValue)) 465 #define VR5 ((VectorRegister)( VR5_VectorRegisterEnumValue)) 466 #define VR6 ((VectorRegister)( VR6_VectorRegisterEnumValue)) 467 #define VR7 ((VectorRegister)( VR7_VectorRegisterEnumValue)) 468 #define VR8 ((VectorRegister)( VR8_VectorRegisterEnumValue)) 469 #define VR9 ((VectorRegister)( VR9_VectorRegisterEnumValue)) 470 #define VR10 ((VectorRegister)( VR10_VectorRegisterEnumValue)) 471 #define VR11 ((VectorRegister)( VR11_VectorRegisterEnumValue)) 472 #define VR12 ((VectorRegister)( VR12_VectorRegisterEnumValue)) 473 #define VR13 ((VectorRegister)( VR13_VectorRegisterEnumValue)) 474 #define VR14 ((VectorRegister)( VR14_VectorRegisterEnumValue)) 475 #define VR15 ((VectorRegister)( VR15_VectorRegisterEnumValue)) 476 #define VR16 ((VectorRegister)( VR16_VectorRegisterEnumValue)) 477 #define VR17 ((VectorRegister)( VR17_VectorRegisterEnumValue)) 478 #define VR18 ((VectorRegister)( VR18_VectorRegisterEnumValue)) 479 #define VR19 ((VectorRegister)( VR19_VectorRegisterEnumValue)) 480 #define VR20 ((VectorRegister)( VR20_VectorRegisterEnumValue)) 481 #define VR21 ((VectorRegister)( VR21_VectorRegisterEnumValue)) 482 #define VR22 ((VectorRegister)( VR22_VectorRegisterEnumValue)) 483 #define VR23 ((VectorRegister)( VR23_VectorRegisterEnumValue)) 484 #define VR24 ((VectorRegister)( VR24_VectorRegisterEnumValue)) 485 #define VR25 ((VectorRegister)( VR25_VectorRegisterEnumValue)) 486 #define VR26 ((VectorRegister)( VR26_VectorRegisterEnumValue)) 487 #define VR27 ((VectorRegister)( VR27_VectorRegisterEnumValue)) 488 #define VR28 ((VectorRegister)( VR28_VectorRegisterEnumValue)) 489 #define VR29 ((VectorRegister)( VR29_VectorRegisterEnumValue)) 490 #define VR30 ((VectorRegister)( VR30_VectorRegisterEnumValue)) 491 #define VR31 ((VectorRegister)( VR31_VectorRegisterEnumValue)) 492 #endif // DONT_USE_REGISTER_DEFINES 493 494 495 // Use VectorSRegister as a shortcut. 496 class VectorSRegisterImpl; 497 typedef VectorSRegisterImpl* VectorSRegister; 498 499 inline VectorSRegister as_VectorSRegister(int encoding) { 500 return (VectorSRegister)(intptr_t)encoding; 501 } 502 503 // The implementation of Vector-Scalar (VSX) registers on POWER architecture. 504 class VectorSRegisterImpl: public AbstractRegisterImpl { 505 public: 506 enum { 507 number_of_registers = 32 508 }; 509 510 // construction 511 inline friend VectorSRegister as_VectorSRegister(int encoding); 512 513 // accessors 514 int encoding() const { assert(is_valid(), "invalid register"); return value(); } 515 516 // testers 517 bool is_valid() const { return 0 <= value() && value() < number_of_registers; } 518 519 const char* name() const; 520 }; 521 522 // The Vector-Scalar (VSX) registers of the POWER architecture. 523 524 CONSTANT_REGISTER_DECLARATION(VectorSRegister, vsnoreg, (-1)); 525 526 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR0, ( 0)); 527 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR1, ( 1)); 528 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR2, ( 2)); 529 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR3, ( 3)); 530 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR4, ( 4)); 531 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR5, ( 5)); 532 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR6, ( 6)); 533 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR7, ( 7)); 534 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR8, ( 8)); 535 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR9, ( 9)); 536 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR10, (10)); 537 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR11, (11)); 538 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR12, (12)); 539 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR13, (13)); 540 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR14, (14)); 541 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR15, (15)); 542 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR16, (16)); 543 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR17, (17)); 544 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR18, (18)); 545 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR19, (19)); 546 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR20, (20)); 547 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR21, (21)); 548 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR22, (22)); 549 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR23, (23)); 550 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR24, (24)); 551 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR25, (25)); 552 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR26, (26)); 553 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR27, (27)); 554 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR28, (28)); 555 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR29, (29)); 556 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR30, (30)); 557 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR31, (31)); 558 559 #ifndef DONT_USE_REGISTER_DEFINES 560 #define vsnoregi ((VectorSRegister)(vsnoreg_VectorSRegisterEnumValue)) 561 #define VSR0 ((VectorSRegister)( VSR0_VectorSRegisterEnumValue)) 562 #define VSR1 ((VectorSRegister)( VSR1_VectorSRegisterEnumValue)) 563 #define VSR2 ((VectorSRegister)( VSR2_VectorSRegisterEnumValue)) 564 #define VSR3 ((VectorSRegister)( VSR3_VectorSRegisterEnumValue)) 565 #define VSR4 ((VectorSRegister)( VSR4_VectorSRegisterEnumValue)) 566 #define VSR5 ((VectorSRegister)( VSR5_VectorSRegisterEnumValue)) 567 #define VSR6 ((VectorSRegister)( VSR6_VectorSRegisterEnumValue)) 568 #define VSR7 ((VectorSRegister)( VSR7_VectorSRegisterEnumValue)) 569 #define VSR8 ((VectorSRegister)( VSR8_VectorSRegisterEnumValue)) 570 #define VSR9 ((VectorSRegister)( VSR9_VectorSRegisterEnumValue)) 571 #define VSR10 ((VectorSRegister)( VSR10_VectorSRegisterEnumValue)) 572 #define VSR11 ((VectorSRegister)( VSR11_VectorSRegisterEnumValue)) 573 #define VSR12 ((VectorSRegister)( VSR12_VectorSRegisterEnumValue)) 574 #define VSR13 ((VectorSRegister)( VSR13_VectorSRegisterEnumValue)) 575 #define VSR14 ((VectorSRegister)( VSR14_VectorSRegisterEnumValue)) 576 #define VSR15 ((VectorSRegister)( VSR15_VectorSRegisterEnumValue)) 577 #define VSR16 ((VectorSRegister)( VSR16_VectorSRegisterEnumValue)) 578 #define VSR17 ((VectorSRegister)( VSR17_VectorSRegisterEnumValue)) 579 #define VSR18 ((VectorSRegister)( VSR18_VectorSRegisterEnumValue)) 580 #define VSR19 ((VectorSRegister)( VSR19_VectorSRegisterEnumValue)) 581 #define VSR20 ((VectorSRegister)( VSR20_VectorSRegisterEnumValue)) 582 #define VSR21 ((VectorSRegister)( VSR21_VectorSRegisterEnumValue)) 583 #define VSR22 ((VectorSRegister)( VSR22_VectorSRegisterEnumValue)) 584 #define VSR23 ((VectorSRegister)( VSR23_VectorSRegisterEnumValue)) 585 #define VSR24 ((VectorSRegister)( VSR24_VectorSRegisterEnumValue)) 586 #define VSR25 ((VectorSRegister)( VSR25_VectorSRegisterEnumValue)) 587 #define VSR26 ((VectorSRegister)( VSR26_VectorSRegisterEnumValue)) 588 #define VSR27 ((VectorSRegister)( VSR27_VectorSRegisterEnumValue)) 589 #define VSR28 ((VectorSRegister)( VSR28_VectorSRegisterEnumValue)) 590 #define VSR29 ((VectorSRegister)( VSR29_VectorSRegisterEnumValue)) 591 #define VSR30 ((VectorSRegister)( VSR30_VectorSRegisterEnumValue)) 592 #define VSR31 ((VectorSRegister)( VSR31_VectorSRegisterEnumValue)) 593 #endif // DONT_USE_REGISTER_DEFINES 594 595 // Maximum number of incoming arguments that can be passed in i registers. 596 const int PPC_ARGS_IN_REGS_NUM = 8; 597 598 599 // Need to know the total number of registers of all sorts for SharedInfo. 600 // Define a class that exports it. 601 class ConcreteRegisterImpl : public AbstractRegisterImpl { 602 public: 603 enum { 604 // This number must be large enough to cover REG_COUNT (defined by c2) registers. 605 // There is no requirement that any ordering here matches any ordering c2 gives 606 // it's optoregs. 607 number_of_registers = 608 ( RegisterImpl::number_of_registers + 609 FloatRegisterImpl::number_of_registers ) 610 * 2 // register halves 611 + ConditionRegisterImpl::number_of_registers // condition code registers 612 + SpecialRegisterImpl::number_of_registers // special registers 613 + VectorRegisterImpl::number_of_registers // vector registers 614 }; 615 616 static const int max_gpr; 617 static const int max_fpr; 618 static const int max_cnd; 619 }; 620 621 // Common register declarations used in assembler code. 622 REGISTER_DECLARATION(Register, R0_SCRATCH, R0); // volatile 623 REGISTER_DECLARATION(Register, R1_SP, R1); // non-volatile 624 REGISTER_DECLARATION(Register, R2_TOC, R2); // volatile 625 REGISTER_DECLARATION(Register, R3_RET, R3); // volatile 626 REGISTER_DECLARATION(Register, R3_ARG1, R3); // volatile 627 REGISTER_DECLARATION(Register, R4_ARG2, R4); // volatile 628 REGISTER_DECLARATION(Register, R5_ARG3, R5); // volatile 629 REGISTER_DECLARATION(Register, R6_ARG4, R6); // volatile 630 REGISTER_DECLARATION(Register, R7_ARG5, R7); // volatile 631 REGISTER_DECLARATION(Register, R8_ARG6, R8); // volatile 632 REGISTER_DECLARATION(Register, R9_ARG7, R9); // volatile 633 REGISTER_DECLARATION(Register, R10_ARG8, R10); // volatile 634 REGISTER_DECLARATION(FloatRegister, F0_SCRATCH, F0); // volatile 635 REGISTER_DECLARATION(FloatRegister, F1_RET, F1); // volatile 636 REGISTER_DECLARATION(FloatRegister, F1_ARG1, F1); // volatile 637 REGISTER_DECLARATION(FloatRegister, F2_ARG2, F2); // volatile 638 REGISTER_DECLARATION(FloatRegister, F3_ARG3, F3); // volatile 639 REGISTER_DECLARATION(FloatRegister, F4_ARG4, F4); // volatile 640 REGISTER_DECLARATION(FloatRegister, F5_ARG5, F5); // volatile 641 REGISTER_DECLARATION(FloatRegister, F6_ARG6, F6); // volatile 642 REGISTER_DECLARATION(FloatRegister, F7_ARG7, F7); // volatile 643 REGISTER_DECLARATION(FloatRegister, F8_ARG8, F8); // volatile 644 REGISTER_DECLARATION(FloatRegister, F9_ARG9, F9); // volatile 645 REGISTER_DECLARATION(FloatRegister, F10_ARG10, F10); // volatile 646 REGISTER_DECLARATION(FloatRegister, F11_ARG11, F11); // volatile 647 REGISTER_DECLARATION(FloatRegister, F12_ARG12, F12); // volatile 648 REGISTER_DECLARATION(FloatRegister, F13_ARG13, F13); // volatile 649 650 #ifndef DONT_USE_REGISTER_DEFINES 651 #define R0_SCRATCH AS_REGISTER(Register, R0) 652 #define R1_SP AS_REGISTER(Register, R1) 653 #define R2_TOC AS_REGISTER(Register, R2) 654 #define R3_RET AS_REGISTER(Register, R3) 655 #define R3_ARG1 AS_REGISTER(Register, R3) 656 #define R4_ARG2 AS_REGISTER(Register, R4) 657 #define R5_ARG3 AS_REGISTER(Register, R5) 658 #define R6_ARG4 AS_REGISTER(Register, R6) 659 #define R7_ARG5 AS_REGISTER(Register, R7) 660 #define R8_ARG6 AS_REGISTER(Register, R8) 661 #define R9_ARG7 AS_REGISTER(Register, R9) 662 #define R10_ARG8 AS_REGISTER(Register, R10) 663 #define F0_SCRATCH AS_REGISTER(FloatRegister, F0) 664 #define F1_RET AS_REGISTER(FloatRegister, F1) 665 #define F1_ARG1 AS_REGISTER(FloatRegister, F1) 666 #define F2_ARG2 AS_REGISTER(FloatRegister, F2) 667 #define F3_ARG3 AS_REGISTER(FloatRegister, F3) 668 #define F4_ARG4 AS_REGISTER(FloatRegister, F4) 669 #define F5_ARG5 AS_REGISTER(FloatRegister, F5) 670 #define F6_ARG6 AS_REGISTER(FloatRegister, F6) 671 #define F7_ARG7 AS_REGISTER(FloatRegister, F7) 672 #define F8_ARG8 AS_REGISTER(FloatRegister, F8) 673 #define F9_ARG9 AS_REGISTER(FloatRegister, F9) 674 #define F10_ARG10 AS_REGISTER(FloatRegister, F10) 675 #define F11_ARG11 AS_REGISTER(FloatRegister, F11) 676 #define F12_ARG12 AS_REGISTER(FloatRegister, F12) 677 #define F13_ARG13 AS_REGISTER(FloatRegister, F13) 678 #endif 679 680 // Register declarations to be used in frame manager assembly code. 681 // Use only non-volatile registers in order to keep values across C-calls. 682 #ifdef CC_INTERP 683 REGISTER_DECLARATION(Register, R14_state, R14); // address of new cInterpreter. 684 REGISTER_DECLARATION(Register, R15_prev_state, R15); // address of old cInterpreter 685 #else // CC_INTERP 686 REGISTER_DECLARATION(Register, R14_bcp, R14); 687 REGISTER_DECLARATION(Register, R15_esp, R15); 688 REGISTER_DECLARATION(FloatRegister, F15_ftos, F15); 689 #endif // CC_INTERP 690 REGISTER_DECLARATION(Register, R16_thread, R16); // address of current thread 691 REGISTER_DECLARATION(Register, R17_tos, R17); // address of Java tos (prepushed). 692 REGISTER_DECLARATION(Register, R18_locals, R18); // address of first param slot (receiver). 693 REGISTER_DECLARATION(Register, R19_method, R19); // address of current method 694 #ifndef DONT_USE_REGISTER_DEFINES 695 #ifdef CC_INTERP 696 #define R14_state AS_REGISTER(Register, R14) 697 #define R15_prev_state AS_REGISTER(Register, R15) 698 #else // CC_INTERP 699 #define R14_bcp AS_REGISTER(Register, R14) 700 #define R15_esp AS_REGISTER(Register, R15) 701 #define F15_ftos AS_REGISTER(FloatRegister, F15) 702 #endif // CC_INTERP 703 #define R16_thread AS_REGISTER(Register, R16) 704 #define R17_tos AS_REGISTER(Register, R17) 705 #define R18_locals AS_REGISTER(Register, R18) 706 #define R19_method AS_REGISTER(Register, R19) 707 #define R21_sender_SP AS_REGISTER(Register, R21) 708 #define R23_method_handle AS_REGISTER(Register, R23) 709 #endif 710 711 // Temporary registers to be used within frame manager. We can use 712 // the non-volatiles because the call stub has saved them. 713 // Use only non-volatile registers in order to keep values across C-calls. 714 REGISTER_DECLARATION(Register, R21_tmp1, R21); 715 REGISTER_DECLARATION(Register, R22_tmp2, R22); 716 REGISTER_DECLARATION(Register, R23_tmp3, R23); 717 REGISTER_DECLARATION(Register, R24_tmp4, R24); 718 REGISTER_DECLARATION(Register, R25_tmp5, R25); 719 REGISTER_DECLARATION(Register, R26_tmp6, R26); 720 REGISTER_DECLARATION(Register, R27_tmp7, R27); 721 REGISTER_DECLARATION(Register, R28_tmp8, R28); 722 REGISTER_DECLARATION(Register, R29_tmp9, R29); 723 #ifndef CC_INTERP 724 REGISTER_DECLARATION(Register, R24_dispatch_addr, R24); 725 REGISTER_DECLARATION(Register, R25_templateTableBase, R25); 726 REGISTER_DECLARATION(Register, R26_monitor, R26); 727 REGISTER_DECLARATION(Register, R27_constPoolCache, R27); 728 REGISTER_DECLARATION(Register, R28_mdx, R28); 729 #endif // CC_INTERP 730 731 #ifndef DONT_USE_REGISTER_DEFINES 732 #define R21_tmp1 AS_REGISTER(Register, R21) 733 #define R22_tmp2 AS_REGISTER(Register, R22) 734 #define R23_tmp3 AS_REGISTER(Register, R23) 735 #define R24_tmp4 AS_REGISTER(Register, R24) 736 #define R25_tmp5 AS_REGISTER(Register, R25) 737 #define R26_tmp6 AS_REGISTER(Register, R26) 738 #define R27_tmp7 AS_REGISTER(Register, R27) 739 #define R28_tmp8 AS_REGISTER(Register, R28) 740 #define R29_tmp9 AS_REGISTER(Register, R29) 741 #ifndef CC_INTERP 742 // Lmonitors : monitor pointer 743 // LcpoolCache: constant pool cache 744 // mdx: method data index 745 #define R24_dispatch_addr AS_REGISTER(Register, R24) 746 #define R25_templateTableBase AS_REGISTER(Register, R25) 747 #define R26_monitor AS_REGISTER(Register, R26) 748 #define R27_constPoolCache AS_REGISTER(Register, R27) 749 #define R28_mdx AS_REGISTER(Register, R28) 750 #endif 751 752 #define CCR4_is_synced AS_REGISTER(ConditionRegister, CCR4) 753 #endif 754 755 // Scratch registers are volatile. 756 REGISTER_DECLARATION(Register, R11_scratch1, R11); 757 REGISTER_DECLARATION(Register, R12_scratch2, R12); 758 #ifndef DONT_USE_REGISTER_DEFINES 759 #define R11_scratch1 AS_REGISTER(Register, R11) 760 #define R12_scratch2 AS_REGISTER(Register, R12) 761 #endif 762 763 #endif // CPU_PPC_VM_REGISTER_PPC_HPP