1 /*
2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2014 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
474 #define VR14 ((VectorRegister)( VR14_VectorRegisterEnumValue))
475 #define VR15 ((VectorRegister)( VR15_VectorRegisterEnumValue))
476 #define VR16 ((VectorRegister)( VR16_VectorRegisterEnumValue))
477 #define VR17 ((VectorRegister)( VR17_VectorRegisterEnumValue))
478 #define VR18 ((VectorRegister)( VR18_VectorRegisterEnumValue))
479 #define VR19 ((VectorRegister)( VR19_VectorRegisterEnumValue))
480 #define VR20 ((VectorRegister)( VR20_VectorRegisterEnumValue))
481 #define VR21 ((VectorRegister)( VR21_VectorRegisterEnumValue))
482 #define VR22 ((VectorRegister)( VR22_VectorRegisterEnumValue))
483 #define VR23 ((VectorRegister)( VR23_VectorRegisterEnumValue))
484 #define VR24 ((VectorRegister)( VR24_VectorRegisterEnumValue))
485 #define VR25 ((VectorRegister)( VR25_VectorRegisterEnumValue))
486 #define VR26 ((VectorRegister)( VR26_VectorRegisterEnumValue))
487 #define VR27 ((VectorRegister)( VR27_VectorRegisterEnumValue))
488 #define VR28 ((VectorRegister)( VR28_VectorRegisterEnumValue))
489 #define VR29 ((VectorRegister)( VR29_VectorRegisterEnumValue))
490 #define VR30 ((VectorRegister)( VR30_VectorRegisterEnumValue))
491 #define VR31 ((VectorRegister)( VR31_VectorRegisterEnumValue))
492 #endif // DONT_USE_REGISTER_DEFINES
493
494
495 // Maximum number of incoming arguments that can be passed in i registers.
496 const int PPC_ARGS_IN_REGS_NUM = 8;
497
498
499 // Need to know the total number of registers of all sorts for SharedInfo.
500 // Define a class that exports it.
501 class ConcreteRegisterImpl : public AbstractRegisterImpl {
502 public:
503 enum {
504 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
505 // There is no requirement that any ordering here matches any ordering c2 gives
506 // it's optoregs.
507 number_of_registers =
508 ( RegisterImpl::number_of_registers +
509 FloatRegisterImpl::number_of_registers )
510 * 2 // register halves
511 + ConditionRegisterImpl::number_of_registers // condition code registers
512 + SpecialRegisterImpl::number_of_registers // special registers
513 + VectorRegisterImpl::number_of_registers // vector registers
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1 /*
2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2018 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
474 #define VR14 ((VectorRegister)( VR14_VectorRegisterEnumValue))
475 #define VR15 ((VectorRegister)( VR15_VectorRegisterEnumValue))
476 #define VR16 ((VectorRegister)( VR16_VectorRegisterEnumValue))
477 #define VR17 ((VectorRegister)( VR17_VectorRegisterEnumValue))
478 #define VR18 ((VectorRegister)( VR18_VectorRegisterEnumValue))
479 #define VR19 ((VectorRegister)( VR19_VectorRegisterEnumValue))
480 #define VR20 ((VectorRegister)( VR20_VectorRegisterEnumValue))
481 #define VR21 ((VectorRegister)( VR21_VectorRegisterEnumValue))
482 #define VR22 ((VectorRegister)( VR22_VectorRegisterEnumValue))
483 #define VR23 ((VectorRegister)( VR23_VectorRegisterEnumValue))
484 #define VR24 ((VectorRegister)( VR24_VectorRegisterEnumValue))
485 #define VR25 ((VectorRegister)( VR25_VectorRegisterEnumValue))
486 #define VR26 ((VectorRegister)( VR26_VectorRegisterEnumValue))
487 #define VR27 ((VectorRegister)( VR27_VectorRegisterEnumValue))
488 #define VR28 ((VectorRegister)( VR28_VectorRegisterEnumValue))
489 #define VR29 ((VectorRegister)( VR29_VectorRegisterEnumValue))
490 #define VR30 ((VectorRegister)( VR30_VectorRegisterEnumValue))
491 #define VR31 ((VectorRegister)( VR31_VectorRegisterEnumValue))
492 #endif // DONT_USE_REGISTER_DEFINES
493
494
495 // Use VectorSRegister as a shortcut.
496 class VectorSRegisterImpl;
497 typedef VectorSRegisterImpl* VectorSRegister;
498
499 inline VectorSRegister as_VectorSRegister(int encoding) {
500 return (VectorSRegister)(intptr_t)encoding;
501 }
502
503 // The implementation of Vector-Scalar (VSX) registers on POWER architecture.
504 class VectorSRegisterImpl: public AbstractRegisterImpl {
505 public:
506 enum {
507 number_of_registers = 32
508 };
509
510 // construction
511 inline friend VectorSRegister as_VectorSRegister(int encoding);
512
513 // accessors
514 int encoding() const { assert(is_valid(), "invalid register"); return value(); }
515
516 // testers
517 bool is_valid() const { return 0 <= value() && value() < number_of_registers; }
518
519 const char* name() const;
520 };
521
522 // The Vector-Scalar (VSX) registers of the POWER architecture.
523
524 CONSTANT_REGISTER_DECLARATION(VectorSRegister, vsnoreg, (-1));
525
526 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR0, ( 0));
527 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR1, ( 1));
528 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR2, ( 2));
529 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR3, ( 3));
530 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR4, ( 4));
531 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR5, ( 5));
532 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR6, ( 6));
533 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR7, ( 7));
534 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR8, ( 8));
535 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR9, ( 9));
536 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR10, (10));
537 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR11, (11));
538 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR12, (12));
539 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR13, (13));
540 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR14, (14));
541 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR15, (15));
542 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR16, (16));
543 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR17, (17));
544 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR18, (18));
545 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR19, (19));
546 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR20, (20));
547 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR21, (21));
548 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR22, (22));
549 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR23, (23));
550 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR24, (24));
551 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR25, (25));
552 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR26, (26));
553 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR27, (27));
554 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR28, (28));
555 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR29, (29));
556 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR30, (30));
557 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR31, (31));
558
559 #ifndef DONT_USE_REGISTER_DEFINES
560 #define vsnoregi ((VectorSRegister)(vsnoreg_VectorSRegisterEnumValue))
561 #define VSR0 ((VectorSRegister)( VSR0_VectorSRegisterEnumValue))
562 #define VSR1 ((VectorSRegister)( VSR1_VectorSRegisterEnumValue))
563 #define VSR2 ((VectorSRegister)( VSR2_VectorSRegisterEnumValue))
564 #define VSR3 ((VectorSRegister)( VSR3_VectorSRegisterEnumValue))
565 #define VSR4 ((VectorSRegister)( VSR4_VectorSRegisterEnumValue))
566 #define VSR5 ((VectorSRegister)( VSR5_VectorSRegisterEnumValue))
567 #define VSR6 ((VectorSRegister)( VSR6_VectorSRegisterEnumValue))
568 #define VSR7 ((VectorSRegister)( VSR7_VectorSRegisterEnumValue))
569 #define VSR8 ((VectorSRegister)( VSR8_VectorSRegisterEnumValue))
570 #define VSR9 ((VectorSRegister)( VSR9_VectorSRegisterEnumValue))
571 #define VSR10 ((VectorSRegister)( VSR10_VectorSRegisterEnumValue))
572 #define VSR11 ((VectorSRegister)( VSR11_VectorSRegisterEnumValue))
573 #define VSR12 ((VectorSRegister)( VSR12_VectorSRegisterEnumValue))
574 #define VSR13 ((VectorSRegister)( VSR13_VectorSRegisterEnumValue))
575 #define VSR14 ((VectorSRegister)( VSR14_VectorSRegisterEnumValue))
576 #define VSR15 ((VectorSRegister)( VSR15_VectorSRegisterEnumValue))
577 #define VSR16 ((VectorSRegister)( VSR16_VectorSRegisterEnumValue))
578 #define VSR17 ((VectorSRegister)( VSR17_VectorSRegisterEnumValue))
579 #define VSR18 ((VectorSRegister)( VSR18_VectorSRegisterEnumValue))
580 #define VSR19 ((VectorSRegister)( VSR19_VectorSRegisterEnumValue))
581 #define VSR20 ((VectorSRegister)( VSR20_VectorSRegisterEnumValue))
582 #define VSR21 ((VectorSRegister)( VSR21_VectorSRegisterEnumValue))
583 #define VSR22 ((VectorSRegister)( VSR22_VectorSRegisterEnumValue))
584 #define VSR23 ((VectorSRegister)( VSR23_VectorSRegisterEnumValue))
585 #define VSR24 ((VectorSRegister)( VSR24_VectorSRegisterEnumValue))
586 #define VSR25 ((VectorSRegister)( VSR25_VectorSRegisterEnumValue))
587 #define VSR26 ((VectorSRegister)( VSR26_VectorSRegisterEnumValue))
588 #define VSR27 ((VectorSRegister)( VSR27_VectorSRegisterEnumValue))
589 #define VSR28 ((VectorSRegister)( VSR28_VectorSRegisterEnumValue))
590 #define VSR29 ((VectorSRegister)( VSR29_VectorSRegisterEnumValue))
591 #define VSR30 ((VectorSRegister)( VSR30_VectorSRegisterEnumValue))
592 #define VSR31 ((VectorSRegister)( VSR31_VectorSRegisterEnumValue))
593 #endif // DONT_USE_REGISTER_DEFINES
594
595 // Maximum number of incoming arguments that can be passed in i registers.
596 const int PPC_ARGS_IN_REGS_NUM = 8;
597
598
599 // Need to know the total number of registers of all sorts for SharedInfo.
600 // Define a class that exports it.
601 class ConcreteRegisterImpl : public AbstractRegisterImpl {
602 public:
603 enum {
604 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
605 // There is no requirement that any ordering here matches any ordering c2 gives
606 // it's optoregs.
607 number_of_registers =
608 ( RegisterImpl::number_of_registers +
609 FloatRegisterImpl::number_of_registers )
610 * 2 // register halves
611 + ConditionRegisterImpl::number_of_registers // condition code registers
612 + SpecialRegisterImpl::number_of_registers // special registers
613 + VectorRegisterImpl::number_of_registers // vector registers
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