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src/cpu/ppc/vm/vm_version_ppc.hpp

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rev 8845 : Apply 8154156 for VSX support, with cherry picking from 8077838, 8080684, and 8149655

*** 1,8 **** /* ! * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. ! * Copyright 2012, 2014 SAP AG. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. --- 1,8 ---- /* ! * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved. ! * Copyright 2012, 2018 SAP AG. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation.
*** 40,51 **** --- 40,54 ---- popcntb, popcntw, fcfids, vand, dcba, + lqarx, vcipher, vpmsumb, + mfdscr, + vsx, num_features // last entry to count features }; enum Feature_Flag_Set { unknown_m = 0, fsqrt_m = (1 << fsqrt ),
*** 56,76 **** --- 59,83 ---- popcntb_m = (1 << popcntb), popcntw_m = (1 << popcntw), fcfids_m = (1 << fcfids ), vand_m = (1 << vand ), dcba_m = (1 << dcba ), + lqarx_m = (1 << lqarx ), vcipher_m = (1 << vcipher), vpmsumb_m = (1 << vpmsumb), + mfdscr_m = (1 << mfdscr ), + vsx_m = (1 << vsx ), all_features_m = -1 }; static int _features; static int _measured_cache_line_size; static const char* _features_str; static bool _is_determine_features_test_running; static void print_features(); static void determine_features(); // also measures cache line size + static void config_dscr(); // Power 8: Configure Data Stream Control Register. static void determine_section_size(); static void power6_micro_bench(); public: // Initialization static void initialize();
*** 85,102 **** --- 92,115 ---- static bool has_popcntb() { return (_features & popcntb_m) != 0; } static bool has_popcntw() { return (_features & popcntw_m) != 0; } static bool has_fcfids() { return (_features & fcfids_m) != 0; } static bool has_vand() { return (_features & vand_m) != 0; } static bool has_dcba() { return (_features & dcba_m) != 0; } + static bool has_lqarx() { return (_features & lqarx_m) != 0; } static bool has_vcipher() { return (_features & vcipher_m) != 0; } static bool has_vpmsumb() { return (_features & vpmsumb_m) != 0; } + static bool has_mfdscr() { return (_features & mfdscr_m) != 0; } + static bool has_vsx() { return (_features & vsx_m) != 0; } static const char* cpu_features() { return _features_str; } static int get_cache_line_size() { return _measured_cache_line_size; } // Assembler testing static void allow_all(); static void revert(); + + // POWER 8: DSCR current value. + static uint64_t _dscr_val; }; #endif // CPU_PPC_VM_VM_VERSION_PPC_HPP
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