1 /*
2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2014 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "runtime/java.hpp"
32 #include "runtime/stubCodeGenerator.hpp"
33 #include "utilities/defaultStream.hpp"
34 #include "vm_version_ppc.hpp"
35 #ifdef TARGET_OS_FAMILY_aix
36 # include "os_aix.inline.hpp"
37 #endif
38 #ifdef TARGET_OS_FAMILY_linux
39 # include "os_linux.inline.hpp"
40 #endif
41
42 # include <sys/sysinfo.h>
43
44 int VM_Version::_features = VM_Version::unknown_m;
45 int VM_Version::_measured_cache_line_size = 128; // default value
46 const char* VM_Version::_features_str = "";
47 bool VM_Version::_is_determine_features_test_running = false;
48
49
50 #define MSG(flag) \
51 if (flag && !FLAG_IS_DEFAULT(flag)) \
52 jio_fprintf(defaultStream::error_stream(), \
53 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
54 " -XX:+" #flag " will be disabled!\n");
55
56 void VM_Version::initialize() {
57
58 // Test which instructions are supported and measure cache line size.
59 determine_features();
60
61 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
62 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
63 if (VM_Version::has_popcntw()) {
64 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7);
65 } else if (VM_Version::has_cmpb()) {
66 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6);
67 } else if (VM_Version::has_popcntb()) {
68 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5);
69 } else {
70 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0);
71 }
72 }
73 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 ||
74 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7,
75 "PowerArchitecturePPC64 should be 0, 5, 6 or 7");
76
77 if (!UseSIGTRAP) {
78 MSG(TrapBasedICMissChecks);
79 MSG(TrapBasedNotEntrantChecks);
80 MSG(TrapBasedNullChecks);
81 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false);
82 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false);
83 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false);
84 }
85
86 #ifdef COMPILER2
87 if (!UseSIGTRAP) {
88 MSG(TrapBasedRangeChecks);
89 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false);
90 }
91
92 // On Power6 test for section size.
93 if (PowerArchitecturePPC64 == 6) {
94 determine_section_size();
95 // TODO: PPC port } else {
96 // TODO: PPC port PdScheduling::power6SectorSize = 0x20;
97 }
98
99 MaxVectorSize = 8;
100 #endif
101
102 // Create and print feature-string.
103 char buf[(num_features+1) * 16]; // Max 16 chars per feature.
104 jio_snprintf(buf, sizeof(buf),
105 "ppc64%s%s%s%s%s%s%s%s%s%s",
106 (has_fsqrt() ? " fsqrt" : ""),
107 (has_isel() ? " isel" : ""),
108 (has_lxarxeh() ? " lxarxeh" : ""),
109 (has_cmpb() ? " cmpb" : ""),
110 //(has_mftgpr()? " mftgpr" : ""),
111 (has_popcntb() ? " popcntb" : ""),
112 (has_popcntw() ? " popcntw" : ""),
113 (has_fcfids() ? " fcfids" : ""),
114 (has_vand() ? " vand" : ""),
115 (has_vcipher() ? " aes" : ""),
116 (has_vpmsumb() ? " vpmsumb" : "")
117 // Make sure number of %s matches num_features!
118 );
119 _features_str = strdup(buf);
120 NOT_PRODUCT(if (Verbose) print_features(););
121
122 // PPC64 supports 8-byte compare-exchange operations (see
123 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
124 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
125 _supports_cx8 = true;
126
127 UseSSE = 0; // Only on x86 and x64
128
129 intx cache_line_size = _measured_cache_line_size;
130
131 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
132
133 if (AllocatePrefetchStyle == 4) {
134 AllocatePrefetchStepSize = cache_line_size; // Need exact value.
135 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
136 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
137 } else {
138 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
139 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
140 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
141 }
142
143 assert(AllocatePrefetchLines > 0, "invalid value");
144 if (AllocatePrefetchLines < 1) { // Set valid value in product VM.
145 AllocatePrefetchLines = 1; // Conservative value.
146 }
147
148 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) {
149 AllocatePrefetchStyle = 1; // Fall back if inappropriate.
150 }
151
152 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
153
154 // Implementation does not use any of the vector instructions
155 // available with Power8. Their exploitation is still pending.
156 if (!UseCRC32Intrinsics) {
157 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
158 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
159 }
160 }
161
162 // The AES intrinsic stubs require AES instruction support.
163 if (has_vcipher()) {
164 if (FLAG_IS_DEFAULT(UseAES)) {
165 UseAES = true;
166 }
167 } else if (UseAES) {
168 if (!FLAG_IS_DEFAULT(UseAES))
169 warning("AES instructions are not available on this CPU");
170 FLAG_SET_DEFAULT(UseAES, false);
171 }
172
173 if (UseAES && has_vcipher()) {
174 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
175 UseAESIntrinsics = true;
176 }
177 } else if (UseAESIntrinsics) {
178 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
179 warning("AES intrinsics are not available on this CPU");
180 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
181 }
182
183 if (UseSHA) {
184 warning("SHA instructions are not available on this CPU");
185 FLAG_SET_DEFAULT(UseSHA, false);
186 }
187 if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
188 warning("SHA intrinsics are not available on this CPU");
189 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
190 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
191 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
192 }
193
194 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
195 UseMontgomeryMultiplyIntrinsic = true;
196 }
197 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
198 UseMontgomerySquareIntrinsic = true;
199 }
200 }
201
202 void VM_Version::print_features() {
203 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), (int) get_cache_line_size());
204 }
205
206 #ifdef COMPILER2
207 // Determine section size on power6: If section size is 8 instructions,
208 // there should be a difference between the two testloops of ~15 %. If
209 // no difference is detected the section is assumed to be 32 instructions.
210 void VM_Version::determine_section_size() {
211
212 int unroll = 80;
213
214 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
215
216 // Allocate space for the code.
217 ResourceMark rm;
218 CodeBuffer cb("detect_section_size", code_size, 0);
219 MacroAssembler* a = new MacroAssembler(&cb);
220
221 uint32_t *code = (uint32_t *)a->pc();
222 // Emit code.
223 void (*test1)() = (void(*)())(void *)a->function_entry();
224
225 Label l1;
226
227 a->li(R4, 1);
228 a->sldi(R4, R4, 28);
229 a->b(l1);
230 a->align(CodeEntryAlignment);
231
232 a->bind(l1);
233
234 for (int i = 0; i < unroll; i++) {
235 // Schleife 1
236 // ------- sector 0 ------------
237 // ;; 0
238 a->nop(); // 1
239 a->fpnop0(); // 2
240 a->fpnop1(); // 3
241 a->addi(R4,R4, -1); // 4
242
243 // ;; 1
244 a->nop(); // 5
245 a->fmr(F6, F6); // 6
246 a->fmr(F7, F7); // 7
247 a->endgroup(); // 8
248 // ------- sector 8 ------------
249
250 // ;; 2
251 a->nop(); // 9
252 a->nop(); // 10
253 a->fmr(F8, F8); // 11
254 a->fmr(F9, F9); // 12
255
256 // ;; 3
257 a->nop(); // 13
258 a->fmr(F10, F10); // 14
259 a->fmr(F11, F11); // 15
260 a->endgroup(); // 16
261 // -------- sector 16 -------------
262
263 // ;; 4
264 a->nop(); // 17
265 a->nop(); // 18
266 a->fmr(F15, F15); // 19
267 a->fmr(F16, F16); // 20
268
269 // ;; 5
270 a->nop(); // 21
271 a->fmr(F17, F17); // 22
272 a->fmr(F18, F18); // 23
273 a->endgroup(); // 24
274 // ------- sector 24 ------------
275
276 // ;; 6
277 a->nop(); // 25
278 a->nop(); // 26
279 a->fmr(F19, F19); // 27
280 a->fmr(F20, F20); // 28
281
282 // ;; 7
283 a->nop(); // 29
284 a->fmr(F21, F21); // 30
285 a->fmr(F22, F22); // 31
286 a->brnop0(); // 32
287
288 // ------- sector 32 ------------
289 }
290
291 // ;; 8
292 a->cmpdi(CCR0, R4, unroll); // 33
293 a->bge(CCR0, l1); // 34
294 a->blr();
295
296 // Emit code.
297 void (*test2)() = (void(*)())(void *)a->function_entry();
298 // uint32_t *code = (uint32_t *)a->pc();
299
300 Label l2;
301
302 a->li(R4, 1);
303 a->sldi(R4, R4, 28);
304 a->b(l2);
305 a->align(CodeEntryAlignment);
306
307 a->bind(l2);
308
309 for (int i = 0; i < unroll; i++) {
310 // Schleife 2
311 // ------- sector 0 ------------
312 // ;; 0
313 a->brnop0(); // 1
314 a->nop(); // 2
315 //a->cmpdi(CCR0, R4, unroll);
316 a->fpnop0(); // 3
317 a->fpnop1(); // 4
318 a->addi(R4,R4, -1); // 5
319
320 // ;; 1
321
322 a->nop(); // 6
323 a->fmr(F6, F6); // 7
324 a->fmr(F7, F7); // 8
325 // ------- sector 8 ---------------
326
327 // ;; 2
328 a->endgroup(); // 9
329
330 // ;; 3
331 a->nop(); // 10
332 a->nop(); // 11
333 a->fmr(F8, F8); // 12
334
335 // ;; 4
336 a->fmr(F9, F9); // 13
337 a->nop(); // 14
338 a->fmr(F10, F10); // 15
339
340 // ;; 5
341 a->fmr(F11, F11); // 16
342 // -------- sector 16 -------------
343
344 // ;; 6
345 a->endgroup(); // 17
346
347 // ;; 7
348 a->nop(); // 18
349 a->nop(); // 19
350 a->fmr(F15, F15); // 20
351
352 // ;; 8
353 a->fmr(F16, F16); // 21
354 a->nop(); // 22
355 a->fmr(F17, F17); // 23
356
357 // ;; 9
358 a->fmr(F18, F18); // 24
359 // -------- sector 24 -------------
360
361 // ;; 10
362 a->endgroup(); // 25
363
364 // ;; 11
365 a->nop(); // 26
366 a->nop(); // 27
367 a->fmr(F19, F19); // 28
368
369 // ;; 12
370 a->fmr(F20, F20); // 29
371 a->nop(); // 30
372 a->fmr(F21, F21); // 31
373
374 // ;; 13
375 a->fmr(F22, F22); // 32
376 }
377
378 // -------- sector 32 -------------
379 // ;; 14
380 a->cmpdi(CCR0, R4, unroll); // 33
381 a->bge(CCR0, l2); // 34
382
383 a->blr();
384 uint32_t *code_end = (uint32_t *)a->pc();
385 a->flush();
386
387 double loop1_seconds,loop2_seconds, rel_diff;
388 uint64_t start1, stop1;
389
390 start1 = os::current_thread_cpu_time(false);
391 (*test1)();
392 stop1 = os::current_thread_cpu_time(false);
393 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
394
395
396 start1 = os::current_thread_cpu_time(false);
397 (*test2)();
398 stop1 = os::current_thread_cpu_time(false);
399
400 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
401
402 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
403
404 if (PrintAssembly) {
405 ttyLocker ttyl;
406 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
407 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
408 tty->print_cr("Time loop1 :%f", loop1_seconds);
409 tty->print_cr("Time loop2 :%f", loop2_seconds);
410 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
411
412 if (rel_diff > 12.0) {
413 tty->print_cr("Section Size 8 Instructions");
414 } else{
415 tty->print_cr("Section Size 32 Instructions or Power5");
416 }
417 }
418
419 #if 0 // TODO: PPC port
420 // Set sector size (if not set explicitly).
421 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
422 if (rel_diff > 12.0) {
423 PdScheduling::power6SectorSize = 0x20;
424 } else {
425 PdScheduling::power6SectorSize = 0x80;
426 }
427 } else if (Power6SectorSize128PPC64) {
428 PdScheduling::power6SectorSize = 0x80;
429 } else {
430 PdScheduling::power6SectorSize = 0x20;
431 }
432 #endif
433 if (UsePower6SchedulerPPC64) Unimplemented();
434 }
435 #endif // COMPILER2
436
437 void VM_Version::determine_features() {
438 #if defined(ABI_ELFv2)
439 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect.
440 #else
441 // 7 InstWords for each call (function descriptor + blr instruction).
442 const int code_size = (num_features+1+2*7)*BytesPerInstWord;
443 #endif
444 int features = 0;
445
446 // create test area
447 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
448 char test_area[BUFFER_SIZE];
449 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
450
451 // Allocate space for the code.
452 ResourceMark rm;
453 CodeBuffer cb("detect_cpu_features", code_size, 0);
454 MacroAssembler* a = new MacroAssembler(&cb);
455
456 // Must be set to true so we can generate the test code.
457 _features = VM_Version::all_features_m;
458
459 // Emit code.
460 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
461 uint32_t *code = (uint32_t *)a->pc();
462 // Don't use R0 in ldarx.
463 // Keep R3_ARG1 unmodified, it contains &field (see below).
464 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
465 a->fsqrt(F3, F4); // code[0] -> fsqrt_m
466 a->fsqrts(F3, F4); // code[1] -> fsqrts_m
467 a->isel(R7, R5, R6, 0); // code[2] -> isel_m
468 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m
469 a->cmpb(R7, R5, R6); // code[4] -> bcmp
470 //a->mftgpr(R7, F3); // code[5] -> mftgpr
471 a->popcntb(R7, R5); // code[6] -> popcntb
472 a->popcntw(R7, R5); // code[7] -> popcntw
473 a->fcfids(F3, F4); // code[8] -> fcfids
474 a->vand(VR0, VR0, VR0); // code[9] -> vand
475 a->vcipher(VR0, VR1, VR2); // code[10] -> vcipher
476 a->vpmsumb(VR0, VR1, VR2); // code[11] -> vpmsumb
477 a->blr();
478
479 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
480 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
481 a->dcbz(R3_ARG1); // R3_ARG1 = addr
482 a->blr();
483
484 uint32_t *code_end = (uint32_t *)a->pc();
485 a->flush();
486 _features = VM_Version::unknown_m;
487
488 // Print the detection code.
489 if (PrintAssembly) {
490 ttyLocker ttyl;
491 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
492 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
493 }
494
495 // Measure cache line size.
496 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
497 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
498 int count = 0; // count zeroed bytes
499 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
500 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
501 _measured_cache_line_size = count;
502
503 // Execute code. Illegal instructions will be replaced by 0 in the signal handler.
504 VM_Version::_is_determine_features_test_running = true;
505 (*test)((address)mid_of_test_area, (uint64_t)0);
506 VM_Version::_is_determine_features_test_running = false;
507
508 // determine which instructions are legal.
509 int feature_cntr = 0;
510 if (code[feature_cntr++]) features |= fsqrt_m;
511 if (code[feature_cntr++]) features |= fsqrts_m;
512 if (code[feature_cntr++]) features |= isel_m;
513 if (code[feature_cntr++]) features |= lxarxeh_m;
514 if (code[feature_cntr++]) features |= cmpb_m;
515 //if(code[feature_cntr++])features |= mftgpr_m;
516 if (code[feature_cntr++]) features |= popcntb_m;
517 if (code[feature_cntr++]) features |= popcntw_m;
518 if (code[feature_cntr++]) features |= fcfids_m;
519 if (code[feature_cntr++]) features |= vand_m;
520 if (code[feature_cntr++]) features |= vcipher_m;
521 if (code[feature_cntr++]) features |= vpmsumb_m;
522
523 // Print the detection code.
524 if (PrintAssembly) {
525 ttyLocker ttyl;
526 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code));
527 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
528 }
529
530 _features = features;
531 }
532
533
534 static int saved_features = 0;
535
536 void VM_Version::allow_all() {
537 saved_features = _features;
538 _features = all_features_m;
539 }
540
541 void VM_Version::revert() {
542 _features = saved_features;
543 }