1 /* 2 * Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef CPU_X86_GLOBALS_X86_HPP 26 #define CPU_X86_GLOBALS_X86_HPP 27 28 #include "utilities/globalDefinitions.hpp" 29 #include "utilities/macros.hpp" 30 31 // Sets the default values for platform dependent flags used by the runtime system. 32 // (see globals.hpp) 33 34 define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks 35 define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86. 36 define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast 37 38 define_pd_global(uintx, CodeCacheSegmentSize, 64 TIERED_ONLY(+64)); // Tiered compilation has large code-entry alignment. 39 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't 40 // assign a different value for C2 without touching a number of files. Use 41 // #ifdef to minimize the change as it's late in Mantis. -- FIXME. 42 // c1 doesn't have this problem because the fix to 4858033 assures us 43 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns 44 // the uep and the vep doesn't get real alignment but just slops on by 45 // only assured that the entry instruction meets the 5 byte size requirement. 46 #if COMPILER2_OR_JVMCI 47 define_pd_global(intx, CodeEntryAlignment, 32); 48 #else 49 define_pd_global(intx, CodeEntryAlignment, 16); 50 #endif // COMPILER2_OR_JVMCI 51 define_pd_global(intx, OptoLoopAlignment, 16); 52 define_pd_global(intx, InlineFrequencyCount, 100); 53 define_pd_global(intx, InlineSmallCode, 1000); 54 55 #define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3)) 56 #define DEFAULT_STACK_RED_PAGES (1) 57 #define DEFAULT_STACK_RESERVED_PAGES (NOT_WINDOWS(1) WINDOWS_ONLY(0)) 58 59 #define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES 60 #define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES 61 #define MIN_STACK_RESERVED_PAGES (0) 62 63 #ifdef _LP64 64 // Java_java_net_SocketOutputStream_socketWrite0() uses a 64k buffer on the 65 // stack if compiled for unix and LP64. To pass stack overflow tests we need 66 // 20 shadow pages. 67 #define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(7) DEBUG_ONLY(+2)) 68 // For those clients that do not use write socket, we allow 69 // the min range value to be below that of the default 70 #define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(7) DEBUG_ONLY(+2)) 71 #else 72 #define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5)) 73 #define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES 74 #endif // _LP64 75 76 define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES); 77 define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES); 78 define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES); 79 define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES); 80 81 define_pd_global(bool, RewriteBytecodes, true); 82 define_pd_global(bool, RewriteFrequentPairs, true); 83 84 define_pd_global(uintx, TypeProfileLevel, 111); 85 86 define_pd_global(bool, CompactStrings, true); 87 88 define_pd_global(bool, PreserveFramePointer, false); 89 90 define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong); 91 92 #include "runtime/flags/jvmFlag.hpp" 93 DEVELOP_FLAG(bool, IEEEPrecision, true, JVMFlag::DEFAULT, 94 "Enables IEEE precision (for INTEL only)"); 95 96 PRODUCT_FLAG(bool, UseStoreImmI16, true, JVMFlag::DEFAULT, 97 "Use store immediate 16-bits value instruction on x86"); 98 99 PRODUCT_FLAG(intx, UseSSE, 99, JVMFlag::RANGE, 100 "Highest supported SSE instructions set on x86/x64"); 101 FLAG_RANGE( UseSSE, 0, 99); 102 103 PRODUCT_FLAG(intx, UseAVX, 3, JVMFlag::RANGE, 104 "Highest supported AVX instructions set on x86/x64"); 105 FLAG_RANGE( UseAVX, 0, 99); 106 107 PRODUCT_FLAG(bool, UseCLMUL, false, JVMFlag::DEFAULT, 108 "Control whether CLMUL instructions can be used on x86/x64"); 109 110 PRODUCT_FLAG(bool, UseIncDec, true, JVMFlag::DIAGNOSTIC, 111 "Use INC, DEC instructions on x86"); 112 113 PRODUCT_FLAG(bool, UseNewLongLShift, false, JVMFlag::DEFAULT, 114 "Use optimized bitwise shift left"); 115 116 PRODUCT_FLAG(bool, UseAddressNop, false, JVMFlag::DEFAULT, 117 "Use '0F 1F [addr]' NOP instructions on x86 cpus"); 118 119 PRODUCT_FLAG(bool, UseXmmLoadAndClearUpper, true, JVMFlag::DEFAULT, 120 "Load low part of XMM register and clear upper part"); 121 122 PRODUCT_FLAG(bool, UseXmmRegToRegMoveAll, false, JVMFlag::DEFAULT, 123 "Copy all XMM register bits when moving value between registers"); 124 125 PRODUCT_FLAG(bool, UseXmmI2D, false, JVMFlag::DEFAULT, 126 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double"); 127 128 PRODUCT_FLAG(bool, UseXmmI2F, false, JVMFlag::DEFAULT, 129 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float"); 130 131 PRODUCT_FLAG(bool, UseUnalignedLoadStores, false, JVMFlag::DEFAULT, 132 "Use SSE2 MOVDQU instruction for Arraycopy"); 133 134 PRODUCT_FLAG(bool, UseXMMForObjInit, false, JVMFlag::DEFAULT, 135 "Use XMM/YMM MOVDQU instruction for Object Initialization"); 136 137 PRODUCT_FLAG(bool, UseFastStosb, false, JVMFlag::DEFAULT, 138 "Use fast-string operation for zeroing: rep stosb"); 139 140 141 // Use Restricted Transactional Memory for lock eliding 142 PRODUCT_FLAG(bool, UseRTMLocking, false, JVMFlag::DEFAULT, 143 "Enable RTM lock eliding for inflated locks in compiled code"); 144 145 PRODUCT_FLAG(bool, UseRTMForStackLocks, false, JVMFlag::EXPERIMENTAL, 146 "Enable RTM lock eliding for stack locks in compiled code"); 147 148 PRODUCT_FLAG(bool, UseRTMDeopt, false, JVMFlag::DEFAULT, 149 "Perform deopt and recompilation based on RTM abort ratio"); 150 151 PRODUCT_FLAG(int, RTMRetryCount, 5, JVMFlag::RANGE, 152 "Number of RTM retries on lock abort or busy"); 153 FLAG_RANGE( RTMRetryCount, 0, max_jint); 154 155 PRODUCT_FLAG(int, RTMSpinLoopCount, 100, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 156 "Spin count for lock to become free before RTM retry"); 157 FLAG_RANGE( RTMSpinLoopCount, 0, max_jint); 158 159 PRODUCT_FLAG(int, RTMAbortThreshold, 1000, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 160 "Calculate abort ratio after this number of aborts"); 161 FLAG_RANGE( RTMAbortThreshold, 0, max_jint); 162 163 PRODUCT_FLAG(int, RTMLockingThreshold, 10000, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 164 "Lock count at which to do RTM lock eliding without " 165 "abort ratio calculation"); 166 FLAG_RANGE( RTMLockingThreshold, 0, max_jint); 167 168 PRODUCT_FLAG(int, RTMAbortRatio, 50, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 169 "Lock abort ratio at which to stop use RTM lock eliding"); 170 FLAG_RANGE( RTMAbortRatio, 0, 100); 171 172 PRODUCT_FLAG(int, RTMTotalCountIncrRate, 64, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE | JVMFlag::CONSTRAINT, 173 "Increment total RTM attempted lock count once every n times"); 174 FLAG_RANGE( RTMTotalCountIncrRate, 1, max_jint); 175 FLAG_CONSTRAINT( RTMTotalCountIncrRate, (void*)RTMTotalCountIncrRateConstraintFunc, JVMFlag::AfterErgo); 176 177 PRODUCT_FLAG(intx, RTMLockingCalculationDelay, 0, JVMFlag::EXPERIMENTAL, 178 "Number of milliseconds to wait before start calculating aborts " 179 "for RTM locking"); 180 181 PRODUCT_FLAG(bool, UseRTMXendForLockBusy, true, JVMFlag::EXPERIMENTAL, 182 "Use RTM Xend instead of Xabort when lock busy"); 183 184 185 // assembler 186 PRODUCT_FLAG(bool, UseCountLeadingZerosInstruction, false, JVMFlag::DEFAULT, 187 "Use count leading zeros instruction"); 188 189 PRODUCT_FLAG(bool, UseCountTrailingZerosInstruction, false, JVMFlag::DEFAULT, 190 "Use count trailing zeros instruction"); 191 192 PRODUCT_FLAG(bool, UseSSE42Intrinsics, false, JVMFlag::DEFAULT, 193 "SSE4.2 versions of intrinsics"); 194 195 PRODUCT_FLAG(bool, UseBMI1Instructions, false, JVMFlag::DEFAULT, 196 "Use BMI1 instructions"); 197 198 PRODUCT_FLAG(bool, UseBMI2Instructions, false, JVMFlag::DEFAULT, 199 "Use BMI2 instructions"); 200 201 PRODUCT_FLAG(bool, UseLibmIntrinsic, true, JVMFlag::DIAGNOSTIC, 202 "Use Libm Intrinsics"); 203 204 205 // Minimum array size in bytes to use AVX512 intrinsics 206 // for copy, inflate and fill which don't bail out early based on any 207 // condition. When this value is set to zero compare operations like 208 // compare, vectorizedMismatch, compress can also use AVX512 intrinsics. 209 PRODUCT_FLAG(int, AVX3Threshold, 4096, JVMFlag::DIAGNOSTIC | JVMFlag::RANGE, 210 "Minimum array size in bytes to use AVX512 intrinsics" 211 "for copy, inflate and fill. When this value is set as zero" 212 "compare operations can also use AVX512 intrinsics."); 213 FLAG_RANGE( AVX3Threshold, 0, max_jint); 214 215 PRODUCT_FLAG(bool, IntelJccErratumMitigation, true, JVMFlag::DIAGNOSTIC, 216 "Turn off JVM mitigations related to Intel micro code " 217 "mitigations for the Intel JCC erratum"); 218 #endif // CPU_X86_GLOBALS_X86_HPP