72 #define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5)) 73 #define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES 74 #endif // _LP64 75 76 define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES); 77 define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES); 78 define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES); 79 define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES); 80 81 define_pd_global(bool, RewriteBytecodes, true); 82 define_pd_global(bool, RewriteFrequentPairs, true); 83 84 define_pd_global(uintx, TypeProfileLevel, 111); 85 86 define_pd_global(bool, CompactStrings, true); 87 88 define_pd_global(bool, PreserveFramePointer, false); 89 90 define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong); 91 92 #define ARCH_FLAGS(develop, \ 93 product, \ 94 diagnostic, \ 95 experimental, \ 96 notproduct, \ 97 range, \ 98 constraint) \ 99 \ 100 develop(bool, IEEEPrecision, true, \ 101 "Enables IEEE precision (for INTEL only)") \ 102 \ 103 product(bool, UseStoreImmI16, true, \ 104 "Use store immediate 16-bits value instruction on x86") \ 105 \ 106 product(intx, UseSSE, 99, \ 107 "Highest supported SSE instructions set on x86/x64") \ 108 range(0, 99) \ 109 \ 110 product(intx, UseAVX, 3, \ 111 "Highest supported AVX instructions set on x86/x64") \ 112 range(0, 99) \ 113 \ 114 product(bool, UseCLMUL, false, \ 115 "Control whether CLMUL instructions can be used on x86/x64") \ 116 \ 117 diagnostic(bool, UseIncDec, true, \ 118 "Use INC, DEC instructions on x86") \ 119 \ 120 product(bool, UseNewLongLShift, false, \ 121 "Use optimized bitwise shift left") \ 122 \ 123 product(bool, UseAddressNop, false, \ 124 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \ 125 \ 126 product(bool, UseXmmLoadAndClearUpper, true, \ 127 "Load low part of XMM register and clear upper part") \ 128 \ 129 product(bool, UseXmmRegToRegMoveAll, false, \ 130 "Copy all XMM register bits when moving value between registers") \ 131 \ 132 product(bool, UseXmmI2D, false, \ 133 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \ 134 \ 135 product(bool, UseXmmI2F, false, \ 136 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \ 137 \ 138 product(bool, UseUnalignedLoadStores, false, \ 139 "Use SSE2 MOVDQU instruction for Arraycopy") \ 140 \ 141 product(bool, UseXMMForObjInit, false, \ 142 "Use XMM/YMM MOVDQU instruction for Object Initialization") \ 143 \ 144 product(bool, UseFastStosb, false, \ 145 "Use fast-string operation for zeroing: rep stosb") \ 146 \ 147 /* Use Restricted Transactional Memory for lock eliding */ \ 148 product(bool, UseRTMLocking, false, \ 149 "Enable RTM lock eliding for inflated locks in compiled code") \ 150 \ 151 experimental(bool, UseRTMForStackLocks, false, \ 152 "Enable RTM lock eliding for stack locks in compiled code") \ 153 \ 154 product(bool, UseRTMDeopt, false, \ 155 "Perform deopt and recompilation based on RTM abort ratio") \ 156 \ 157 product(int, RTMRetryCount, 5, \ 158 "Number of RTM retries on lock abort or busy") \ 159 range(0, max_jint) \ 160 \ 161 experimental(int, RTMSpinLoopCount, 100, \ 162 "Spin count for lock to become free before RTM retry") \ 163 range(0, max_jint) \ 164 \ 165 experimental(int, RTMAbortThreshold, 1000, \ 166 "Calculate abort ratio after this number of aborts") \ 167 range(0, max_jint) \ 168 \ 169 experimental(int, RTMLockingThreshold, 10000, \ 170 "Lock count at which to do RTM lock eliding without " \ 171 "abort ratio calculation") \ 172 range(0, max_jint) \ 173 \ 174 experimental(int, RTMAbortRatio, 50, \ 175 "Lock abort ratio at which to stop use RTM lock eliding") \ 176 range(0, 100) /* natural range */ \ 177 \ 178 experimental(int, RTMTotalCountIncrRate, 64, \ 179 "Increment total RTM attempted lock count once every n times") \ 180 range(1, max_jint) \ 181 constraint(RTMTotalCountIncrRateConstraintFunc,AfterErgo) \ 182 \ 183 experimental(intx, RTMLockingCalculationDelay, 0, \ 184 "Number of milliseconds to wait before start calculating aborts " \ 185 "for RTM locking") \ 186 \ 187 experimental(bool, UseRTMXendForLockBusy, true, \ 188 "Use RTM Xend instead of Xabort when lock busy") \ 189 \ 190 /* assembler */ \ 191 product(bool, UseCountLeadingZerosInstruction, false, \ 192 "Use count leading zeros instruction") \ 193 \ 194 product(bool, UseCountTrailingZerosInstruction, false, \ 195 "Use count trailing zeros instruction") \ 196 \ 197 product(bool, UseSSE42Intrinsics, false, \ 198 "SSE4.2 versions of intrinsics") \ 199 \ 200 product(bool, UseBMI1Instructions, false, \ 201 "Use BMI1 instructions") \ 202 \ 203 product(bool, UseBMI2Instructions, false, \ 204 "Use BMI2 instructions") \ 205 \ 206 diagnostic(bool, UseLibmIntrinsic, true, \ 207 "Use Libm Intrinsics") \ 208 \ 209 /* Minimum array size in bytes to use AVX512 intrinsics */ \ 210 /* for copy, inflate and fill which don't bail out early based on any */ \ 211 /* condition. When this value is set to zero compare operations like */ \ 212 /* compare, vectorizedMismatch, compress can also use AVX512 intrinsics.*/\ 213 diagnostic(int, AVX3Threshold, 4096, \ 214 "Minimum array size in bytes to use AVX512 intrinsics" \ 215 "for copy, inflate and fill. When this value is set as zero" \ 216 "compare operations can also use AVX512 intrinsics.") \ 217 range(0, max_jint) \ 218 \ 219 diagnostic(bool, IntelJccErratumMitigation, true, \ 220 "Turn off JVM mitigations related to Intel micro code " \ 221 "mitigations for the Intel JCC erratum") 222 223 #endif // CPU_X86_GLOBALS_X86_HPP | 72 #define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5)) 73 #define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES 74 #endif // _LP64 75 76 define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES); 77 define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES); 78 define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES); 79 define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES); 80 81 define_pd_global(bool, RewriteBytecodes, true); 82 define_pd_global(bool, RewriteFrequentPairs, true); 83 84 define_pd_global(uintx, TypeProfileLevel, 111); 85 86 define_pd_global(bool, CompactStrings, true); 87 88 define_pd_global(bool, PreserveFramePointer, false); 89 90 define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong); 91 92 #include "runtime/flags/jvmFlag.hpp" 93 DEVELOP_FLAG(bool, IEEEPrecision, true, JVMFlag::DEFAULT, 94 "Enables IEEE precision (for INTEL only)"); 95 96 PRODUCT_FLAG(bool, UseStoreImmI16, true, JVMFlag::DEFAULT, 97 "Use store immediate 16-bits value instruction on x86"); 98 99 PRODUCT_FLAG(intx, UseSSE, 99, JVMFlag::RANGE, 100 "Highest supported SSE instructions set on x86/x64"); 101 FLAG_RANGE( UseSSE, 0, 99); 102 103 PRODUCT_FLAG(intx, UseAVX, 3, JVMFlag::RANGE, 104 "Highest supported AVX instructions set on x86/x64"); 105 FLAG_RANGE( UseAVX, 0, 99); 106 107 PRODUCT_FLAG(bool, UseCLMUL, false, JVMFlag::DEFAULT, 108 "Control whether CLMUL instructions can be used on x86/x64"); 109 110 PRODUCT_FLAG(bool, UseIncDec, true, JVMFlag::DIAGNOSTIC, 111 "Use INC, DEC instructions on x86"); 112 113 PRODUCT_FLAG(bool, UseNewLongLShift, false, JVMFlag::DEFAULT, 114 "Use optimized bitwise shift left"); 115 116 PRODUCT_FLAG(bool, UseAddressNop, false, JVMFlag::DEFAULT, 117 "Use '0F 1F [addr]' NOP instructions on x86 cpus"); 118 119 PRODUCT_FLAG(bool, UseXmmLoadAndClearUpper, true, JVMFlag::DEFAULT, 120 "Load low part of XMM register and clear upper part"); 121 122 PRODUCT_FLAG(bool, UseXmmRegToRegMoveAll, false, JVMFlag::DEFAULT, 123 "Copy all XMM register bits when moving value between registers"); 124 125 PRODUCT_FLAG(bool, UseXmmI2D, false, JVMFlag::DEFAULT, 126 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double"); 127 128 PRODUCT_FLAG(bool, UseXmmI2F, false, JVMFlag::DEFAULT, 129 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float"); 130 131 PRODUCT_FLAG(bool, UseUnalignedLoadStores, false, JVMFlag::DEFAULT, 132 "Use SSE2 MOVDQU instruction for Arraycopy"); 133 134 PRODUCT_FLAG(bool, UseXMMForObjInit, false, JVMFlag::DEFAULT, 135 "Use XMM/YMM MOVDQU instruction for Object Initialization"); 136 137 PRODUCT_FLAG(bool, UseFastStosb, false, JVMFlag::DEFAULT, 138 "Use fast-string operation for zeroing: rep stosb"); 139 140 141 // Use Restricted Transactional Memory for lock eliding 142 PRODUCT_FLAG(bool, UseRTMLocking, false, JVMFlag::DEFAULT, 143 "Enable RTM lock eliding for inflated locks in compiled code"); 144 145 PRODUCT_FLAG(bool, UseRTMForStackLocks, false, JVMFlag::EXPERIMENTAL, 146 "Enable RTM lock eliding for stack locks in compiled code"); 147 148 PRODUCT_FLAG(bool, UseRTMDeopt, false, JVMFlag::DEFAULT, 149 "Perform deopt and recompilation based on RTM abort ratio"); 150 151 PRODUCT_FLAG(int, RTMRetryCount, 5, JVMFlag::RANGE, 152 "Number of RTM retries on lock abort or busy"); 153 FLAG_RANGE( RTMRetryCount, 0, max_jint); 154 155 PRODUCT_FLAG(int, RTMSpinLoopCount, 100, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 156 "Spin count for lock to become free before RTM retry"); 157 FLAG_RANGE( RTMSpinLoopCount, 0, max_jint); 158 159 PRODUCT_FLAG(int, RTMAbortThreshold, 1000, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 160 "Calculate abort ratio after this number of aborts"); 161 FLAG_RANGE( RTMAbortThreshold, 0, max_jint); 162 163 PRODUCT_FLAG(int, RTMLockingThreshold, 10000, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 164 "Lock count at which to do RTM lock eliding without " 165 "abort ratio calculation"); 166 FLAG_RANGE( RTMLockingThreshold, 0, max_jint); 167 168 PRODUCT_FLAG(int, RTMAbortRatio, 50, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE, 169 "Lock abort ratio at which to stop use RTM lock eliding"); 170 FLAG_RANGE( RTMAbortRatio, 0, 100); 171 172 PRODUCT_FLAG(int, RTMTotalCountIncrRate, 64, JVMFlag::EXPERIMENTAL | JVMFlag::RANGE | JVMFlag::CONSTRAINT, 173 "Increment total RTM attempted lock count once every n times"); 174 FLAG_RANGE( RTMTotalCountIncrRate, 1, max_jint); 175 FLAG_CONSTRAINT( RTMTotalCountIncrRate, (void*)RTMTotalCountIncrRateConstraintFunc, JVMFlag::AfterErgo); 176 177 PRODUCT_FLAG(intx, RTMLockingCalculationDelay, 0, JVMFlag::EXPERIMENTAL, 178 "Number of milliseconds to wait before start calculating aborts " 179 "for RTM locking"); 180 181 PRODUCT_FLAG(bool, UseRTMXendForLockBusy, true, JVMFlag::EXPERIMENTAL, 182 "Use RTM Xend instead of Xabort when lock busy"); 183 184 185 // assembler 186 PRODUCT_FLAG(bool, UseCountLeadingZerosInstruction, false, JVMFlag::DEFAULT, 187 "Use count leading zeros instruction"); 188 189 PRODUCT_FLAG(bool, UseCountTrailingZerosInstruction, false, JVMFlag::DEFAULT, 190 "Use count trailing zeros instruction"); 191 192 PRODUCT_FLAG(bool, UseSSE42Intrinsics, false, JVMFlag::DEFAULT, 193 "SSE4.2 versions of intrinsics"); 194 195 PRODUCT_FLAG(bool, UseBMI1Instructions, false, JVMFlag::DEFAULT, 196 "Use BMI1 instructions"); 197 198 PRODUCT_FLAG(bool, UseBMI2Instructions, false, JVMFlag::DEFAULT, 199 "Use BMI2 instructions"); 200 201 PRODUCT_FLAG(bool, UseLibmIntrinsic, true, JVMFlag::DIAGNOSTIC, 202 "Use Libm Intrinsics"); 203 204 205 // Minimum array size in bytes to use AVX512 intrinsics 206 // for copy, inflate and fill which don't bail out early based on any 207 // condition. When this value is set to zero compare operations like 208 // compare, vectorizedMismatch, compress can also use AVX512 intrinsics. 209 PRODUCT_FLAG(int, AVX3Threshold, 4096, JVMFlag::DIAGNOSTIC | JVMFlag::RANGE, 210 "Minimum array size in bytes to use AVX512 intrinsics" 211 "for copy, inflate and fill. When this value is set as zero" 212 "compare operations can also use AVX512 intrinsics."); 213 FLAG_RANGE( AVX3Threshold, 0, max_jint); 214 215 PRODUCT_FLAG(bool, IntelJccErratumMitigation, true, JVMFlag::DIAGNOSTIC, 216 "Turn off JVM mitigations related to Intel micro code " 217 "mitigations for the Intel JCC erratum"); 218 #endif // CPU_X86_GLOBALS_X86_HPP |