1 /*
   2  * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "ci/ciValueKlass.hpp"
  37 #include "gc/shared/c1/barrierSetC1.hpp"
  38 #include "runtime/sharedRuntime.hpp"
  39 #include "runtime/stubRoutines.hpp"
  40 #include "vmreg_x86.inline.hpp"
  41 
  42 #ifdef ASSERT
  43 #define __ gen()->lir(__FILE__, __LINE__)->
  44 #else
  45 #define __ gen()->lir()->
  46 #endif
  47 
  48 // Item will be loaded into a byte register; Intel only
  49 void LIRItem::load_byte_item() {
  50   load_item();
  51   LIR_Opr res = result();
  52 
  53   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  54     // make sure that it is a byte register
  55     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  56            "can't load floats in byte register");
  57     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  58     __ move(res, reg);
  59 
  60     _result = reg;
  61   }
  62 }
  63 
  64 
  65 void LIRItem::load_nonconstant() {
  66   LIR_Opr r = value()->operand();
  67   if (r->is_constant()) {
  68     _result = r;
  69   } else {
  70     load_item();
  71   }
  72 }
  73 
  74 //--------------------------------------------------------------
  75 //               LIRGenerator
  76 //--------------------------------------------------------------
  77 
  78 
  79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  80 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  81 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  82 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  83 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  84 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  85 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  86 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  87 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  88 
  89 
  90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  91   LIR_Opr opr;
  92   switch (type->tag()) {
  93     case intTag:     opr = FrameMap::rax_opr;          break;
  94     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  95     case longTag:    opr = FrameMap::long0_opr;        break;
  96     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  97     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  98 
  99     case addressTag:
 100     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 101   }
 102 
 103   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 104   return opr;
 105 }
 106 
 107 
 108 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 109   LIR_Opr reg = new_register(T_INT);
 110   set_vreg_flag(reg, LIRGenerator::byte_reg);
 111   return reg;
 112 }
 113 
 114 
 115 //--------- loading items into registers --------------------------------
 116 
 117 
 118 // i486 instructions can inline constants
 119 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 120   if (type == T_SHORT || type == T_CHAR) {
 121     // there is no immediate move of word values in asembler_i486.?pp
 122     return false;
 123   }
 124   Constant* c = v->as_Constant();
 125   if (c && c->state_before() == NULL) {
 126     // constants of any type can be stored directly, except for
 127     // unloaded object constants.
 128     return true;
 129   }
 130   return false;
 131 }
 132 
 133 
 134 bool LIRGenerator::can_inline_as_constant(Value v) const {
 135   if (v->type()->tag() == longTag) return false;
 136   return v->type()->tag() != objectTag ||
 137     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 138 }
 139 
 140 
 141 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 142   if (c->type() == T_LONG) return false;
 143   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 144 }
 145 
 146 
 147 LIR_Opr LIRGenerator::safepoint_poll_register() {
 148   NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
 149   return LIR_OprFact::illegalOpr;
 150 }
 151 
 152 
 153 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 154                                             int shift, int disp, BasicType type) {
 155   assert(base->is_register(), "must be");
 156   if (index->is_constant()) {
 157     LIR_Const *constant = index->as_constant_ptr();
 158 #ifdef _LP64
 159     jlong c;
 160     if (constant->type() == T_INT) {
 161       c = (jlong(index->as_jint()) << shift) + disp;
 162     } else {
 163       assert(constant->type() == T_LONG, "should be");
 164       c = (index->as_jlong() << shift) + disp;
 165     }
 166     if ((jlong)((jint)c) == c) {
 167       return new LIR_Address(base, (jint)c, type);
 168     } else {
 169       LIR_Opr tmp = new_register(T_LONG);
 170       __ move(index, tmp);
 171       return new LIR_Address(base, tmp, type);
 172     }
 173 #else
 174     return new LIR_Address(base,
 175                            ((intx)(constant->as_jint()) << shift) + disp,
 176                            type);
 177 #endif
 178   } else {
 179     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 180   }
 181 }
 182 
 183 
 184 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 185                                               BasicType type) {
 186   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 187 
 188   LIR_Address* addr;
 189   if (index_opr->is_constant()) {
 190     int elem_size = type2aelembytes(type);
 191     addr = new LIR_Address(array_opr,
 192                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 193   } else {
 194 #ifdef _LP64
 195     if (index_opr->type() == T_INT) {
 196       LIR_Opr tmp = new_register(T_LONG);
 197       __ convert(Bytecodes::_i2l, index_opr, tmp);
 198       index_opr = tmp;
 199     }
 200 #endif // _LP64
 201     addr =  new LIR_Address(array_opr,
 202                             index_opr,
 203                             LIR_Address::scale(type),
 204                             offset_in_bytes, type);
 205   }
 206   return addr;
 207 }
 208 
 209 
 210 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 211   LIR_Opr r = NULL;
 212   if (type == T_LONG) {
 213     r = LIR_OprFact::longConst(x);
 214   } else if (type == T_INT) {
 215     r = LIR_OprFact::intConst(x);
 216   } else {
 217     ShouldNotReachHere();
 218   }
 219   return r;
 220 }
 221 
 222 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 223   LIR_Opr pointer = new_pointer_register();
 224   __ move(LIR_OprFact::intptrConst(counter), pointer);
 225   LIR_Address* addr = new LIR_Address(pointer, type);
 226   increment_counter(addr, step);
 227 }
 228 
 229 
 230 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 231   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 232 }
 233 
 234 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 235   __ cmp_mem_int(condition, base, disp, c, info);
 236 }
 237 
 238 
 239 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 240   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 241 }
 242 
 243 
 244 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 245   if (tmp->is_valid() && c > 0 && c < max_jint) {
 246     if (is_power_of_2(c + 1)) {
 247       __ move(left, tmp);
 248       __ shift_left(left, log2_jint(c + 1), left);
 249       __ sub(left, tmp, result);
 250       return true;
 251     } else if (is_power_of_2(c - 1)) {
 252       __ move(left, tmp);
 253       __ shift_left(left, log2_jint(c - 1), left);
 254       __ add(left, tmp, result);
 255       return true;
 256     }
 257   }
 258   return false;
 259 }
 260 
 261 
 262 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 263   BasicType type = item->type();
 264   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 265 }
 266 
 267 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 268   LIR_Opr tmp1 = new_register(objectType);
 269   LIR_Opr tmp2 = new_register(objectType);
 270   LIR_Opr tmp3 = new_register(objectType);
 271   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 272 }
 273 
 274 //----------------------------------------------------------------------
 275 //             visitor functions
 276 //----------------------------------------------------------------------
 277 
 278 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 279   assert(x->is_pinned(),"");
 280   LIRItem obj(x->obj(), this);
 281   obj.load_item();
 282 
 283   set_no_result(x);
 284 
 285   // "lock" stores the address of the monitor stack slot, so this is not an oop
 286   LIR_Opr lock = new_register(T_INT);
 287   // Need a scratch register for biased locking on x86
 288   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 289   if (UseBiasedLocking) {
 290     scratch = new_register(T_INT);
 291   }
 292 
 293   CodeEmitInfo* info_for_exception = NULL;
 294   if (x->needs_null_check()) {
 295     info_for_exception = state_for(x);
 296   }
 297   // this CodeEmitInfo must not have the xhandlers because here the
 298   // object is already locked (xhandlers expect object to be unlocked)
 299   CodeEmitInfo* info = state_for(x, x->state(), true);
 300   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 301                         x->monitor_no(), info_for_exception, info);
 302 }
 303 
 304 
 305 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 306   assert(x->is_pinned(),"");
 307 
 308   LIRItem obj(x->obj(), this);
 309   obj.dont_load_item();
 310 
 311   LIR_Opr lock = new_register(T_INT);
 312   LIR_Opr obj_temp = new_register(T_INT);
 313   set_no_result(x);
 314   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 315 }
 316 
 317 
 318 // _ineg, _lneg, _fneg, _dneg
 319 void LIRGenerator::do_NegateOp(NegateOp* x) {
 320   LIRItem value(x->x(), this);
 321   value.set_destroys_register();
 322   value.load_item();
 323   LIR_Opr reg = rlock(x);
 324 
 325   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 326 #ifdef _LP64
 327   if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
 328     if (x->type()->tag() == doubleTag) {
 329       tmp = new_register(T_DOUBLE);
 330       __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 331     }
 332     else if (x->type()->tag() == floatTag) {
 333       tmp = new_register(T_FLOAT);
 334       __ move(LIR_OprFact::floatConst(-0.0), tmp);
 335     }
 336   }
 337 #endif
 338   __ negate(value.result(), reg, tmp);
 339 
 340   set_result(x, round_item(reg));
 341 }
 342 
 343 
 344 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 345 //      _dadd, _dmul, _dsub, _ddiv, _drem
 346 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 347   LIRItem left(x->x(),  this);
 348   LIRItem right(x->y(), this);
 349   LIRItem* left_arg  = &left;
 350   LIRItem* right_arg = &right;
 351   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 352   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 353   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 354     left.load_item();
 355   } else {
 356     left.dont_load_item();
 357   }
 358 
 359   // do not load right operand if it is a constant.  only 0 and 1 are
 360   // loaded because there are special instructions for loading them
 361   // without memory access (not needed for SSE2 instructions)
 362   bool must_load_right = false;
 363   if (right.is_constant()) {
 364     LIR_Const* c = right.result()->as_constant_ptr();
 365     assert(c != NULL, "invalid constant");
 366     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 367 
 368     if (c->type() == T_FLOAT) {
 369       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 370     } else {
 371       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 372     }
 373   }
 374 
 375   if (must_load_both) {
 376     // frem and drem destroy also right operand, so move it to a new register
 377     right.set_destroys_register();
 378     right.load_item();
 379   } else if (right.is_register() || must_load_right) {
 380     right.load_item();
 381   } else {
 382     right.dont_load_item();
 383   }
 384   LIR_Opr reg = rlock(x);
 385   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 386   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 387     tmp = new_register(T_DOUBLE);
 388   }
 389 
 390   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 391     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 392     LIR_Opr fpu0, fpu1;
 393     if (x->op() == Bytecodes::_frem) {
 394       fpu0 = LIR_OprFact::single_fpu(0);
 395       fpu1 = LIR_OprFact::single_fpu(1);
 396     } else {
 397       fpu0 = LIR_OprFact::double_fpu(0);
 398       fpu1 = LIR_OprFact::double_fpu(1);
 399     }
 400     __ move(right.result(), fpu1); // order of left and right operand is important!
 401     __ move(left.result(), fpu0);
 402     __ rem (fpu0, fpu1, fpu0);
 403     __ move(fpu0, reg);
 404 
 405   } else {
 406     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 407   }
 408 
 409   set_result(x, round_item(reg));
 410 }
 411 
 412 
 413 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 414 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 415   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 416     // long division is implemented as a direct call into the runtime
 417     LIRItem left(x->x(), this);
 418     LIRItem right(x->y(), this);
 419 
 420     // the check for division by zero destroys the right operand
 421     right.set_destroys_register();
 422 
 423     BasicTypeList signature(2);
 424     signature.append(T_LONG);
 425     signature.append(T_LONG);
 426     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 427 
 428     // check for division by zero (destroys registers of right operand!)
 429     CodeEmitInfo* info = state_for(x);
 430 
 431     const LIR_Opr result_reg = result_register_for(x->type());
 432     left.load_item_force(cc->at(1));
 433     right.load_item();
 434 
 435     __ move(right.result(), cc->at(0));
 436 
 437     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 438     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 439 
 440     address entry = NULL;
 441     switch (x->op()) {
 442     case Bytecodes::_lrem:
 443       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 444       break; // check if dividend is 0 is done elsewhere
 445     case Bytecodes::_ldiv:
 446       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 447       break; // check if dividend is 0 is done elsewhere
 448     case Bytecodes::_lmul:
 449       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 450       break;
 451     default:
 452       ShouldNotReachHere();
 453     }
 454 
 455     LIR_Opr result = rlock_result(x);
 456     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 457     __ move(result_reg, result);
 458   } else if (x->op() == Bytecodes::_lmul) {
 459     // missing test if instr is commutative and if we should swap
 460     LIRItem left(x->x(), this);
 461     LIRItem right(x->y(), this);
 462 
 463     // right register is destroyed by the long mul, so it must be
 464     // copied to a new register.
 465     right.set_destroys_register();
 466 
 467     left.load_item();
 468     right.load_item();
 469 
 470     LIR_Opr reg = FrameMap::long0_opr;
 471     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 472     LIR_Opr result = rlock_result(x);
 473     __ move(reg, result);
 474   } else {
 475     // missing test if instr is commutative and if we should swap
 476     LIRItem left(x->x(), this);
 477     LIRItem right(x->y(), this);
 478 
 479     left.load_item();
 480     // don't load constants to save register
 481     right.load_nonconstant();
 482     rlock_result(x);
 483     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 484   }
 485 }
 486 
 487 
 488 
 489 // for: _iadd, _imul, _isub, _idiv, _irem
 490 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 491   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 492     // The requirements for division and modulo
 493     // input : rax,: dividend                         min_int
 494     //         reg: divisor   (may not be rax,/rdx)   -1
 495     //
 496     // output: rax,: quotient  (= rax, idiv reg)       min_int
 497     //         rdx: remainder (= rax, irem reg)       0
 498 
 499     // rax, and rdx will be destroyed
 500 
 501     // Note: does this invalidate the spec ???
 502     LIRItem right(x->y(), this);
 503     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 504 
 505     // call state_for before load_item_force because state_for may
 506     // force the evaluation of other instructions that are needed for
 507     // correct debug info.  Otherwise the live range of the fix
 508     // register might be too long.
 509     CodeEmitInfo* info = state_for(x);
 510 
 511     left.load_item_force(divInOpr());
 512 
 513     right.load_item();
 514 
 515     LIR_Opr result = rlock_result(x);
 516     LIR_Opr result_reg;
 517     if (x->op() == Bytecodes::_idiv) {
 518       result_reg = divOutOpr();
 519     } else {
 520       result_reg = remOutOpr();
 521     }
 522 
 523     if (!ImplicitDiv0Checks) {
 524       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 525       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 526       // Idiv/irem cannot trap (passing info would generate an assertion).
 527       info = NULL;
 528     }
 529     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 530     if (x->op() == Bytecodes::_irem) {
 531       __ irem(left.result(), right.result(), result_reg, tmp, info);
 532     } else if (x->op() == Bytecodes::_idiv) {
 533       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 534     } else {
 535       ShouldNotReachHere();
 536     }
 537 
 538     __ move(result_reg, result);
 539   } else {
 540     // missing test if instr is commutative and if we should swap
 541     LIRItem left(x->x(),  this);
 542     LIRItem right(x->y(), this);
 543     LIRItem* left_arg = &left;
 544     LIRItem* right_arg = &right;
 545     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 546       // swap them if left is real stack (or cached) and right is real register(not cached)
 547       left_arg = &right;
 548       right_arg = &left;
 549     }
 550 
 551     left_arg->load_item();
 552 
 553     // do not need to load right, as we can handle stack and constants
 554     if (x->op() == Bytecodes::_imul ) {
 555       // check if we can use shift instead
 556       bool use_constant = false;
 557       bool use_tmp = false;
 558       if (right_arg->is_constant()) {
 559         jint iconst = right_arg->get_jint_constant();
 560         if (iconst > 0 && iconst < max_jint) {
 561           if (is_power_of_2(iconst)) {
 562             use_constant = true;
 563           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 564             use_constant = true;
 565             use_tmp = true;
 566           }
 567         }
 568       }
 569       if (use_constant) {
 570         right_arg->dont_load_item();
 571       } else {
 572         right_arg->load_item();
 573       }
 574       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 575       if (use_tmp) {
 576         tmp = new_register(T_INT);
 577       }
 578       rlock_result(x);
 579 
 580       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 581     } else {
 582       right_arg->dont_load_item();
 583       rlock_result(x);
 584       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 585       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 586     }
 587   }
 588 }
 589 
 590 
 591 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 592   // when an operand with use count 1 is the left operand, then it is
 593   // likely that no move for 2-operand-LIR-form is necessary
 594   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 595     x->swap_operands();
 596   }
 597 
 598   ValueTag tag = x->type()->tag();
 599   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 600   switch (tag) {
 601     case floatTag:
 602     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 603     case longTag:    do_ArithmeticOp_Long(x); return;
 604     case intTag:     do_ArithmeticOp_Int(x);  return;
 605     default:         ShouldNotReachHere();    return;
 606   }
 607 }
 608 
 609 
 610 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 611 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 612   // count must always be in rcx
 613   LIRItem value(x->x(), this);
 614   LIRItem count(x->y(), this);
 615 
 616   ValueTag elemType = x->type()->tag();
 617   bool must_load_count = !count.is_constant() || elemType == longTag;
 618   if (must_load_count) {
 619     // count for long must be in register
 620     count.load_item_force(shiftCountOpr());
 621   } else {
 622     count.dont_load_item();
 623   }
 624   value.load_item();
 625   LIR_Opr reg = rlock_result(x);
 626 
 627   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 628 }
 629 
 630 
 631 // _iand, _land, _ior, _lor, _ixor, _lxor
 632 void LIRGenerator::do_LogicOp(LogicOp* x) {
 633   // when an operand with use count 1 is the left operand, then it is
 634   // likely that no move for 2-operand-LIR-form is necessary
 635   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 636     x->swap_operands();
 637   }
 638 
 639   LIRItem left(x->x(), this);
 640   LIRItem right(x->y(), this);
 641 
 642   left.load_item();
 643   right.load_nonconstant();
 644   LIR_Opr reg = rlock_result(x);
 645 
 646   logic_op(x->op(), reg, left.result(), right.result());
 647 }
 648 
 649 
 650 
 651 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 652 void LIRGenerator::do_CompareOp(CompareOp* x) {
 653   LIRItem left(x->x(), this);
 654   LIRItem right(x->y(), this);
 655   ValueTag tag = x->x()->type()->tag();
 656   if (tag == longTag) {
 657     left.set_destroys_register();
 658   }
 659   left.load_item();
 660   right.load_item();
 661   LIR_Opr reg = rlock_result(x);
 662 
 663   if (x->x()->type()->is_float_kind()) {
 664     Bytecodes::Code code = x->op();
 665     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 666   } else if (x->x()->type()->tag() == longTag) {
 667     __ lcmp2int(left.result(), right.result(), reg);
 668   } else {
 669     Unimplemented();
 670   }
 671 }
 672 
 673 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 674   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 675   if (type == T_OBJECT || type == T_ARRAY) {
 676     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 677     new_value.load_item();
 678     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 679   } else if (type == T_INT) {
 680     cmp_value.load_item_force(FrameMap::rax_opr);
 681     new_value.load_item();
 682     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 683   } else if (type == T_LONG) {
 684     cmp_value.load_item_force(FrameMap::long0_opr);
 685     new_value.load_item_force(FrameMap::long1_opr);
 686     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 687   } else {
 688     Unimplemented();
 689   }
 690   LIR_Opr result = new_register(T_INT);
 691   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 692            result, T_INT);
 693   return result;
 694 }
 695 
 696 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 697   bool is_oop = type == T_OBJECT || type == T_ARRAY;
 698   LIR_Opr result = new_register(type);
 699   value.load_item();
 700   // Because we want a 2-arg form of xchg and xadd
 701   __ move(value.result(), result);
 702   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
 703   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 704   return result;
 705 }
 706 
 707 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 708   LIR_Opr result = new_register(type);
 709   value.load_item();
 710   // Because we want a 2-arg form of xchg and xadd
 711   __ move(value.result(), result);
 712   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 713   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 714   return result;
 715 }
 716 
 717 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 718   assert(x->number_of_arguments() == 3, "wrong type");
 719   assert(UseFMA, "Needs FMA instructions support.");
 720   LIRItem value(x->argument_at(0), this);
 721   LIRItem value1(x->argument_at(1), this);
 722   LIRItem value2(x->argument_at(2), this);
 723 
 724   value2.set_destroys_register();
 725 
 726   value.load_item();
 727   value1.load_item();
 728   value2.load_item();
 729 
 730   LIR_Opr calc_input = value.result();
 731   LIR_Opr calc_input1 = value1.result();
 732   LIR_Opr calc_input2 = value2.result();
 733   LIR_Opr calc_result = rlock_result(x);
 734 
 735   switch (x->id()) {
 736   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 737   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 738   default:                    ShouldNotReachHere();
 739   }
 740 
 741 }
 742 
 743 
 744 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 745   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 746 
 747   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 748       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 749       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 750       x->id() == vmIntrinsics::_dlog10) {
 751     do_LibmIntrinsic(x);
 752     return;
 753   }
 754 
 755   LIRItem value(x->argument_at(0), this);
 756 
 757   bool use_fpu = false;
 758   if (UseSSE < 2) {
 759     value.set_destroys_register();
 760   }
 761   value.load_item();
 762 
 763   LIR_Opr calc_input = value.result();
 764   LIR_Opr calc_result = rlock_result(x);
 765 
 766   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 767 #ifdef _LP64
 768   if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
 769       (x->id() == vmIntrinsics::_dabs)) {
 770     tmp = new_register(T_DOUBLE);
 771     __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 772   }
 773 #endif
 774 
 775   switch(x->id()) {
 776     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, tmp); break;
 777     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 778     default:                    ShouldNotReachHere();
 779   }
 780 
 781   if (use_fpu) {
 782     __ move(calc_result, x->operand());
 783   }
 784 }
 785 
 786 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 787   LIRItem value(x->argument_at(0), this);
 788   value.set_destroys_register();
 789 
 790   LIR_Opr calc_result = rlock_result(x);
 791   LIR_Opr result_reg = result_register_for(x->type());
 792 
 793   CallingConvention* cc = NULL;
 794 
 795   if (x->id() == vmIntrinsics::_dpow) {
 796     LIRItem value1(x->argument_at(1), this);
 797 
 798     value1.set_destroys_register();
 799 
 800     BasicTypeList signature(2);
 801     signature.append(T_DOUBLE);
 802     signature.append(T_DOUBLE);
 803     cc = frame_map()->c_calling_convention(&signature);
 804     value.load_item_force(cc->at(0));
 805     value1.load_item_force(cc->at(1));
 806   } else {
 807     BasicTypeList signature(1);
 808     signature.append(T_DOUBLE);
 809     cc = frame_map()->c_calling_convention(&signature);
 810     value.load_item_force(cc->at(0));
 811   }
 812 
 813 #ifndef _LP64
 814   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 815   result_reg = tmp;
 816   switch(x->id()) {
 817     case vmIntrinsics::_dexp:
 818       if (StubRoutines::dexp() != NULL) {
 819         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 820       } else {
 821         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 822       }
 823       break;
 824     case vmIntrinsics::_dlog:
 825       if (StubRoutines::dlog() != NULL) {
 826         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 827       } else {
 828         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 829       }
 830       break;
 831     case vmIntrinsics::_dlog10:
 832       if (StubRoutines::dlog10() != NULL) {
 833        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 834       } else {
 835         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 836       }
 837       break;
 838     case vmIntrinsics::_dpow:
 839       if (StubRoutines::dpow() != NULL) {
 840         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 841       } else {
 842         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 843       }
 844       break;
 845     case vmIntrinsics::_dsin:
 846       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 847         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 848       } else {
 849         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 850       }
 851       break;
 852     case vmIntrinsics::_dcos:
 853       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 854         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 855       } else {
 856         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 857       }
 858       break;
 859     case vmIntrinsics::_dtan:
 860       if (StubRoutines::dtan() != NULL) {
 861         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 862       } else {
 863         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 864       }
 865       break;
 866     default:  ShouldNotReachHere();
 867   }
 868 #else
 869   switch (x->id()) {
 870     case vmIntrinsics::_dexp:
 871       if (StubRoutines::dexp() != NULL) {
 872         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 873       } else {
 874         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 875       }
 876       break;
 877     case vmIntrinsics::_dlog:
 878       if (StubRoutines::dlog() != NULL) {
 879       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 880       } else {
 881         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 882       }
 883       break;
 884     case vmIntrinsics::_dlog10:
 885       if (StubRoutines::dlog10() != NULL) {
 886       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 887       } else {
 888         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 889       }
 890       break;
 891     case vmIntrinsics::_dpow:
 892        if (StubRoutines::dpow() != NULL) {
 893       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 894       } else {
 895         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 896       }
 897       break;
 898     case vmIntrinsics::_dsin:
 899       if (StubRoutines::dsin() != NULL) {
 900         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 901       } else {
 902         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 903       }
 904       break;
 905     case vmIntrinsics::_dcos:
 906       if (StubRoutines::dcos() != NULL) {
 907         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 908       } else {
 909         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 910       }
 911       break;
 912     case vmIntrinsics::_dtan:
 913        if (StubRoutines::dtan() != NULL) {
 914       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 915       } else {
 916         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 917       }
 918       break;
 919     default:  ShouldNotReachHere();
 920   }
 921 #endif // _LP64
 922   __ move(result_reg, calc_result);
 923 }
 924 
 925 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 926   assert(x->number_of_arguments() == 5, "wrong type");
 927 
 928   // Make all state_for calls early since they can emit code
 929   CodeEmitInfo* info = state_for(x, x->state());
 930 
 931   LIRItem src(x->argument_at(0), this);
 932   LIRItem src_pos(x->argument_at(1), this);
 933   LIRItem dst(x->argument_at(2), this);
 934   LIRItem dst_pos(x->argument_at(3), this);
 935   LIRItem length(x->argument_at(4), this);
 936 
 937   // operands for arraycopy must use fixed registers, otherwise
 938   // LinearScan will fail allocation (because arraycopy always needs a
 939   // call)
 940 
 941 #ifndef _LP64
 942   src.load_item_force     (FrameMap::rcx_oop_opr);
 943   src_pos.load_item_force (FrameMap::rdx_opr);
 944   dst.load_item_force     (FrameMap::rax_oop_opr);
 945   dst_pos.load_item_force (FrameMap::rbx_opr);
 946   length.load_item_force  (FrameMap::rdi_opr);
 947   LIR_Opr tmp =           (FrameMap::rsi_opr);
 948 #else
 949 
 950   // The java calling convention will give us enough registers
 951   // so that on the stub side the args will be perfect already.
 952   // On the other slow/special case side we call C and the arg
 953   // positions are not similar enough to pick one as the best.
 954   // Also because the java calling convention is a "shifted" version
 955   // of the C convention we can process the java args trivially into C
 956   // args without worry of overwriting during the xfer
 957 
 958   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
 959   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
 960   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
 961   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
 962   length.load_item_force  (FrameMap::as_opr(j_rarg4));
 963 
 964   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
 965 #endif // LP64
 966 
 967   set_no_result(x);
 968 
 969   int flags;
 970   ciArrayKlass* expected_type;
 971   arraycopy_helper(x, &flags, &expected_type);
 972 
 973   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
 974 }
 975 
 976 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
 977   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
 978   // Make all state_for calls early since they can emit code
 979   LIR_Opr result = rlock_result(x);
 980   int flags = 0;
 981   switch (x->id()) {
 982     case vmIntrinsics::_updateCRC32: {
 983       LIRItem crc(x->argument_at(0), this);
 984       LIRItem val(x->argument_at(1), this);
 985       // val is destroyed by update_crc32
 986       val.set_destroys_register();
 987       crc.load_item();
 988       val.load_item();
 989       __ update_crc32(crc.result(), val.result(), result);
 990       break;
 991     }
 992     case vmIntrinsics::_updateBytesCRC32:
 993     case vmIntrinsics::_updateByteBufferCRC32: {
 994       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
 995 
 996       LIRItem crc(x->argument_at(0), this);
 997       LIRItem buf(x->argument_at(1), this);
 998       LIRItem off(x->argument_at(2), this);
 999       LIRItem len(x->argument_at(3), this);
1000       buf.load_item();
1001       off.load_nonconstant();
1002 
1003       LIR_Opr index = off.result();
1004       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1005       if(off.result()->is_constant()) {
1006         index = LIR_OprFact::illegalOpr;
1007        offset += off.result()->as_jint();
1008       }
1009       LIR_Opr base_op = buf.result();
1010 
1011 #ifndef _LP64
1012       if (!is_updateBytes) { // long b raw address
1013          base_op = new_register(T_INT);
1014          __ convert(Bytecodes::_l2i, buf.result(), base_op);
1015       }
1016 #else
1017       if (index->is_valid()) {
1018         LIR_Opr tmp = new_register(T_LONG);
1019         __ convert(Bytecodes::_i2l, index, tmp);
1020         index = tmp;
1021       }
1022 #endif
1023 
1024       if (is_updateBytes) {
1025         base_op = access_resolve(IS_NOT_NULL | ACCESS_READ, base_op);
1026       }
1027 
1028       LIR_Address* a = new LIR_Address(base_op,
1029                                        index,
1030                                        offset,
1031                                        T_BYTE);
1032       BasicTypeList signature(3);
1033       signature.append(T_INT);
1034       signature.append(T_ADDRESS);
1035       signature.append(T_INT);
1036       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1037       const LIR_Opr result_reg = result_register_for(x->type());
1038 
1039       LIR_Opr addr = new_pointer_register();
1040       __ leal(LIR_OprFact::address(a), addr);
1041 
1042       crc.load_item_force(cc->at(0));
1043       __ move(addr, cc->at(1));
1044       len.load_item_force(cc->at(2));
1045 
1046       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1047       __ move(result_reg, result);
1048 
1049       break;
1050     }
1051     default: {
1052       ShouldNotReachHere();
1053     }
1054   }
1055 }
1056 
1057 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1058   Unimplemented();
1059 }
1060 
1061 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1062   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1063 
1064   // Make all state_for calls early since they can emit code
1065   LIR_Opr result = rlock_result(x);
1066 
1067   LIRItem a(x->argument_at(0), this); // Object
1068   LIRItem aOffset(x->argument_at(1), this); // long
1069   LIRItem b(x->argument_at(2), this); // Object
1070   LIRItem bOffset(x->argument_at(3), this); // long
1071   LIRItem length(x->argument_at(4), this); // int
1072   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1073 
1074   a.load_item();
1075   aOffset.load_nonconstant();
1076   b.load_item();
1077   bOffset.load_nonconstant();
1078 
1079   long constant_aOffset = 0;
1080   LIR_Opr result_aOffset = aOffset.result();
1081   if (result_aOffset->is_constant()) {
1082     constant_aOffset = result_aOffset->as_jlong();
1083     result_aOffset = LIR_OprFact::illegalOpr;
1084   }
1085   LIR_Opr result_a = access_resolve(ACCESS_READ, a.result());
1086 
1087   long constant_bOffset = 0;
1088   LIR_Opr result_bOffset = bOffset.result();
1089   if (result_bOffset->is_constant()) {
1090     constant_bOffset = result_bOffset->as_jlong();
1091     result_bOffset = LIR_OprFact::illegalOpr;
1092   }
1093   LIR_Opr result_b = access_resolve(ACCESS_READ, b.result());
1094 
1095 #ifndef _LP64
1096   result_a = new_register(T_INT);
1097   __ convert(Bytecodes::_l2i, a.result(), result_a);
1098   result_b = new_register(T_INT);
1099   __ convert(Bytecodes::_l2i, b.result(), result_b);
1100 #endif
1101 
1102 
1103   LIR_Address* addr_a = new LIR_Address(result_a,
1104                                         result_aOffset,
1105                                         constant_aOffset,
1106                                         T_BYTE);
1107 
1108   LIR_Address* addr_b = new LIR_Address(result_b,
1109                                         result_bOffset,
1110                                         constant_bOffset,
1111                                         T_BYTE);
1112 
1113   BasicTypeList signature(4);
1114   signature.append(T_ADDRESS);
1115   signature.append(T_ADDRESS);
1116   signature.append(T_INT);
1117   signature.append(T_INT);
1118   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1119   const LIR_Opr result_reg = result_register_for(x->type());
1120 
1121   LIR_Opr ptr_addr_a = new_pointer_register();
1122   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1123 
1124   LIR_Opr ptr_addr_b = new_pointer_register();
1125   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1126 
1127   __ move(ptr_addr_a, cc->at(0));
1128   __ move(ptr_addr_b, cc->at(1));
1129   length.load_item_force(cc->at(2));
1130   log2ArrayIndexScale.load_item_force(cc->at(3));
1131 
1132   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1133   __ move(result_reg, result);
1134 }
1135 
1136 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1137 // _i2b, _i2c, _i2s
1138 LIR_Opr fixed_register_for(BasicType type) {
1139   switch (type) {
1140     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1141     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1142     case T_INT:    return FrameMap::rax_opr;
1143     case T_LONG:   return FrameMap::long0_opr;
1144     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1145   }
1146 }
1147 
1148 void LIRGenerator::do_Convert(Convert* x) {
1149   // flags that vary for the different operations and different SSE-settings
1150   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1151 
1152   switch (x->op()) {
1153     case Bytecodes::_i2l: // fall through
1154     case Bytecodes::_l2i: // fall through
1155     case Bytecodes::_i2b: // fall through
1156     case Bytecodes::_i2c: // fall through
1157     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1158 
1159     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1160     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1161     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1162     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1163     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1164     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1165     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1166     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1167     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1168     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1169     default: ShouldNotReachHere();
1170   }
1171 
1172   LIRItem value(x->value(), this);
1173   value.load_item();
1174   LIR_Opr input = value.result();
1175   LIR_Opr result = rlock(x);
1176 
1177   // arguments of lir_convert
1178   LIR_Opr conv_input = input;
1179   LIR_Opr conv_result = result;
1180   ConversionStub* stub = NULL;
1181 
1182   if (fixed_input) {
1183     conv_input = fixed_register_for(input->type());
1184     __ move(input, conv_input);
1185   }
1186 
1187   assert(fixed_result == false || round_result == false, "cannot set both");
1188   if (fixed_result) {
1189     conv_result = fixed_register_for(result->type());
1190   } else if (round_result) {
1191     result = new_register(result->type());
1192     set_vreg_flag(result, must_start_in_memory);
1193   }
1194 
1195   if (needs_stub) {
1196     stub = new ConversionStub(x->op(), conv_input, conv_result);
1197   }
1198 
1199   __ convert(x->op(), conv_input, conv_result, stub);
1200 
1201   if (result != conv_result) {
1202     __ move(conv_result, result);
1203   }
1204 
1205   assert(result->is_virtual(), "result must be virtual register");
1206   set_result(x, result);
1207 }
1208 
1209 
1210 void LIRGenerator::do_NewInstance(NewInstance* x) {
1211   print_if_not_loaded(x);
1212 
1213   CodeEmitInfo* info = state_for(x, x->state());
1214   LIR_Opr reg = result_register_for(x->type());
1215   new_instance(reg, x->klass(), x->is_unresolved(),
1216                        FrameMap::rcx_oop_opr,
1217                        FrameMap::rdi_oop_opr,
1218                        FrameMap::rsi_oop_opr,
1219                        LIR_OprFact::illegalOpr,
1220                        FrameMap::rdx_metadata_opr, info);
1221   LIR_Opr result = rlock_result(x);
1222   __ move(reg, result);
1223 }
1224 
1225 void LIRGenerator::do_NewValueTypeInstance  (NewValueTypeInstance* x) {
1226   // Mapping to do_NewInstance (same code)
1227   CodeEmitInfo* info = state_for(x, x->state());
1228   x->set_to_object_type();
1229   LIR_Opr reg = result_register_for(x->type());
1230   new_instance(reg, x->klass(), x->is_unresolved(),
1231              FrameMap::rcx_oop_opr,
1232              FrameMap::rdi_oop_opr,
1233              FrameMap::rsi_oop_opr,
1234              LIR_OprFact::illegalOpr,
1235              FrameMap::rdx_metadata_opr, info);
1236   LIR_Opr result = rlock_result(x);
1237   __ move(reg, result);
1238 
1239 }
1240 
1241 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1242   CodeEmitInfo* info = state_for(x, x->state());
1243 
1244   LIRItem length(x->length(), this);
1245   length.load_item_force(FrameMap::rbx_opr);
1246 
1247   LIR_Opr reg = result_register_for(x->type());
1248   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1249   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1250   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1251   LIR_Opr tmp4 = reg;
1252   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1253   LIR_Opr len = length.result();
1254   BasicType elem_type = x->elt_type();
1255 
1256   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1257 
1258   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1259   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1260 
1261   LIR_Opr result = rlock_result(x);
1262   __ move(reg, result);
1263 }
1264 
1265 
1266 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1267   LIRItem length(x->length(), this);
1268   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1269   // and therefore provide the state before the parameters have been consumed
1270   CodeEmitInfo* patching_info = NULL;
1271   if (!x->klass()->is_loaded() || PatchALot) {
1272     patching_info =  state_for(x, x->state_before());
1273   }
1274 
1275   CodeEmitInfo* info = state_for(x, x->state());
1276 
1277   const LIR_Opr reg = result_register_for(x->type());
1278   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1279   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1280   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1281   LIR_Opr tmp4 = reg;
1282   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1283 
1284   length.load_item_force(FrameMap::rbx_opr);
1285   LIR_Opr len = length.result();
1286 
1287   ciKlass* obj = (ciKlass*) x->exact_type();
1288   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, obj->is_value_array_klass());
1289   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1290     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1291   }
1292   klass2reg_with_patching(klass_reg, obj, patching_info);
1293   if (obj->is_value_array_klass()) {
1294     __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_VALUETYPE, klass_reg, slow_path);
1295   } else {
1296     __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1297   }
1298 
1299   LIR_Opr result = rlock_result(x);
1300   __ move(reg, result);
1301 }
1302 
1303 
1304 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1305   Values* dims = x->dims();
1306   int i = dims->length();
1307   LIRItemList* items = new LIRItemList(i, i, NULL);
1308   while (i-- > 0) {
1309     LIRItem* size = new LIRItem(dims->at(i), this);
1310     items->at_put(i, size);
1311   }
1312 
1313   // Evaluate state_for early since it may emit code.
1314   CodeEmitInfo* patching_info = NULL;
1315   if (!x->klass()->is_loaded() || PatchALot) {
1316     patching_info = state_for(x, x->state_before());
1317 
1318     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1319     // clone all handlers (NOTE: Usually this is handled transparently
1320     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1321     // is done explicitly here because a stub isn't being used).
1322     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1323   }
1324   CodeEmitInfo* info = state_for(x, x->state());
1325 
1326   i = dims->length();
1327   while (i-- > 0) {
1328     LIRItem* size = items->at(i);
1329     size->load_nonconstant();
1330 
1331     store_stack_parameter(size->result(), in_ByteSize(i*4));
1332   }
1333 
1334   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1335   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1336 
1337   LIR_Opr rank = FrameMap::rbx_opr;
1338   __ move(LIR_OprFact::intConst(x->rank()), rank);
1339   LIR_Opr varargs = FrameMap::rcx_opr;
1340   __ move(FrameMap::rsp_opr, varargs);
1341   LIR_OprList* args = new LIR_OprList(3);
1342   args->append(klass_reg);
1343   args->append(rank);
1344   args->append(varargs);
1345   LIR_Opr reg = result_register_for(x->type());
1346   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1347                   LIR_OprFact::illegalOpr,
1348                   reg, args, info);
1349 
1350   LIR_Opr result = rlock_result(x);
1351   __ move(reg, result);
1352 }
1353 
1354 
1355 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1356   // nothing to do for now
1357 }
1358 
1359 
1360 void LIRGenerator::do_CheckCast(CheckCast* x) {
1361   LIRItem obj(x->obj(), this);
1362 
1363   CodeEmitInfo* patching_info = NULL;
1364   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1365     // must do this before locking the destination register as an oop register,
1366     // and before the obj is loaded (the latter is for deoptimization)
1367     patching_info = state_for(x, x->state_before());
1368   }
1369   obj.load_item();
1370 
1371   // info for exceptions
1372   CodeEmitInfo* info_for_exception =
1373       (x->needs_exception_state() ? state_for(x) :
1374                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1375 
1376   if (x->is_never_null()) {
1377     __ null_check(obj.result(), new CodeEmitInfo(info_for_exception), /* deoptimize */ false);
1378   }
1379 
1380   CodeStub* stub;
1381   if (x->is_incompatible_class_change_check()) {
1382     assert(patching_info == NULL, "can't patch this");
1383     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1384   } else if (x->is_invokespecial_receiver_check()) {
1385     assert(patching_info == NULL, "can't patch this");
1386     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1387   } else {
1388     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1389   }
1390   LIR_Opr reg = rlock_result(x);
1391   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1392   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1393     tmp3 = new_register(objectType);
1394   }
1395   __ checkcast(reg, obj.result(), x->klass(),
1396                new_register(objectType), new_register(objectType), tmp3,
1397                x->direct_compare(), info_for_exception, patching_info, stub,
1398                x->profiled_method(), x->profiled_bci(), x->is_never_null());
1399 }
1400 
1401 
1402 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1403   LIRItem obj(x->obj(), this);
1404 
1405   // result and test object may not be in same register
1406   LIR_Opr reg = rlock_result(x);
1407   CodeEmitInfo* patching_info = NULL;
1408   if ((!x->klass()->is_loaded() || PatchALot)) {
1409     // must do this before locking the destination register as an oop register
1410     patching_info = state_for(x, x->state_before());
1411   }
1412   obj.load_item();
1413   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1414   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1415     tmp3 = new_register(objectType);
1416   }
1417   __ instanceof(reg, obj.result(), x->klass(),
1418                 new_register(objectType), new_register(objectType), tmp3,
1419                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1420 }
1421 
1422 
1423 void LIRGenerator::do_If(If* x) {
1424   assert(x->number_of_sux() == 2, "inconsistency");
1425   ValueTag tag = x->x()->type()->tag();
1426   bool is_safepoint = x->is_safepoint();
1427 
1428   If::Condition cond = x->cond();
1429 
1430   LIRItem xitem(x->x(), this);
1431   LIRItem yitem(x->y(), this);
1432   LIRItem* xin = &xitem;
1433   LIRItem* yin = &yitem;
1434 
1435   if (tag == longTag) {
1436     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1437     // mirror for other conditions
1438     if (cond == If::gtr || cond == If::leq) {
1439       cond = Instruction::mirror(cond);
1440       xin = &yitem;
1441       yin = &xitem;
1442     }
1443     xin->set_destroys_register();
1444   }
1445   xin->load_item();
1446   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1447     // inline long zero
1448     yin->dont_load_item();
1449   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1450     // longs cannot handle constants at right side
1451     yin->load_item();
1452   } else {
1453     yin->dont_load_item();
1454   }
1455 
1456   LIR_Opr left = xin->result();
1457   LIR_Opr right = yin->result();
1458 
1459   set_no_result(x);
1460 
1461   // add safepoint before generating condition code so it can be recomputed
1462   if (x->is_safepoint()) {
1463     // increment backedge counter if needed
1464     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1465         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1466     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1467   }
1468 
1469   __ cmp(lir_cond(cond), left, right);
1470   // Generate branch profiling. Profiling code doesn't kill flags.
1471   profile_branch(x, cond);
1472   move_to_phi(x->state());
1473   if (x->x()->type()->is_float_kind()) {
1474     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1475   } else {
1476     __ branch(lir_cond(cond), right->type(), x->tsux());
1477   }
1478   assert(x->default_sux() == x->fsux(), "wrong destination above");
1479   __ jump(x->default_sux());
1480 }
1481 
1482 
1483 LIR_Opr LIRGenerator::getThreadPointer() {
1484 #ifdef _LP64
1485   return FrameMap::as_pointer_opr(r15_thread);
1486 #else
1487   LIR_Opr result = new_register(T_INT);
1488   __ get_thread(result);
1489   return result;
1490 #endif //
1491 }
1492 
1493 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1494   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1495   LIR_OprList* args = new LIR_OprList();
1496   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1497   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1498 }
1499 
1500 
1501 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1502                                         CodeEmitInfo* info) {
1503   if (address->type() == T_LONG) {
1504     address = new LIR_Address(address->base(),
1505                               address->index(), address->scale(),
1506                               address->disp(), T_DOUBLE);
1507     // Transfer the value atomically by using FP moves.  This means
1508     // the value has to be moved between CPU and FPU registers.  It
1509     // always has to be moved through spill slot since there's no
1510     // quick way to pack the value into an SSE register.
1511     LIR_Opr temp_double = new_register(T_DOUBLE);
1512     LIR_Opr spill = new_register(T_LONG);
1513     set_vreg_flag(spill, must_start_in_memory);
1514     __ move(value, spill);
1515     __ volatile_move(spill, temp_double, T_LONG);
1516     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1517   } else {
1518     __ store(value, address, info);
1519   }
1520 }
1521 
1522 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1523                                        CodeEmitInfo* info) {
1524   if (address->type() == T_LONG) {
1525     address = new LIR_Address(address->base(),
1526                               address->index(), address->scale(),
1527                               address->disp(), T_DOUBLE);
1528     // Transfer the value atomically by using FP moves.  This means
1529     // the value has to be moved between CPU and FPU registers.  In
1530     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1531     // SSE2+ mode it can be moved directly.
1532     LIR_Opr temp_double = new_register(T_DOUBLE);
1533     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1534     __ volatile_move(temp_double, result, T_LONG);
1535     if (UseSSE < 2) {
1536       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1537       set_vreg_flag(result, must_start_in_memory);
1538     }
1539   } else {
1540     __ load(address, result, info);
1541   }
1542 }