1 /* 2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_C1_C1_LIR_HPP 26 #define SHARE_VM_C1_C1_LIR_HPP 27 28 #include "c1/c1_Defs.hpp" 29 #include "c1/c1_ValueType.hpp" 30 #include "oops/method.hpp" 31 #include "utilities/globalDefinitions.hpp" 32 33 class BlockBegin; 34 class BlockList; 35 class LIR_Assembler; 36 class CodeEmitInfo; 37 class CodeStub; 38 class CodeStubList; 39 class ArrayCopyStub; 40 class LIR_Op; 41 class ciType; 42 class ValueType; 43 class LIR_OpVisitState; 44 class FpuStackSim; 45 46 //--------------------------------------------------------------------- 47 // LIR Operands 48 // LIR_OprDesc 49 // LIR_OprPtr 50 // LIR_Const 51 // LIR_Address 52 //--------------------------------------------------------------------- 53 class LIR_OprDesc; 54 class LIR_OprPtr; 55 class LIR_Const; 56 class LIR_Address; 57 class LIR_OprVisitor; 58 59 60 typedef LIR_OprDesc* LIR_Opr; 61 typedef int RegNr; 62 63 typedef GrowableArray<LIR_Opr> LIR_OprList; 64 typedef GrowableArray<LIR_Op*> LIR_OpArray; 65 typedef GrowableArray<LIR_Op*> LIR_OpList; 66 67 // define LIR_OprPtr early so LIR_OprDesc can refer to it 68 class LIR_OprPtr: public CompilationResourceObj { 69 public: 70 bool is_oop_pointer() const { return (type() == T_OBJECT); } 71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } 72 73 virtual LIR_Const* as_constant() { return NULL; } 74 virtual LIR_Address* as_address() { return NULL; } 75 virtual BasicType type() const = 0; 76 virtual void print_value_on(outputStream* out) const = 0; 77 }; 78 79 80 81 // LIR constants 82 class LIR_Const: public LIR_OprPtr { 83 private: 84 JavaValue _value; 85 86 void type_check(BasicType t) const { assert(type() == t, "type check"); } 87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } 88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } 89 90 public: 91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } 92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } 93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } 94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } 95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } 96 LIR_Const(void* p) { 97 #ifdef _LP64 98 assert(sizeof(jlong) >= sizeof(p), "too small");; 99 _value.set_type(T_LONG); _value.set_jlong((jlong)p); 100 #else 101 assert(sizeof(jint) >= sizeof(p), "too small");; 102 _value.set_type(T_INT); _value.set_jint((jint)p); 103 #endif 104 } 105 LIR_Const(Metadata* m) { 106 _value.set_type(T_METADATA); 107 #ifdef _LP64 108 _value.set_jlong((jlong)m); 109 #else 110 _value.set_jint((jint)m); 111 #endif // _LP64 112 } 113 114 virtual BasicType type() const { return _value.get_type(); } 115 virtual LIR_Const* as_constant() { return this; } 116 117 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } 118 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } 119 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } 120 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } 121 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } 122 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } 123 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } 124 125 #ifdef _LP64 126 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } 127 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); } 128 #else 129 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } 130 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); } 131 #endif 132 133 134 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } 135 jint as_jint_lo_bits() const { 136 if (type() == T_DOUBLE) { 137 return low(jlong_cast(_value.get_jdouble())); 138 } else { 139 return as_jint_lo(); 140 } 141 } 142 jint as_jint_hi_bits() const { 143 if (type() == T_DOUBLE) { 144 return high(jlong_cast(_value.get_jdouble())); 145 } else { 146 return as_jint_hi(); 147 } 148 } 149 jlong as_jlong_bits() const { 150 if (type() == T_DOUBLE) { 151 return jlong_cast(_value.get_jdouble()); 152 } else { 153 return as_jlong(); 154 } 155 } 156 157 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 158 159 160 bool is_zero_float() { 161 jfloat f = as_jfloat(); 162 jfloat ok = 0.0f; 163 return jint_cast(f) == jint_cast(ok); 164 } 165 166 bool is_one_float() { 167 jfloat f = as_jfloat(); 168 return !g_isnan(f) && g_isfinite(f) && f == 1.0; 169 } 170 171 bool is_zero_double() { 172 jdouble d = as_jdouble(); 173 jdouble ok = 0.0; 174 return jlong_cast(d) == jlong_cast(ok); 175 } 176 177 bool is_one_double() { 178 jdouble d = as_jdouble(); 179 return !g_isnan(d) && g_isfinite(d) && d == 1.0; 180 } 181 }; 182 183 184 //---------------------LIR Operand descriptor------------------------------------ 185 // 186 // The class LIR_OprDesc represents a LIR instruction operand; 187 // it can be a register (ALU/FPU), stack location or a constant; 188 // Constants and addresses are represented as resource area allocated 189 // structures (see above). 190 // Registers and stack locations are inlined into the this pointer 191 // (see value function). 192 193 class LIR_OprDesc: public CompilationResourceObj { 194 public: 195 // value structure: 196 // data opr-type opr-kind 197 // +--------------+-------+-------+ 198 // [max...........|7 6 5 4|3 2 1 0] 199 // ^ 200 // is_pointer bit 201 // 202 // lowest bit cleared, means it is a structure pointer 203 // we need 4 bits to represent types 204 205 private: 206 friend class LIR_OprFact; 207 208 // Conversion 209 intptr_t value() const { return (intptr_t) this; } 210 211 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { 212 return (value() & mask) == masked_value; 213 } 214 215 enum OprKind { 216 pointer_value = 0 217 , stack_value = 1 218 , cpu_register = 3 219 , fpu_register = 5 220 , illegal_value = 7 221 }; 222 223 enum OprBits { 224 pointer_bits = 1 225 , kind_bits = 3 226 , type_bits = 4 227 , size_bits = 2 228 , destroys_bits = 1 229 , virtual_bits = 1 230 , is_xmm_bits = 1 231 , last_use_bits = 1 232 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation 233 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + 234 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits 235 , data_bits = BitsPerInt - non_data_bits 236 , reg_bits = data_bits / 2 // for two registers in one value encoding 237 }; 238 239 enum OprShift { 240 kind_shift = 0 241 , type_shift = kind_shift + kind_bits 242 , size_shift = type_shift + type_bits 243 , destroys_shift = size_shift + size_bits 244 , last_use_shift = destroys_shift + destroys_bits 245 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits 246 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits 247 , is_xmm_shift = virtual_shift + virtual_bits 248 , data_shift = is_xmm_shift + is_xmm_bits 249 , reg1_shift = data_shift 250 , reg2_shift = data_shift + reg_bits 251 252 }; 253 254 enum OprSize { 255 single_size = 0 << size_shift 256 , double_size = 1 << size_shift 257 }; 258 259 enum OprMask { 260 kind_mask = right_n_bits(kind_bits) 261 , type_mask = right_n_bits(type_bits) << type_shift 262 , size_mask = right_n_bits(size_bits) << size_shift 263 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift 264 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift 265 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift 266 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift 267 , pointer_mask = right_n_bits(pointer_bits) 268 , lower_reg_mask = right_n_bits(reg_bits) 269 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) 270 }; 271 272 uintptr_t data() const { return value() >> data_shift; } 273 int lo_reg_half() const { return data() & lower_reg_mask; } 274 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } 275 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } 276 OprSize size_field() const { return (OprSize)(value() & size_mask); } 277 278 static char type_char(BasicType t); 279 280 public: 281 enum { 282 vreg_base = ConcreteRegisterImpl::number_of_registers, 283 vreg_max = (1 << data_bits) - 1 284 }; 285 286 static inline LIR_Opr illegalOpr(); 287 288 enum OprType { 289 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) 290 , int_type = 1 << type_shift 291 , long_type = 2 << type_shift 292 , object_type = 3 << type_shift 293 , address_type = 4 << type_shift 294 , float_type = 5 << type_shift 295 , double_type = 6 << type_shift 296 , metadata_type = 7 << type_shift 297 }; 298 friend OprType as_OprType(BasicType t); 299 friend BasicType as_BasicType(OprType t); 300 301 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } 302 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } 303 304 static OprSize size_for(BasicType t) { 305 switch (t) { 306 case T_LONG: 307 case T_DOUBLE: 308 return double_size; 309 break; 310 311 case T_FLOAT: 312 case T_BOOLEAN: 313 case T_CHAR: 314 case T_BYTE: 315 case T_SHORT: 316 case T_INT: 317 case T_ADDRESS: 318 case T_OBJECT: 319 case T_VALUETYPE: 320 case T_ARRAY: 321 case T_METADATA: 322 return single_size; 323 break; 324 325 default: 326 ShouldNotReachHere(); 327 return single_size; 328 } 329 } 330 331 332 void validate_type() const PRODUCT_RETURN; 333 334 BasicType type() const { 335 if (is_pointer()) { 336 return pointer()->type(); 337 } 338 return as_BasicType(type_field()); 339 } 340 341 342 ValueType* value_type() const { return as_ValueType(type()); } 343 344 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } 345 346 bool is_equal(LIR_Opr opr) const { return this == opr; } 347 // checks whether types are same 348 bool is_same_type(LIR_Opr opr) const { 349 assert(type_field() != unknown_type && 350 opr->type_field() != unknown_type, "shouldn't see unknown_type"); 351 return type_field() == opr->type_field(); 352 } 353 bool is_same_register(LIR_Opr opr) { 354 return (is_register() && opr->is_register() && 355 kind_field() == opr->kind_field() && 356 (value() & no_type_mask) == (opr->value() & no_type_mask)); 357 } 358 359 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } 360 bool is_illegal() const { return kind_field() == illegal_value; } 361 bool is_valid() const { return kind_field() != illegal_value; } 362 363 bool is_register() const { return is_cpu_register() || is_fpu_register(); } 364 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } 365 366 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } 367 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } 368 369 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } 370 bool is_oop() const; 371 372 // semantic for fpu- and xmm-registers: 373 // * is_float and is_double return true for xmm_registers 374 // (so is_single_fpu and is_single_xmm are true) 375 // * So you must always check for is_???_xmm prior to is_???_fpu to 376 // distinguish between fpu- and xmm-registers 377 378 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } 379 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } 380 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } 381 382 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } 383 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } 384 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } 385 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } 386 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } 387 388 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } 389 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } 390 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } 391 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } 392 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } 393 394 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } 395 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } 396 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } 397 398 // fast accessor functions for special bits that do not work for pointers 399 // (in this functions, the check for is_pointer() is omitted) 400 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } 401 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } 402 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } 403 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } 404 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } 405 406 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } 407 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } 408 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } 409 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } 410 411 412 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } 413 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } 414 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } 415 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 416 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 417 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } 418 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 419 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 420 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } 421 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 422 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 423 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } 424 425 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } 426 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } 427 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } 428 429 Register as_register() const; 430 Register as_register_lo() const; 431 Register as_register_hi() const; 432 433 Register as_pointer_register() { 434 #ifdef _LP64 435 if (is_double_cpu()) { 436 assert(as_register_lo() == as_register_hi(), "should be a single register"); 437 return as_register_lo(); 438 } 439 #endif 440 return as_register(); 441 } 442 443 FloatRegister as_float_reg () const; 444 FloatRegister as_double_reg () const; 445 #ifdef X86 446 XMMRegister as_xmm_float_reg () const; 447 XMMRegister as_xmm_double_reg() const; 448 // for compatibility with RInfo 449 int fpu() const { return lo_reg_half(); } 450 #endif 451 452 jint as_jint() const { return as_constant_ptr()->as_jint(); } 453 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } 454 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } 455 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } 456 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } 457 458 void print() const PRODUCT_RETURN; 459 void print(outputStream* out) const PRODUCT_RETURN; 460 }; 461 462 463 inline LIR_OprDesc::OprType as_OprType(BasicType type) { 464 switch (type) { 465 case T_INT: return LIR_OprDesc::int_type; 466 case T_LONG: return LIR_OprDesc::long_type; 467 case T_FLOAT: return LIR_OprDesc::float_type; 468 case T_DOUBLE: return LIR_OprDesc::double_type; 469 case T_OBJECT: 470 case T_VALUETYPE: 471 case T_ARRAY: return LIR_OprDesc::object_type; 472 case T_ADDRESS: return LIR_OprDesc::address_type; 473 case T_METADATA: return LIR_OprDesc::metadata_type; 474 case T_ILLEGAL: // fall through 475 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; 476 } 477 } 478 479 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { 480 switch (t) { 481 case LIR_OprDesc::int_type: return T_INT; 482 case LIR_OprDesc::long_type: return T_LONG; 483 case LIR_OprDesc::float_type: return T_FLOAT; 484 case LIR_OprDesc::double_type: return T_DOUBLE; 485 case LIR_OprDesc::object_type: return T_OBJECT; 486 case LIR_OprDesc::address_type: return T_ADDRESS; 487 case LIR_OprDesc::metadata_type:return T_METADATA; 488 case LIR_OprDesc::unknown_type: // fall through 489 default: ShouldNotReachHere(); return T_ILLEGAL; 490 } 491 } 492 493 494 // LIR_Address 495 class LIR_Address: public LIR_OprPtr { 496 friend class LIR_OpVisitState; 497 498 public: 499 // NOTE: currently these must be the log2 of the scale factor (and 500 // must also be equivalent to the ScaleFactor enum in 501 // assembler_i486.hpp) 502 enum Scale { 503 times_1 = 0, 504 times_2 = 1, 505 times_4 = 2, 506 times_8 = 3 507 }; 508 509 private: 510 LIR_Opr _base; 511 LIR_Opr _index; 512 Scale _scale; 513 intx _disp; 514 BasicType _type; 515 516 public: 517 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): 518 _base(base) 519 , _index(index) 520 , _scale(times_1) 521 , _disp(0) 522 , _type(type) { verify(); } 523 524 LIR_Address(LIR_Opr base, intx disp, BasicType type): 525 _base(base) 526 , _index(LIR_OprDesc::illegalOpr()) 527 , _scale(times_1) 528 , _disp(disp) 529 , _type(type) { verify(); } 530 531 LIR_Address(LIR_Opr base, BasicType type): 532 _base(base) 533 , _index(LIR_OprDesc::illegalOpr()) 534 , _scale(times_1) 535 , _disp(0) 536 , _type(type) { verify(); } 537 538 LIR_Address(LIR_Opr base, LIR_Opr index, intx disp, BasicType type): 539 _base(base) 540 , _index(index) 541 , _scale(times_1) 542 , _disp(disp) 543 , _type(type) { verify(); } 544 545 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): 546 _base(base) 547 , _index(index) 548 , _scale(scale) 549 , _disp(disp) 550 , _type(type) { verify(); } 551 552 LIR_Opr base() const { return _base; } 553 LIR_Opr index() const { return _index; } 554 Scale scale() const { return _scale; } 555 intx disp() const { return _disp; } 556 557 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } 558 559 virtual LIR_Address* as_address() { return this; } 560 virtual BasicType type() const { return _type; } 561 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 562 563 void verify() const PRODUCT_RETURN; 564 565 static Scale scale(BasicType type); 566 }; 567 568 569 // operand factory 570 class LIR_OprFact: public AllStatic { 571 public: 572 573 static LIR_Opr illegalOpr; 574 575 static LIR_Opr single_cpu(int reg) { 576 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 577 LIR_OprDesc::int_type | 578 LIR_OprDesc::cpu_register | 579 LIR_OprDesc::single_size); 580 } 581 static LIR_Opr single_cpu_oop(int reg) { 582 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 583 LIR_OprDesc::object_type | 584 LIR_OprDesc::cpu_register | 585 LIR_OprDesc::single_size); 586 } 587 static LIR_Opr single_cpu_address(int reg) { 588 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 589 LIR_OprDesc::address_type | 590 LIR_OprDesc::cpu_register | 591 LIR_OprDesc::single_size); 592 } 593 static LIR_Opr single_cpu_metadata(int reg) { 594 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 595 LIR_OprDesc::metadata_type | 596 LIR_OprDesc::cpu_register | 597 LIR_OprDesc::single_size); 598 } 599 static LIR_Opr double_cpu(int reg1, int reg2) { 600 LP64_ONLY(assert(reg1 == reg2, "must be identical")); 601 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 602 (reg2 << LIR_OprDesc::reg2_shift) | 603 LIR_OprDesc::long_type | 604 LIR_OprDesc::cpu_register | 605 LIR_OprDesc::double_size); 606 } 607 608 static LIR_Opr single_fpu(int reg) { 609 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 610 LIR_OprDesc::float_type | 611 LIR_OprDesc::fpu_register | 612 LIR_OprDesc::single_size); 613 } 614 615 // Platform dependant. 616 static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/); 617 618 #ifdef ARM32 619 static LIR_Opr single_softfp(int reg) { 620 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 621 LIR_OprDesc::float_type | 622 LIR_OprDesc::cpu_register | 623 LIR_OprDesc::single_size); 624 } 625 static LIR_Opr double_softfp(int reg1, int reg2) { 626 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 627 (reg2 << LIR_OprDesc::reg2_shift) | 628 LIR_OprDesc::double_type | 629 LIR_OprDesc::cpu_register | 630 LIR_OprDesc::double_size); 631 } 632 #endif // ARM32 633 634 #if defined(X86) 635 static LIR_Opr single_xmm(int reg) { 636 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 637 LIR_OprDesc::float_type | 638 LIR_OprDesc::fpu_register | 639 LIR_OprDesc::single_size | 640 LIR_OprDesc::is_xmm_mask); 641 } 642 static LIR_Opr double_xmm(int reg) { 643 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 644 (reg << LIR_OprDesc::reg2_shift) | 645 LIR_OprDesc::double_type | 646 LIR_OprDesc::fpu_register | 647 LIR_OprDesc::double_size | 648 LIR_OprDesc::is_xmm_mask); 649 } 650 #endif // X86 651 652 static LIR_Opr virtual_register(int index, BasicType type) { 653 LIR_Opr res; 654 switch (type) { 655 case T_OBJECT: // fall through 656 case T_VALUETYPE: // fall through 657 case T_ARRAY: 658 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 659 LIR_OprDesc::object_type | 660 LIR_OprDesc::cpu_register | 661 LIR_OprDesc::single_size | 662 LIR_OprDesc::virtual_mask); 663 break; 664 665 case T_METADATA: 666 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 667 LIR_OprDesc::metadata_type| 668 LIR_OprDesc::cpu_register | 669 LIR_OprDesc::single_size | 670 LIR_OprDesc::virtual_mask); 671 break; 672 673 case T_INT: 674 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 675 LIR_OprDesc::int_type | 676 LIR_OprDesc::cpu_register | 677 LIR_OprDesc::single_size | 678 LIR_OprDesc::virtual_mask); 679 break; 680 681 case T_ADDRESS: 682 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 683 LIR_OprDesc::address_type | 684 LIR_OprDesc::cpu_register | 685 LIR_OprDesc::single_size | 686 LIR_OprDesc::virtual_mask); 687 break; 688 689 case T_LONG: 690 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 691 LIR_OprDesc::long_type | 692 LIR_OprDesc::cpu_register | 693 LIR_OprDesc::double_size | 694 LIR_OprDesc::virtual_mask); 695 break; 696 697 #ifdef __SOFTFP__ 698 case T_FLOAT: 699 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 700 LIR_OprDesc::float_type | 701 LIR_OprDesc::cpu_register | 702 LIR_OprDesc::single_size | 703 LIR_OprDesc::virtual_mask); 704 break; 705 case T_DOUBLE: 706 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 707 LIR_OprDesc::double_type | 708 LIR_OprDesc::cpu_register | 709 LIR_OprDesc::double_size | 710 LIR_OprDesc::virtual_mask); 711 break; 712 #else // __SOFTFP__ 713 case T_FLOAT: 714 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 715 LIR_OprDesc::float_type | 716 LIR_OprDesc::fpu_register | 717 LIR_OprDesc::single_size | 718 LIR_OprDesc::virtual_mask); 719 break; 720 721 case 722 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 723 LIR_OprDesc::double_type | 724 LIR_OprDesc::fpu_register | 725 LIR_OprDesc::double_size | 726 LIR_OprDesc::virtual_mask); 727 break; 728 #endif // __SOFTFP__ 729 default: ShouldNotReachHere(); res = illegalOpr; 730 } 731 732 #ifdef ASSERT 733 res->validate_type(); 734 assert(res->vreg_number() == index, "conversion check"); 735 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); 736 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 737 738 // old-style calculation; check if old and new method are equal 739 LIR_OprDesc::OprType t = as_OprType(type); 740 #ifdef __SOFTFP__ 741 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 742 t | 743 LIR_OprDesc::cpu_register | 744 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 745 #else // __SOFTFP__ 746 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | 747 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | 748 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 749 assert(res == old_res, "old and new method not equal"); 750 #endif // __SOFTFP__ 751 #endif // ASSERT 752 753 return res; 754 } 755 756 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as 757 // the index is platform independent; a double stack useing indeces 2 and 3 has always 758 // index 2. 759 static LIR_Opr stack(int index, BasicType type) { 760 LIR_Opr res; 761 switch (type) { 762 case T_VALUETYPE: // fall through 763 case T_OBJECT: // fall through 764 case T_ARRAY: 765 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 766 LIR_OprDesc::object_type | 767 LIR_OprDesc::stack_value | 768 LIR_OprDesc::single_size); 769 break; 770 771 case T_METADATA: 772 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 773 LIR_OprDesc::metadata_type | 774 LIR_OprDesc::stack_value | 775 LIR_OprDesc::single_size); 776 break; 777 case T_INT: 778 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 779 LIR_OprDesc::int_type | 780 LIR_OprDesc::stack_value | 781 LIR_OprDesc::single_size); 782 break; 783 784 case T_ADDRESS: 785 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 786 LIR_OprDesc::address_type | 787 LIR_OprDesc::stack_value | 788 LIR_OprDesc::single_size); 789 break; 790 791 case T_LONG: 792 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 793 LIR_OprDesc::long_type | 794 LIR_OprDesc::stack_value | 795 LIR_OprDesc::double_size); 796 break; 797 798 case T_FLOAT: 799 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 800 LIR_OprDesc::float_type | 801 LIR_OprDesc::stack_value | 802 LIR_OprDesc::single_size); 803 break; 804 case T_DOUBLE: 805 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 806 LIR_OprDesc::double_type | 807 LIR_OprDesc::stack_value | 808 LIR_OprDesc::double_size); 809 break; 810 811 default: ShouldNotReachHere(); res = illegalOpr; 812 } 813 814 #ifdef ASSERT 815 assert(index >= 0, "index must be positive"); 816 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 817 818 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 819 LIR_OprDesc::stack_value | 820 as_OprType(type) | 821 LIR_OprDesc::size_for(type)); 822 assert(res == old_res, "old and new method not equal"); 823 #endif 824 825 return res; 826 } 827 828 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } 829 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } 830 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } 831 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } 832 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } 833 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } 834 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } 835 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } 836 static LIR_Opr illegal() { return (LIR_Opr)-1; } 837 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } 838 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); } 839 840 static LIR_Opr value_type(ValueType* type); 841 static LIR_Opr dummy_value_type(ValueType* type); 842 }; 843 844 845 //------------------------------------------------------------------------------- 846 // LIR Instructions 847 //------------------------------------------------------------------------------- 848 // 849 // Note: 850 // - every instruction has a result operand 851 // - every instruction has an CodeEmitInfo operand (can be revisited later) 852 // - every instruction has a LIR_OpCode operand 853 // - LIR_OpN, means an instruction that has N input operands 854 // 855 // class hierarchy: 856 // 857 class LIR_Op; 858 class LIR_Op0; 859 class LIR_OpLabel; 860 class LIR_Op1; 861 class LIR_OpBranch; 862 class LIR_OpConvert; 863 class LIR_OpAllocObj; 864 class LIR_OpRoundFP; 865 class LIR_Op2; 866 class LIR_OpDelay; 867 class LIR_Op3; 868 class LIR_OpAllocArray; 869 class LIR_OpCall; 870 class LIR_OpJavaCall; 871 class LIR_OpRTCall; 872 class LIR_OpArrayCopy; 873 class LIR_OpUpdateCRC32; 874 class LIR_OpLock; 875 class LIR_OpTypeCheck; 876 class LIR_OpCompareAndSwap; 877 class LIR_OpProfileCall; 878 class LIR_OpProfileType; 879 #ifdef ASSERT 880 class LIR_OpAssert; 881 #endif 882 883 // LIR operation codes 884 enum LIR_Code { 885 lir_none 886 , begin_op0 887 , lir_word_align 888 , lir_label 889 , lir_nop 890 , lir_backwardbranch_target 891 , lir_std_entry 892 , lir_osr_entry 893 , lir_build_frame 894 , lir_fpop_raw 895 , lir_24bit_FPU 896 , lir_reset_FPU 897 , lir_breakpoint 898 , lir_rtcall 899 , lir_membar 900 , lir_membar_acquire 901 , lir_membar_release 902 , lir_membar_loadload 903 , lir_membar_storestore 904 , lir_membar_loadstore 905 , lir_membar_storeload 906 , lir_get_thread 907 , lir_on_spin_wait 908 , end_op0 909 , begin_op1 910 , lir_fxch 911 , lir_fld 912 , lir_ffree 913 , lir_push 914 , lir_pop 915 , lir_null_check 916 , lir_return 917 , lir_leal 918 , lir_branch 919 , lir_cond_float_branch 920 , lir_move 921 , lir_convert 922 , lir_alloc_object 923 , lir_monaddr 924 , lir_roundfp 925 , lir_safepoint 926 , lir_pack64 927 , lir_unpack64 928 , lir_unwind 929 , end_op1 930 , begin_op2 931 , lir_cmp 932 , lir_cmp_l2i 933 , lir_ucmp_fd2i 934 , lir_cmp_fd2i 935 , lir_cmove 936 , lir_add 937 , lir_sub 938 , lir_mul 939 , lir_mul_strictfp 940 , lir_div 941 , lir_div_strictfp 942 , lir_rem 943 , lir_sqrt 944 , lir_abs 945 , lir_neg 946 , lir_tan 947 , lir_log10 948 , lir_logic_and 949 , lir_logic_or 950 , lir_logic_xor 951 , lir_shl 952 , lir_shr 953 , lir_ushr 954 , lir_alloc_array 955 , lir_throw 956 , lir_compare_to 957 , lir_xadd 958 , lir_xchg 959 , end_op2 960 , begin_op3 961 , lir_idiv 962 , lir_irem 963 , lir_fmad 964 , lir_fmaf 965 , end_op3 966 , begin_opJavaCall 967 , lir_static_call 968 , lir_optvirtual_call 969 , lir_icvirtual_call 970 , lir_virtual_call 971 , lir_dynamic_call 972 , end_opJavaCall 973 , begin_opArrayCopy 974 , lir_arraycopy 975 , end_opArrayCopy 976 , begin_opUpdateCRC32 977 , lir_updatecrc32 978 , end_opUpdateCRC32 979 , begin_opLock 980 , lir_lock 981 , lir_unlock 982 , end_opLock 983 , begin_delay_slot 984 , lir_delay_slot 985 , end_delay_slot 986 , begin_opTypeCheck 987 , lir_instanceof 988 , lir_checkcast 989 , lir_store_check 990 , end_opTypeCheck 991 , begin_opCompareAndSwap 992 , lir_cas_long 993 , lir_cas_obj 994 , lir_cas_int 995 , end_opCompareAndSwap 996 , begin_opMDOProfile 997 , lir_profile_call 998 , lir_profile_type 999 , end_opMDOProfile 1000 , begin_opAssert 1001 , lir_assert 1002 , end_opAssert 1003 }; 1004 1005 1006 enum LIR_Condition { 1007 lir_cond_equal 1008 , lir_cond_notEqual 1009 , lir_cond_less 1010 , lir_cond_lessEqual 1011 , lir_cond_greaterEqual 1012 , lir_cond_greater 1013 , lir_cond_belowEqual 1014 , lir_cond_aboveEqual 1015 , lir_cond_always 1016 , lir_cond_unknown = -1 1017 }; 1018 1019 1020 enum LIR_PatchCode { 1021 lir_patch_none, 1022 lir_patch_low, 1023 lir_patch_high, 1024 lir_patch_normal 1025 }; 1026 1027 1028 enum LIR_MoveKind { 1029 lir_move_normal, 1030 lir_move_volatile, 1031 lir_move_unaligned, 1032 lir_move_wide, 1033 lir_move_max_flag 1034 }; 1035 1036 1037 // -------------------------------------------------- 1038 // LIR_Op 1039 // -------------------------------------------------- 1040 class LIR_Op: public CompilationResourceObj { 1041 friend class LIR_OpVisitState; 1042 1043 #ifdef ASSERT 1044 private: 1045 const char * _file; 1046 int _line; 1047 #endif 1048 1049 protected: 1050 LIR_Opr _result; 1051 unsigned short _code; 1052 unsigned short _flags; 1053 CodeEmitInfo* _info; 1054 int _id; // value id for register allocation 1055 int _fpu_pop_count; 1056 Instruction* _source; // for debugging 1057 1058 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; 1059 1060 protected: 1061 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } 1062 1063 public: 1064 LIR_Op() 1065 : 1066 #ifdef ASSERT 1067 _file(NULL) 1068 , _line(0), 1069 #endif 1070 _result(LIR_OprFact::illegalOpr) 1071 , _code(lir_none) 1072 , _flags(0) 1073 , _info(NULL) 1074 , _id(-1) 1075 , _fpu_pop_count(0) 1076 , _source(NULL) {} 1077 1078 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) 1079 : 1080 #ifdef ASSERT 1081 _file(NULL) 1082 , _line(0), 1083 #endif 1084 _result(result) 1085 , _code(code) 1086 , _flags(0) 1087 , _info(info) 1088 , _id(-1) 1089 , _fpu_pop_count(0) 1090 , _source(NULL) {} 1091 1092 CodeEmitInfo* info() const { return _info; } 1093 LIR_Code code() const { return (LIR_Code)_code; } 1094 LIR_Opr result_opr() const { return _result; } 1095 void set_result_opr(LIR_Opr opr) { _result = opr; } 1096 1097 #ifdef ASSERT 1098 void set_file_and_line(const char * file, int line) { 1099 _file = file; 1100 _line = line; 1101 } 1102 #endif 1103 1104 virtual const char * name() const PRODUCT_RETURN0; 1105 virtual void visit(LIR_OpVisitState* state); 1106 1107 int id() const { return _id; } 1108 void set_id(int id) { _id = id; } 1109 1110 // FPU stack simulation helpers -- only used on Intel 1111 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } 1112 int fpu_pop_count() const { return _fpu_pop_count; } 1113 bool pop_fpu_stack() { return _fpu_pop_count > 0; } 1114 1115 Instruction* source() const { return _source; } 1116 void set_source(Instruction* ins) { _source = ins; } 1117 1118 virtual void emit_code(LIR_Assembler* masm) = 0; 1119 virtual void print_instr(outputStream* out) const = 0; 1120 virtual void print_on(outputStream* st) const PRODUCT_RETURN; 1121 1122 virtual bool is_patching() { return false; } 1123 virtual LIR_OpCall* as_OpCall() { return NULL; } 1124 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } 1125 virtual LIR_OpLabel* as_OpLabel() { return NULL; } 1126 virtual LIR_OpDelay* as_OpDelay() { return NULL; } 1127 virtual LIR_OpLock* as_OpLock() { return NULL; } 1128 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } 1129 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } 1130 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } 1131 virtual LIR_OpBranch* as_OpBranch() { return NULL; } 1132 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } 1133 virtual LIR_OpConvert* as_OpConvert() { return NULL; } 1134 virtual LIR_Op0* as_Op0() { return NULL; } 1135 virtual LIR_Op1* as_Op1() { return NULL; } 1136 virtual LIR_Op2* as_Op2() { return NULL; } 1137 virtual LIR_Op3* as_Op3() { return NULL; } 1138 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } 1139 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } 1140 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } 1141 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } 1142 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } 1143 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; } 1144 #ifdef ASSERT 1145 virtual LIR_OpAssert* as_OpAssert() { return NULL; } 1146 #endif 1147 1148 virtual void verify() const {} 1149 }; 1150 1151 // for calls 1152 class LIR_OpCall: public LIR_Op { 1153 friend class LIR_OpVisitState; 1154 1155 protected: 1156 address _addr; 1157 LIR_OprList* _arguments; 1158 protected: 1159 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, 1160 LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1161 : LIR_Op(code, result, info) 1162 , _addr(addr) 1163 , _arguments(arguments) {} 1164 1165 public: 1166 address addr() const { return _addr; } 1167 const LIR_OprList* arguments() const { return _arguments; } 1168 virtual LIR_OpCall* as_OpCall() { return this; } 1169 }; 1170 1171 1172 // -------------------------------------------------- 1173 // LIR_OpJavaCall 1174 // -------------------------------------------------- 1175 class LIR_OpJavaCall: public LIR_OpCall { 1176 friend class LIR_OpVisitState; 1177 1178 private: 1179 ciMethod* _method; 1180 LIR_Opr _receiver; 1181 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. 1182 1183 public: 1184 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1185 LIR_Opr receiver, LIR_Opr result, 1186 address addr, LIR_OprList* arguments, 1187 CodeEmitInfo* info) 1188 : LIR_OpCall(code, addr, result, arguments, info) 1189 , _method(method) 1190 , _receiver(receiver) 1191 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1192 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1193 1194 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1195 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, 1196 LIR_OprList* arguments, CodeEmitInfo* info) 1197 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) 1198 , _method(method) 1199 , _receiver(receiver) 1200 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1201 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1202 1203 LIR_Opr receiver() const { return _receiver; } 1204 ciMethod* method() const { return _method; } 1205 1206 // JSR 292 support. 1207 bool is_invokedynamic() const { return code() == lir_dynamic_call; } 1208 bool is_method_handle_invoke() const { 1209 return method()->is_compiled_lambda_form() || // Java-generated lambda form 1210 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic 1211 } 1212 1213 intptr_t vtable_offset() const { 1214 assert(_code == lir_virtual_call, "only have vtable for real vcall"); 1215 return (intptr_t) addr(); 1216 } 1217 1218 virtual void emit_code(LIR_Assembler* masm); 1219 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } 1220 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1221 }; 1222 1223 // -------------------------------------------------- 1224 // LIR_OpLabel 1225 // -------------------------------------------------- 1226 // Location where a branch can continue 1227 class LIR_OpLabel: public LIR_Op { 1228 friend class LIR_OpVisitState; 1229 1230 private: 1231 Label* _label; 1232 public: 1233 LIR_OpLabel(Label* lbl) 1234 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) 1235 , _label(lbl) {} 1236 Label* label() const { return _label; } 1237 1238 virtual void emit_code(LIR_Assembler* masm); 1239 virtual LIR_OpLabel* as_OpLabel() { return this; } 1240 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1241 }; 1242 1243 // LIR_OpArrayCopy 1244 class LIR_OpArrayCopy: public LIR_Op { 1245 friend class LIR_OpVisitState; 1246 1247 private: 1248 ArrayCopyStub* _stub; 1249 LIR_Opr _src; 1250 LIR_Opr _src_pos; 1251 LIR_Opr _dst; 1252 LIR_Opr _dst_pos; 1253 LIR_Opr _length; 1254 LIR_Opr _tmp; 1255 ciArrayKlass* _expected_type; 1256 int _flags; 1257 1258 public: 1259 enum Flags { 1260 src_null_check = 1 << 0, 1261 dst_null_check = 1 << 1, 1262 src_pos_positive_check = 1 << 2, 1263 dst_pos_positive_check = 1 << 3, 1264 length_positive_check = 1 << 4, 1265 src_range_check = 1 << 5, 1266 dst_range_check = 1 << 6, 1267 type_check = 1 << 7, 1268 overlapping = 1 << 8, 1269 unaligned = 1 << 9, 1270 src_objarray = 1 << 10, 1271 dst_objarray = 1 << 11, 1272 all_flags = (1 << 12) - 1 1273 }; 1274 1275 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, 1276 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); 1277 1278 LIR_Opr src() const { return _src; } 1279 LIR_Opr src_pos() const { return _src_pos; } 1280 LIR_Opr dst() const { return _dst; } 1281 LIR_Opr dst_pos() const { return _dst_pos; } 1282 LIR_Opr length() const { return _length; } 1283 LIR_Opr tmp() const { return _tmp; } 1284 int flags() const { return _flags; } 1285 ciArrayKlass* expected_type() const { return _expected_type; } 1286 ArrayCopyStub* stub() const { return _stub; } 1287 1288 virtual void emit_code(LIR_Assembler* masm); 1289 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } 1290 void print_instr(outputStream* out) const PRODUCT_RETURN; 1291 }; 1292 1293 // LIR_OpUpdateCRC32 1294 class LIR_OpUpdateCRC32: public LIR_Op { 1295 friend class LIR_OpVisitState; 1296 1297 private: 1298 LIR_Opr _crc; 1299 LIR_Opr _val; 1300 1301 public: 1302 1303 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res); 1304 1305 LIR_Opr crc() const { return _crc; } 1306 LIR_Opr val() const { return _val; } 1307 1308 virtual void emit_code(LIR_Assembler* masm); 1309 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; } 1310 void print_instr(outputStream* out) const PRODUCT_RETURN; 1311 }; 1312 1313 // -------------------------------------------------- 1314 // LIR_Op0 1315 // -------------------------------------------------- 1316 class LIR_Op0: public LIR_Op { 1317 friend class LIR_OpVisitState; 1318 1319 public: 1320 LIR_Op0(LIR_Code code) 1321 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1322 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) 1323 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1324 1325 virtual void emit_code(LIR_Assembler* masm); 1326 virtual LIR_Op0* as_Op0() { return this; } 1327 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1328 }; 1329 1330 1331 // -------------------------------------------------- 1332 // LIR_Op1 1333 // -------------------------------------------------- 1334 1335 class LIR_Op1: public LIR_Op { 1336 friend class LIR_OpVisitState; 1337 1338 protected: 1339 LIR_Opr _opr; // input operand 1340 BasicType _type; // Operand types 1341 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) 1342 1343 static void print_patch_code(outputStream* out, LIR_PatchCode code); 1344 1345 void set_kind(LIR_MoveKind kind) { 1346 assert(code() == lir_move, "must be"); 1347 _flags = kind; 1348 } 1349 1350 public: 1351 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) 1352 : LIR_Op(code, result, info) 1353 , _opr(opr) 1354 , _type(type) 1355 , _patch(patch) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1356 1357 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) 1358 : LIR_Op(code, result, info) 1359 , _opr(opr) 1360 , _type(type) 1361 , _patch(patch) { 1362 assert(code == lir_move, "must be"); 1363 set_kind(kind); 1364 } 1365 1366 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) 1367 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1368 , _opr(opr) 1369 , _type(T_ILLEGAL) 1370 , _patch(lir_patch_none) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1371 1372 LIR_Opr in_opr() const { return _opr; } 1373 LIR_PatchCode patch_code() const { return _patch; } 1374 BasicType type() const { return _type; } 1375 1376 LIR_MoveKind move_kind() const { 1377 assert(code() == lir_move, "must be"); 1378 return (LIR_MoveKind)_flags; 1379 } 1380 1381 virtual bool is_patching() { return _patch != lir_patch_none; } 1382 virtual void emit_code(LIR_Assembler* masm); 1383 virtual LIR_Op1* as_Op1() { return this; } 1384 virtual const char * name() const PRODUCT_RETURN0; 1385 1386 void set_in_opr(LIR_Opr opr) { _opr = opr; } 1387 1388 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1389 virtual void verify() const; 1390 }; 1391 1392 1393 // for runtime calls 1394 class LIR_OpRTCall: public LIR_OpCall { 1395 friend class LIR_OpVisitState; 1396 1397 private: 1398 LIR_Opr _tmp; 1399 public: 1400 LIR_OpRTCall(address addr, LIR_Opr tmp, 1401 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1402 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) 1403 , _tmp(tmp) {} 1404 1405 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1406 virtual void emit_code(LIR_Assembler* masm); 1407 virtual LIR_OpRTCall* as_OpRTCall() { return this; } 1408 1409 LIR_Opr tmp() const { return _tmp; } 1410 1411 virtual void verify() const; 1412 }; 1413 1414 1415 class LIR_OpBranch: public LIR_Op { 1416 friend class LIR_OpVisitState; 1417 1418 private: 1419 LIR_Condition _cond; 1420 BasicType _type; 1421 Label* _label; 1422 BlockBegin* _block; // if this is a branch to a block, this is the block 1423 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block 1424 CodeStub* _stub; // if this is a branch to a stub, this is the stub 1425 1426 public: 1427 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl) 1428 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) 1429 , _cond(cond) 1430 , _type(type) 1431 , _label(lbl) 1432 , _block(NULL) 1433 , _ublock(NULL) 1434 , _stub(NULL) { } 1435 1436 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); 1437 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); 1438 1439 // for unordered comparisons 1440 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); 1441 1442 LIR_Condition cond() const { return _cond; } 1443 BasicType type() const { return _type; } 1444 Label* label() const { return _label; } 1445 BlockBegin* block() const { return _block; } 1446 BlockBegin* ublock() const { return _ublock; } 1447 CodeStub* stub() const { return _stub; } 1448 1449 void change_block(BlockBegin* b); 1450 void change_ublock(BlockBegin* b); 1451 void negate_cond(); 1452 1453 virtual void emit_code(LIR_Assembler* masm); 1454 virtual LIR_OpBranch* as_OpBranch() { return this; } 1455 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1456 }; 1457 1458 1459 class ConversionStub; 1460 1461 class LIR_OpConvert: public LIR_Op1 { 1462 friend class LIR_OpVisitState; 1463 1464 private: 1465 Bytecodes::Code _bytecode; 1466 ConversionStub* _stub; 1467 1468 public: 1469 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) 1470 : LIR_Op1(lir_convert, opr, result) 1471 , _bytecode(code) 1472 , _stub(stub) {} 1473 1474 Bytecodes::Code bytecode() const { return _bytecode; } 1475 ConversionStub* stub() const { return _stub; } 1476 1477 virtual void emit_code(LIR_Assembler* masm); 1478 virtual LIR_OpConvert* as_OpConvert() { return this; } 1479 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1480 1481 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; 1482 }; 1483 1484 1485 // LIR_OpAllocObj 1486 class LIR_OpAllocObj : public LIR_Op1 { 1487 friend class LIR_OpVisitState; 1488 1489 private: 1490 LIR_Opr _tmp1; 1491 LIR_Opr _tmp2; 1492 LIR_Opr _tmp3; 1493 LIR_Opr _tmp4; 1494 int _hdr_size; 1495 int _obj_size; 1496 CodeStub* _stub; 1497 bool _init_check; 1498 1499 public: 1500 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, 1501 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1502 int hdr_size, int obj_size, bool init_check, CodeStub* stub) 1503 : LIR_Op1(lir_alloc_object, klass, result) 1504 , _tmp1(t1) 1505 , _tmp2(t2) 1506 , _tmp3(t3) 1507 , _tmp4(t4) 1508 , _hdr_size(hdr_size) 1509 , _obj_size(obj_size) 1510 , _stub(stub) 1511 , _init_check(init_check) { } 1512 1513 LIR_Opr klass() const { return in_opr(); } 1514 LIR_Opr obj() const { return result_opr(); } 1515 LIR_Opr tmp1() const { return _tmp1; } 1516 LIR_Opr tmp2() const { return _tmp2; } 1517 LIR_Opr tmp3() const { return _tmp3; } 1518 LIR_Opr tmp4() const { return _tmp4; } 1519 int header_size() const { return _hdr_size; } 1520 int object_size() const { return _obj_size; } 1521 bool init_check() const { return _init_check; } 1522 CodeStub* stub() const { return _stub; } 1523 1524 virtual void emit_code(LIR_Assembler* masm); 1525 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } 1526 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1527 }; 1528 1529 1530 // LIR_OpRoundFP 1531 class LIR_OpRoundFP : public LIR_Op1 { 1532 friend class LIR_OpVisitState; 1533 1534 private: 1535 LIR_Opr _tmp; 1536 1537 public: 1538 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) 1539 : LIR_Op1(lir_roundfp, reg, result) 1540 , _tmp(stack_loc_temp) {} 1541 1542 LIR_Opr tmp() const { return _tmp; } 1543 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } 1544 void print_instr(outputStream* out) const PRODUCT_RETURN; 1545 }; 1546 1547 // LIR_OpTypeCheck 1548 class LIR_OpTypeCheck: public LIR_Op { 1549 friend class LIR_OpVisitState; 1550 1551 private: 1552 LIR_Opr _object; 1553 LIR_Opr _array; 1554 ciKlass* _klass; 1555 LIR_Opr _tmp1; 1556 LIR_Opr _tmp2; 1557 LIR_Opr _tmp3; 1558 bool _fast_check; 1559 CodeEmitInfo* _info_for_patch; 1560 CodeEmitInfo* _info_for_exception; 1561 CodeStub* _stub; 1562 ciMethod* _profiled_method; 1563 int _profiled_bci; 1564 bool _should_profile; 1565 1566 public: 1567 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 1568 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1569 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); 1570 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, 1571 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); 1572 1573 LIR_Opr object() const { return _object; } 1574 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } 1575 LIR_Opr tmp1() const { return _tmp1; } 1576 LIR_Opr tmp2() const { return _tmp2; } 1577 LIR_Opr tmp3() const { return _tmp3; } 1578 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } 1579 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } 1580 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } 1581 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } 1582 CodeStub* stub() const { return _stub; } 1583 1584 // MethodData* profiling 1585 void set_profiled_method(ciMethod *method) { _profiled_method = method; } 1586 void set_profiled_bci(int bci) { _profiled_bci = bci; } 1587 void set_should_profile(bool b) { _should_profile = b; } 1588 ciMethod* profiled_method() const { return _profiled_method; } 1589 int profiled_bci() const { return _profiled_bci; } 1590 bool should_profile() const { return _should_profile; } 1591 1592 virtual bool is_patching() { return _info_for_patch != NULL; } 1593 virtual void emit_code(LIR_Assembler* masm); 1594 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } 1595 void print_instr(outputStream* out) const PRODUCT_RETURN; 1596 }; 1597 1598 // LIR_Op2 1599 class LIR_Op2: public LIR_Op { 1600 friend class LIR_OpVisitState; 1601 1602 int _fpu_stack_size; // for sin/cos implementation on Intel 1603 1604 protected: 1605 LIR_Opr _opr1; 1606 LIR_Opr _opr2; 1607 BasicType _type; 1608 LIR_Opr _tmp1; 1609 LIR_Opr _tmp2; 1610 LIR_Opr _tmp3; 1611 LIR_Opr _tmp4; 1612 LIR_Opr _tmp5; 1613 LIR_Condition _condition; 1614 1615 void verify() const; 1616 1617 public: 1618 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) 1619 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1620 , _fpu_stack_size(0) 1621 , _opr1(opr1) 1622 , _opr2(opr2) 1623 , _type(T_ILLEGAL) 1624 , _tmp1(LIR_OprFact::illegalOpr) 1625 , _tmp2(LIR_OprFact::illegalOpr) 1626 , _tmp3(LIR_OprFact::illegalOpr) 1627 , _tmp4(LIR_OprFact::illegalOpr) 1628 , _tmp5(LIR_OprFact::illegalOpr) 1629 , _condition(condition) { 1630 assert(code == lir_cmp || code == lir_assert, "code check"); 1631 } 1632 1633 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) 1634 : LIR_Op(code, result, NULL) 1635 , _fpu_stack_size(0) 1636 , _opr1(opr1) 1637 , _opr2(opr2) 1638 , _type(type) 1639 , _tmp1(LIR_OprFact::illegalOpr) 1640 , _tmp2(LIR_OprFact::illegalOpr) 1641 , _tmp3(LIR_OprFact::illegalOpr) 1642 , _tmp4(LIR_OprFact::illegalOpr) 1643 , _tmp5(LIR_OprFact::illegalOpr) 1644 , _condition(condition) { 1645 assert(code == lir_cmove, "code check"); 1646 assert(type != T_ILLEGAL, "cmove should have type"); 1647 } 1648 1649 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, 1650 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) 1651 : LIR_Op(code, result, info) 1652 , _fpu_stack_size(0) 1653 , _opr1(opr1) 1654 , _opr2(opr2) 1655 , _type(type) 1656 , _tmp1(LIR_OprFact::illegalOpr) 1657 , _tmp2(LIR_OprFact::illegalOpr) 1658 , _tmp3(LIR_OprFact::illegalOpr) 1659 , _tmp4(LIR_OprFact::illegalOpr) 1660 , _tmp5(LIR_OprFact::illegalOpr) 1661 , _condition(lir_cond_unknown) { 1662 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1663 } 1664 1665 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, 1666 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) 1667 : LIR_Op(code, result, NULL) 1668 , _fpu_stack_size(0) 1669 , _opr1(opr1) 1670 , _opr2(opr2) 1671 , _type(T_ILLEGAL) 1672 , _tmp1(tmp1) 1673 , _tmp2(tmp2) 1674 , _tmp3(tmp3) 1675 , _tmp4(tmp4) 1676 , _tmp5(tmp5) 1677 , _condition(lir_cond_unknown) { 1678 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1679 } 1680 1681 LIR_Opr in_opr1() const { return _opr1; } 1682 LIR_Opr in_opr2() const { return _opr2; } 1683 BasicType type() const { return _type; } 1684 LIR_Opr tmp1_opr() const { return _tmp1; } 1685 LIR_Opr tmp2_opr() const { return _tmp2; } 1686 LIR_Opr tmp3_opr() const { return _tmp3; } 1687 LIR_Opr tmp4_opr() const { return _tmp4; } 1688 LIR_Opr tmp5_opr() const { return _tmp5; } 1689 LIR_Condition condition() const { 1690 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; 1691 } 1692 void set_condition(LIR_Condition condition) { 1693 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; 1694 } 1695 1696 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } 1697 int fpu_stack_size() const { return _fpu_stack_size; } 1698 1699 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } 1700 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } 1701 1702 virtual void emit_code(LIR_Assembler* masm); 1703 virtual LIR_Op2* as_Op2() { return this; } 1704 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1705 }; 1706 1707 class LIR_OpAllocArray : public LIR_Op { 1708 friend class LIR_OpVisitState; 1709 1710 private: 1711 LIR_Opr _klass; 1712 LIR_Opr _len; 1713 LIR_Opr _tmp1; 1714 LIR_Opr _tmp2; 1715 LIR_Opr _tmp3; 1716 LIR_Opr _tmp4; 1717 BasicType _type; 1718 CodeStub* _stub; 1719 1720 public: 1721 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) 1722 : LIR_Op(lir_alloc_array, result, NULL) 1723 , _klass(klass) 1724 , _len(len) 1725 , _tmp1(t1) 1726 , _tmp2(t2) 1727 , _tmp3(t3) 1728 , _tmp4(t4) 1729 , _type(type) 1730 , _stub(stub) {} 1731 1732 LIR_Opr klass() const { return _klass; } 1733 LIR_Opr len() const { return _len; } 1734 LIR_Opr obj() const { return result_opr(); } 1735 LIR_Opr tmp1() const { return _tmp1; } 1736 LIR_Opr tmp2() const { return _tmp2; } 1737 LIR_Opr tmp3() const { return _tmp3; } 1738 LIR_Opr tmp4() const { return _tmp4; } 1739 BasicType type() const { return _type; } 1740 CodeStub* stub() const { return _stub; } 1741 1742 virtual void emit_code(LIR_Assembler* masm); 1743 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } 1744 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1745 }; 1746 1747 1748 class LIR_Op3: public LIR_Op { 1749 friend class LIR_OpVisitState; 1750 1751 private: 1752 LIR_Opr _opr1; 1753 LIR_Opr _opr2; 1754 LIR_Opr _opr3; 1755 public: 1756 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) 1757 : LIR_Op(code, result, info) 1758 , _opr1(opr1) 1759 , _opr2(opr2) 1760 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } 1761 LIR_Opr in_opr1() const { return _opr1; } 1762 LIR_Opr in_opr2() const { return _opr2; } 1763 LIR_Opr in_opr3() const { return _opr3; } 1764 1765 virtual void emit_code(LIR_Assembler* masm); 1766 virtual LIR_Op3* as_Op3() { return this; } 1767 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1768 }; 1769 1770 1771 //-------------------------------- 1772 class LabelObj: public CompilationResourceObj { 1773 private: 1774 Label _label; 1775 public: 1776 LabelObj() {} 1777 Label* label() { return &_label; } 1778 }; 1779 1780 1781 class LIR_OpLock: public LIR_Op { 1782 friend class LIR_OpVisitState; 1783 1784 private: 1785 LIR_Opr _hdr; 1786 LIR_Opr _obj; 1787 LIR_Opr _lock; 1788 LIR_Opr _scratch; 1789 CodeStub* _stub; 1790 public: 1791 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) 1792 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1793 , _hdr(hdr) 1794 , _obj(obj) 1795 , _lock(lock) 1796 , _scratch(scratch) 1797 , _stub(stub) {} 1798 1799 LIR_Opr hdr_opr() const { return _hdr; } 1800 LIR_Opr obj_opr() const { return _obj; } 1801 LIR_Opr lock_opr() const { return _lock; } 1802 LIR_Opr scratch_opr() const { return _scratch; } 1803 CodeStub* stub() const { return _stub; } 1804 1805 virtual void emit_code(LIR_Assembler* masm); 1806 virtual LIR_OpLock* as_OpLock() { return this; } 1807 void print_instr(outputStream* out) const PRODUCT_RETURN; 1808 }; 1809 1810 1811 class LIR_OpDelay: public LIR_Op { 1812 friend class LIR_OpVisitState; 1813 1814 private: 1815 LIR_Op* _op; 1816 1817 public: 1818 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): 1819 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), 1820 _op(op) { 1821 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); 1822 } 1823 virtual void emit_code(LIR_Assembler* masm); 1824 virtual LIR_OpDelay* as_OpDelay() { return this; } 1825 void print_instr(outputStream* out) const PRODUCT_RETURN; 1826 LIR_Op* delay_op() const { return _op; } 1827 CodeEmitInfo* call_info() const { return info(); } 1828 }; 1829 1830 #ifdef ASSERT 1831 // LIR_OpAssert 1832 class LIR_OpAssert : public LIR_Op2 { 1833 friend class LIR_OpVisitState; 1834 1835 private: 1836 const char* _msg; 1837 bool _halt; 1838 1839 public: 1840 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) 1841 : LIR_Op2(lir_assert, condition, opr1, opr2) 1842 , _msg(msg) 1843 , _halt(halt) { 1844 } 1845 1846 const char* msg() const { return _msg; } 1847 bool halt() const { return _halt; } 1848 1849 virtual void emit_code(LIR_Assembler* masm); 1850 virtual LIR_OpAssert* as_OpAssert() { return this; } 1851 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1852 }; 1853 #endif 1854 1855 // LIR_OpCompareAndSwap 1856 class LIR_OpCompareAndSwap : public LIR_Op { 1857 friend class LIR_OpVisitState; 1858 1859 private: 1860 LIR_Opr _addr; 1861 LIR_Opr _cmp_value; 1862 LIR_Opr _new_value; 1863 LIR_Opr _tmp1; 1864 LIR_Opr _tmp2; 1865 1866 public: 1867 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1868 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) 1869 : LIR_Op(code, result, NULL) // no result, no info 1870 , _addr(addr) 1871 , _cmp_value(cmp_value) 1872 , _new_value(new_value) 1873 , _tmp1(t1) 1874 , _tmp2(t2) { } 1875 1876 LIR_Opr addr() const { return _addr; } 1877 LIR_Opr cmp_value() const { return _cmp_value; } 1878 LIR_Opr new_value() const { return _new_value; } 1879 LIR_Opr tmp1() const { return _tmp1; } 1880 LIR_Opr tmp2() const { return _tmp2; } 1881 1882 virtual void emit_code(LIR_Assembler* masm); 1883 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } 1884 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1885 }; 1886 1887 // LIR_OpProfileCall 1888 class LIR_OpProfileCall : public LIR_Op { 1889 friend class LIR_OpVisitState; 1890 1891 private: 1892 ciMethod* _profiled_method; 1893 int _profiled_bci; 1894 ciMethod* _profiled_callee; 1895 LIR_Opr _mdo; 1896 LIR_Opr _recv; 1897 LIR_Opr _tmp1; 1898 ciKlass* _known_holder; 1899 1900 public: 1901 // Destroys recv 1902 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) 1903 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info 1904 , _profiled_method(profiled_method) 1905 , _profiled_bci(profiled_bci) 1906 , _profiled_callee(profiled_callee) 1907 , _mdo(mdo) 1908 , _recv(recv) 1909 , _tmp1(t1) 1910 , _known_holder(known_holder) { } 1911 1912 ciMethod* profiled_method() const { return _profiled_method; } 1913 int profiled_bci() const { return _profiled_bci; } 1914 ciMethod* profiled_callee() const { return _profiled_callee; } 1915 LIR_Opr mdo() const { return _mdo; } 1916 LIR_Opr recv() const { return _recv; } 1917 LIR_Opr tmp1() const { return _tmp1; } 1918 ciKlass* known_holder() const { return _known_holder; } 1919 1920 virtual void emit_code(LIR_Assembler* masm); 1921 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } 1922 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1923 bool should_profile_receiver_type() const { 1924 bool callee_is_static = _profiled_callee->is_loaded() && _profiled_callee->is_static(); 1925 Bytecodes::Code bc = _profiled_method->java_code_at_bci(_profiled_bci); 1926 bool call_is_virtual = (bc == Bytecodes::_invokevirtual && !_profiled_callee->can_be_statically_bound()) || bc == Bytecodes::_invokeinterface; 1927 return C1ProfileVirtualCalls && call_is_virtual && !callee_is_static; 1928 } 1929 }; 1930 1931 // LIR_OpProfileType 1932 class LIR_OpProfileType : public LIR_Op { 1933 friend class LIR_OpVisitState; 1934 1935 private: 1936 LIR_Opr _mdp; 1937 LIR_Opr _obj; 1938 LIR_Opr _tmp; 1939 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj) 1940 intptr_t _current_klass; // what the profiling currently reports 1941 bool _not_null; // true if we know statically that _obj cannot be null 1942 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know 1943 // _exact_klass it the only possible type for this parameter in any context. 1944 1945 public: 1946 // Destroys recv 1947 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) 1948 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info 1949 , _mdp(mdp) 1950 , _obj(obj) 1951 , _tmp(tmp) 1952 , _exact_klass(exact_klass) 1953 , _current_klass(current_klass) 1954 , _not_null(not_null) 1955 , _no_conflict(no_conflict) { } 1956 1957 LIR_Opr mdp() const { return _mdp; } 1958 LIR_Opr obj() const { return _obj; } 1959 LIR_Opr tmp() const { return _tmp; } 1960 ciKlass* exact_klass() const { return _exact_klass; } 1961 intptr_t current_klass() const { return _current_klass; } 1962 bool not_null() const { return _not_null; } 1963 bool no_conflict() const { return _no_conflict; } 1964 1965 virtual void emit_code(LIR_Assembler* masm); 1966 virtual LIR_OpProfileType* as_OpProfileType() { return this; } 1967 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1968 }; 1969 1970 class LIR_InsertionBuffer; 1971 1972 //--------------------------------LIR_List--------------------------------------------------- 1973 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) 1974 // The LIR instructions are appended by the LIR_List class itself; 1975 // 1976 // Notes: 1977 // - all offsets are(should be) in bytes 1978 // - local positions are specified with an offset, with offset 0 being local 0 1979 1980 class LIR_List: public CompilationResourceObj { 1981 private: 1982 LIR_OpList _operations; 1983 1984 Compilation* _compilation; 1985 #ifndef PRODUCT 1986 BlockBegin* _block; 1987 #endif 1988 #ifdef ASSERT 1989 const char * _file; 1990 int _line; 1991 #endif 1992 1993 public: 1994 void append(LIR_Op* op) { 1995 if (op->source() == NULL) 1996 op->set_source(_compilation->current_instruction()); 1997 #ifndef PRODUCT 1998 if (PrintIRWithLIR) { 1999 _compilation->maybe_print_current_instruction(); 2000 op->print(); tty->cr(); 2001 } 2002 #endif // PRODUCT 2003 2004 _operations.append(op); 2005 2006 #ifdef ASSERT 2007 op->verify(); 2008 op->set_file_and_line(_file, _line); 2009 _file = NULL; 2010 _line = 0; 2011 #endif 2012 } 2013 2014 LIR_List(Compilation* compilation, BlockBegin* block = NULL); 2015 2016 #ifdef ASSERT 2017 void set_file_and_line(const char * file, int line); 2018 #endif 2019 2020 //---------- accessors --------------- 2021 LIR_OpList* instructions_list() { return &_operations; } 2022 int length() const { return _operations.length(); } 2023 LIR_Op* at(int i) const { return _operations.at(i); } 2024 2025 NOT_PRODUCT(BlockBegin* block() const { return _block; }); 2026 2027 // insert LIR_Ops in buffer to right places in LIR_List 2028 void append(LIR_InsertionBuffer* buffer); 2029 2030 //---------- mutators --------------- 2031 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } 2032 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } 2033 void remove_at(int i) { _operations.remove_at(i); } 2034 2035 //---------- printing ------------- 2036 void print_instructions() PRODUCT_RETURN; 2037 2038 2039 //---------- instructions ------------- 2040 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2041 address dest, LIR_OprList* arguments, 2042 CodeEmitInfo* info) { 2043 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); 2044 } 2045 void call_static(ciMethod* method, LIR_Opr result, 2046 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2047 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); 2048 } 2049 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2050 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2051 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); 2052 } 2053 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2054 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { 2055 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); 2056 } 2057 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2058 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2059 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); 2060 } 2061 2062 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } 2063 void word_align() { append(new LIR_Op0(lir_word_align)); } 2064 void membar() { append(new LIR_Op0(lir_membar)); } 2065 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } 2066 void membar_release() { append(new LIR_Op0(lir_membar_release)); } 2067 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); } 2068 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); } 2069 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); } 2070 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); } 2071 2072 void nop() { append(new LIR_Op0(lir_nop)); } 2073 void build_frame() { append(new LIR_Op0(lir_build_frame)); } 2074 2075 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } 2076 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } 2077 2078 void on_spin_wait() { append(new LIR_Op0(lir_on_spin_wait)); } 2079 2080 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } 2081 2082 void leal(LIR_Opr from, LIR_Opr result_reg, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_leal, from, result_reg, T_ILLEGAL, patch_code, info)); } 2083 2084 // result is a stack location for old backend and vreg for UseLinearScan 2085 // stack_loc_temp is an illegal register for old backend 2086 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } 2087 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2088 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2089 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2090 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 2091 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } 2092 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } 2093 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { 2094 if (UseCompressedOops) { 2095 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide)); 2096 } else { 2097 move(src, dst, info); 2098 } 2099 } 2100 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { 2101 if (UseCompressedOops) { 2102 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide)); 2103 } else { 2104 move(src, dst, info); 2105 } 2106 } 2107 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } 2108 2109 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } 2110 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); 2111 2112 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } 2113 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); 2114 2115 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } 2116 2117 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } 2118 2119 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } 2120 2121 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } 2122 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } 2123 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } 2124 2125 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } 2126 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } 2127 2128 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false); 2129 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { 2130 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); 2131 } 2132 void unwind_exception(LIR_Opr exceptionOop) { 2133 append(new LIR_Op1(lir_unwind, exceptionOop)); 2134 } 2135 2136 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { 2137 append(new LIR_Op2(lir_compare_to, left, right, dst)); 2138 } 2139 2140 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } 2141 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } 2142 2143 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { 2144 append(new LIR_Op2(lir_cmp, condition, left, right, info)); 2145 } 2146 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { 2147 cmp(condition, left, LIR_OprFact::intConst(right), info); 2148 } 2149 2150 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); 2151 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); 2152 2153 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { 2154 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); 2155 } 2156 2157 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2158 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2159 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2160 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2161 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2162 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2163 2164 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } 2165 void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); } 2166 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } 2167 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); } 2168 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); } 2169 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } 2170 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } 2171 2172 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } 2173 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } 2174 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } 2175 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } 2176 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } 2177 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } 2178 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } 2179 2180 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2181 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2182 2183 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2184 2185 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2186 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2187 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2188 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2189 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2190 2191 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2192 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2193 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2194 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2195 2196 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); 2197 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); 2198 2199 // jump is an unconditional branch 2200 void jump(BlockBegin* block) { 2201 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); 2202 } 2203 void jump(CodeStub* stub) { 2204 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); 2205 } 2206 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } 2207 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { 2208 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2209 append(new LIR_OpBranch(cond, type, block)); 2210 } 2211 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { 2212 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2213 append(new LIR_OpBranch(cond, type, stub)); 2214 } 2215 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { 2216 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); 2217 append(new LIR_OpBranch(cond, type, block, unordered)); 2218 } 2219 2220 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2221 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2222 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2223 2224 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2225 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2226 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2227 2228 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } 2229 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); 2230 2231 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { 2232 append(new LIR_OpRTCall(routine, tmp, result, arguments)); 2233 } 2234 2235 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, 2236 LIR_OprList* arguments, CodeEmitInfo* info) { 2237 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); 2238 } 2239 2240 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } 2241 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); 2242 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); 2243 2244 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } 2245 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } 2246 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } 2247 2248 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } 2249 2250 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); } 2251 2252 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } 2253 2254 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); 2255 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci); 2256 2257 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 2258 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 2259 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 2260 ciMethod* profiled_method, int profiled_bci); 2261 // MethodData* profiling 2262 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { 2263 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass)); 2264 } 2265 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) { 2266 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict)); 2267 } 2268 2269 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); } 2270 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); } 2271 #ifdef ASSERT 2272 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); } 2273 #endif 2274 }; 2275 2276 void print_LIR(BlockList* blocks); 2277 2278 class LIR_InsertionBuffer : public CompilationResourceObj { 2279 private: 2280 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) 2281 2282 // list of insertion points. index and count are stored alternately: 2283 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted 2284 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index 2285 intStack _index_and_count; 2286 2287 // the LIR_Ops to be inserted 2288 LIR_OpList _ops; 2289 2290 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } 2291 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } 2292 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } 2293 2294 #ifdef ASSERT 2295 void verify(); 2296 #endif 2297 public: 2298 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } 2299 2300 // must be called before using the insertion buffer 2301 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } 2302 bool initialized() const { return _lir != NULL; } 2303 // called automatically when the buffer is appended to the LIR_List 2304 void finish() { _lir = NULL; } 2305 2306 // accessors 2307 LIR_List* lir_list() const { return _lir; } 2308 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } 2309 int index_at(int i) const { return _index_and_count.at((i << 1)); } 2310 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } 2311 2312 int number_of_ops() const { return _ops.length(); } 2313 LIR_Op* op_at(int i) const { return _ops.at(i); } 2314 2315 // append an instruction to the buffer 2316 void append(int index, LIR_Op* op); 2317 2318 // instruction 2319 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 2320 }; 2321 2322 2323 // 2324 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. 2325 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes 2326 // information about the input, output and temporaries used by the 2327 // op to be recorded. It also records whether the op has call semantics 2328 // and also records all the CodeEmitInfos used by this op. 2329 // 2330 2331 2332 class LIR_OpVisitState: public StackObj { 2333 public: 2334 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; 2335 2336 enum { 2337 maxNumberOfOperands = 20, 2338 maxNumberOfInfos = 4 2339 }; 2340 2341 private: 2342 LIR_Op* _op; 2343 2344 // optimization: the operands and infos are not stored in a variable-length 2345 // list, but in a fixed-size array to save time of size checks and resizing 2346 int _oprs_len[numModes]; 2347 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; 2348 int _info_len; 2349 CodeEmitInfo* _info_new[maxNumberOfInfos]; 2350 2351 bool _has_call; 2352 bool _has_slow_case; 2353 2354 2355 // only include register operands 2356 // addresses are decomposed to the base and index registers 2357 // constants and stack operands are ignored 2358 void append(LIR_Opr& opr, OprMode mode) { 2359 assert(opr->is_valid(), "should not call this otherwise"); 2360 assert(mode >= 0 && mode < numModes, "bad mode"); 2361 2362 if (opr->is_register()) { 2363 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2364 _oprs_new[mode][_oprs_len[mode]++] = &opr; 2365 2366 } else if (opr->is_pointer()) { 2367 LIR_Address* address = opr->as_address_ptr(); 2368 if (address != NULL) { 2369 // special handling for addresses: add base and index register of the address 2370 // both are always input operands or temp if we want to extend 2371 // their liveness! 2372 if (mode == outputMode) { 2373 mode = inputMode; 2374 } 2375 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses"); 2376 if (address->_base->is_valid()) { 2377 assert(address->_base->is_register(), "must be"); 2378 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2379 _oprs_new[mode][_oprs_len[mode]++] = &address->_base; 2380 } 2381 if (address->_index->is_valid()) { 2382 assert(address->_index->is_register(), "must be"); 2383 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2384 _oprs_new[mode][_oprs_len[mode]++] = &address->_index; 2385 } 2386 2387 } else { 2388 assert(opr->is_constant(), "constant operands are not processed"); 2389 } 2390 } else { 2391 assert(opr->is_stack(), "stack operands are not processed"); 2392 } 2393 } 2394 2395 void append(CodeEmitInfo* info) { 2396 assert(info != NULL, "should not call this otherwise"); 2397 assert(_info_len < maxNumberOfInfos, "array overflow"); 2398 _info_new[_info_len++] = info; 2399 } 2400 2401 public: 2402 LIR_OpVisitState() { reset(); } 2403 2404 LIR_Op* op() const { return _op; } 2405 void set_op(LIR_Op* op) { reset(); _op = op; } 2406 2407 bool has_call() const { return _has_call; } 2408 bool has_slow_case() const { return _has_slow_case; } 2409 2410 void reset() { 2411 _op = NULL; 2412 _has_call = false; 2413 _has_slow_case = false; 2414 2415 _oprs_len[inputMode] = 0; 2416 _oprs_len[tempMode] = 0; 2417 _oprs_len[outputMode] = 0; 2418 _info_len = 0; 2419 } 2420 2421 2422 int opr_count(OprMode mode) const { 2423 assert(mode >= 0 && mode < numModes, "bad mode"); 2424 return _oprs_len[mode]; 2425 } 2426 2427 LIR_Opr opr_at(OprMode mode, int index) const { 2428 assert(mode >= 0 && mode < numModes, "bad mode"); 2429 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2430 return *_oprs_new[mode][index]; 2431 } 2432 2433 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { 2434 assert(mode >= 0 && mode < numModes, "bad mode"); 2435 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2436 *_oprs_new[mode][index] = opr; 2437 } 2438 2439 int info_count() const { 2440 return _info_len; 2441 } 2442 2443 CodeEmitInfo* info_at(int index) const { 2444 assert(index < _info_len, "index out of bounds"); 2445 return _info_new[index]; 2446 } 2447 2448 XHandlers* all_xhandler(); 2449 2450 // collects all register operands of the instruction 2451 void visit(LIR_Op* op); 2452 2453 #ifdef ASSERT 2454 // check that an operation has no operands 2455 bool no_operands(LIR_Op* op); 2456 #endif 2457 2458 // LIR_Op visitor functions use these to fill in the state 2459 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } 2460 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } 2461 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } 2462 void do_info(CodeEmitInfo* info) { append(info); } 2463 2464 void do_stub(CodeStub* stub); 2465 void do_call() { _has_call = true; } 2466 void do_slow_case() { _has_slow_case = true; } 2467 void do_slow_case(CodeEmitInfo* info) { 2468 _has_slow_case = true; 2469 append(info); 2470 } 2471 }; 2472 2473 2474 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; 2475 2476 #endif // SHARE_VM_C1_C1_LIR_HPP