1 /*
2 * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "ci/ciValueKlass.hpp"
37 #include "gc/shared/c1/barrierSetC1.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "vmreg_x86.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 LIR_Opr res = result();
52
53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
54 // make sure that it is a byte register
55 assert(!value()->type()->is_float() && !value()->type()->is_double(),
56 "can't load floats in byte register");
57 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
58 __ move(res, reg);
59
60 _result = reg;
61 }
62 }
63
64
65 void LIRItem::load_nonconstant() {
66 LIR_Opr r = value()->operand();
67 if (r->is_constant()) {
68 _result = r;
69 } else {
70 load_item();
71 }
72 }
73
74 //--------------------------------------------------------------
75 // LIRGenerator
76 //--------------------------------------------------------------
77
78
79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
88
89
90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
91 LIR_Opr opr;
92 switch (type->tag()) {
93 case intTag: opr = FrameMap::rax_opr; break;
94 case objectTag: opr = FrameMap::rax_oop_opr; break;
95 case longTag: opr = FrameMap::long0_opr; break;
96 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
97 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
98
99 case addressTag:
100 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
101 }
102
103 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
104 return opr;
105 }
106
107
108 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
109 LIR_Opr reg = new_register(T_INT);
110 set_vreg_flag(reg, LIRGenerator::byte_reg);
111 return reg;
112 }
113
114
115 //--------- loading items into registers --------------------------------
116
117
118 // i486 instructions can inline constants
119 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
120 if (type == T_SHORT || type == T_CHAR) {
121 // there is no immediate move of word values in asembler_i486.?pp
122 return false;
123 }
124 Constant* c = v->as_Constant();
125 if (c && c->state_before() == NULL) {
126 // constants of any type can be stored directly, except for
127 // unloaded object constants.
128 return true;
129 }
130 return false;
131 }
132
133
134 bool LIRGenerator::can_inline_as_constant(Value v) const {
135 if (v->type()->tag() == longTag) return false;
136 return v->type()->tag() != objectTag ||
137 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
138 }
139
140
141 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
142 if (c->type() == T_LONG) return false;
143 return c->type() != T_OBJECT || c->as_jobject() == NULL;
144 }
145
146
147 LIR_Opr LIRGenerator::safepoint_poll_register() {
148 NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
149 return LIR_OprFact::illegalOpr;
150 }
151
152
153 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
154 int shift, int disp, BasicType type) {
155 assert(base->is_register(), "must be");
156 if (index->is_constant()) {
157 LIR_Const *constant = index->as_constant_ptr();
158 #ifdef _LP64
159 jlong c;
160 if (constant->type() == T_INT) {
161 c = (jlong(index->as_jint()) << shift) + disp;
162 } else {
163 assert(constant->type() == T_LONG, "should be");
164 c = (index->as_jlong() << shift) + disp;
165 }
166 if ((jlong)((jint)c) == c) {
167 return new LIR_Address(base, (jint)c, type);
168 } else {
169 LIR_Opr tmp = new_register(T_LONG);
170 __ move(index, tmp);
171 return new LIR_Address(base, tmp, type);
172 }
173 #else
174 return new LIR_Address(base,
175 ((intx)(constant->as_jint()) << shift) + disp,
176 type);
177 #endif
178 } else {
179 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
180 }
181 }
182
183
184 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
185 BasicType type) {
186 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
187
188 LIR_Address* addr;
189 if (index_opr->is_constant()) {
190 int elem_size = type2aelembytes(type);
191 addr = new LIR_Address(array_opr,
192 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
193 } else {
194 #ifdef _LP64
195 if (index_opr->type() == T_INT) {
196 LIR_Opr tmp = new_register(T_LONG);
197 __ convert(Bytecodes::_i2l, index_opr, tmp);
198 index_opr = tmp;
199 }
200 #endif // _LP64
201 addr = new LIR_Address(array_opr,
202 index_opr,
203 LIR_Address::scale(type),
204 offset_in_bytes, type);
205 }
206 return addr;
207 }
208
209
210 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
211 LIR_Opr r = NULL;
212 if (type == T_LONG) {
213 r = LIR_OprFact::longConst(x);
214 } else if (type == T_INT) {
215 r = LIR_OprFact::intConst(x);
216 } else {
217 ShouldNotReachHere();
218 }
219 return r;
220 }
221
222 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
223 LIR_Opr pointer = new_pointer_register();
224 __ move(LIR_OprFact::intptrConst(counter), pointer);
225 LIR_Address* addr = new LIR_Address(pointer, type);
226 increment_counter(addr, step);
227 }
228
229
230 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
231 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
232 }
233
234 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
235 __ cmp_mem_int(condition, base, disp, c, info);
236 }
237
238
239 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
240 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
241 }
242
243
244 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
245 if (tmp->is_valid() && c > 0 && c < max_jint) {
246 if (is_power_of_2(c + 1)) {
247 __ move(left, tmp);
248 __ shift_left(left, log2_jint(c + 1), left);
249 __ sub(left, tmp, result);
250 return true;
251 } else if (is_power_of_2(c - 1)) {
252 __ move(left, tmp);
253 __ shift_left(left, log2_jint(c - 1), left);
254 __ add(left, tmp, result);
255 return true;
256 }
257 }
258 return false;
259 }
260
261
262 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
263 BasicType type = item->type();
264 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
265 }
266
267 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
268 LIR_Opr tmp1 = new_register(objectType);
269 LIR_Opr tmp2 = new_register(objectType);
270 LIR_Opr tmp3 = new_register(objectType);
271 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
272 }
273
274 //----------------------------------------------------------------------
275 // visitor functions
276 //----------------------------------------------------------------------
277
278 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
279 assert(x->is_pinned(),"");
280 LIRItem obj(x->obj(), this);
281 obj.load_item();
282
283 set_no_result(x);
284
285 // "lock" stores the address of the monitor stack slot, so this is not an oop
286 LIR_Opr lock = new_register(T_INT);
287 // Need a scratch register for biased locking on x86
288 LIR_Opr scratch = LIR_OprFact::illegalOpr;
289 if (UseBiasedLocking || x->maybe_valuetype()) {
290 scratch = new_register(T_INT);
291 }
292
293 CodeEmitInfo* info_for_exception = NULL;
294 if (x->needs_null_check()) {
295 info_for_exception = state_for(x);
296 }
297
298 CodeStub* throw_imse_stub = x->maybe_valuetype() ?
299 new SimpleExceptionStub(Runtime1::throw_illegal_monitor_state_exception_id,
300 LIR_OprFact::illegalOpr, state_for(x))
301 : NULL;
302
303 // this CodeEmitInfo must not have the xhandlers because here the
304 // object is already locked (xhandlers expect object to be unlocked)
305 CodeEmitInfo* info = state_for(x, x->state(), true);
306 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
307 x->monitor_no(), info_for_exception, info, throw_imse_stub);
308 }
309
310
311 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
312 assert(x->is_pinned(),"");
313
314 LIRItem obj(x->obj(), this);
315 obj.dont_load_item();
316
317 LIR_Opr lock = new_register(T_INT);
318 LIR_Opr obj_temp = new_register(T_INT);
319 set_no_result(x);
320 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
321 }
322
323
324 // _ineg, _lneg, _fneg, _dneg
325 void LIRGenerator::do_NegateOp(NegateOp* x) {
326 LIRItem value(x->x(), this);
327 value.set_destroys_register();
328 value.load_item();
329 LIR_Opr reg = rlock(x);
330
331 LIR_Opr tmp = LIR_OprFact::illegalOpr;
332 #ifdef _LP64
333 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
334 if (x->type()->tag() == doubleTag) {
335 tmp = new_register(T_DOUBLE);
336 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
337 }
338 else if (x->type()->tag() == floatTag) {
339 tmp = new_register(T_FLOAT);
340 __ move(LIR_OprFact::floatConst(-0.0), tmp);
341 }
342 }
343 #endif
344 __ negate(value.result(), reg, tmp);
345
346 set_result(x, round_item(reg));
347 }
348
349
350 // for _fadd, _fmul, _fsub, _fdiv, _frem
351 // _dadd, _dmul, _dsub, _ddiv, _drem
352 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
353 LIRItem left(x->x(), this);
354 LIRItem right(x->y(), this);
355 LIRItem* left_arg = &left;
356 LIRItem* right_arg = &right;
357 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
358 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
359 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
360 left.load_item();
361 } else {
362 left.dont_load_item();
363 }
364
365 // do not load right operand if it is a constant. only 0 and 1 are
366 // loaded because there are special instructions for loading them
367 // without memory access (not needed for SSE2 instructions)
368 bool must_load_right = false;
369 if (right.is_constant()) {
370 LIR_Const* c = right.result()->as_constant_ptr();
371 assert(c != NULL, "invalid constant");
372 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
373
374 if (c->type() == T_FLOAT) {
375 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
376 } else {
377 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
378 }
379 }
380
381 if (must_load_both) {
382 // frem and drem destroy also right operand, so move it to a new register
383 right.set_destroys_register();
384 right.load_item();
385 } else if (right.is_register() || must_load_right) {
386 right.load_item();
387 } else {
388 right.dont_load_item();
389 }
390 LIR_Opr reg = rlock(x);
391 LIR_Opr tmp = LIR_OprFact::illegalOpr;
392 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
393 tmp = new_register(T_DOUBLE);
394 }
395
396 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
397 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
398 LIR_Opr fpu0, fpu1;
399 if (x->op() == Bytecodes::_frem) {
400 fpu0 = LIR_OprFact::single_fpu(0);
401 fpu1 = LIR_OprFact::single_fpu(1);
402 } else {
403 fpu0 = LIR_OprFact::double_fpu(0);
404 fpu1 = LIR_OprFact::double_fpu(1);
405 }
406 __ move(right.result(), fpu1); // order of left and right operand is important!
407 __ move(left.result(), fpu0);
408 __ rem (fpu0, fpu1, fpu0);
409 __ move(fpu0, reg);
410
411 } else {
412 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
413 }
414
415 set_result(x, round_item(reg));
416 }
417
418
419 // for _ladd, _lmul, _lsub, _ldiv, _lrem
420 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
421 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
422 // long division is implemented as a direct call into the runtime
423 LIRItem left(x->x(), this);
424 LIRItem right(x->y(), this);
425
426 // the check for division by zero destroys the right operand
427 right.set_destroys_register();
428
429 BasicTypeList signature(2);
430 signature.append(T_LONG);
431 signature.append(T_LONG);
432 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
433
434 // check for division by zero (destroys registers of right operand!)
435 CodeEmitInfo* info = state_for(x);
436
437 const LIR_Opr result_reg = result_register_for(x->type());
438 left.load_item_force(cc->at(1));
439 right.load_item();
440
441 __ move(right.result(), cc->at(0));
442
443 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
444 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
445
446 address entry = NULL;
447 switch (x->op()) {
448 case Bytecodes::_lrem:
449 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
450 break; // check if dividend is 0 is done elsewhere
451 case Bytecodes::_ldiv:
452 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
453 break; // check if dividend is 0 is done elsewhere
454 case Bytecodes::_lmul:
455 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
456 break;
457 default:
458 ShouldNotReachHere();
459 }
460
461 LIR_Opr result = rlock_result(x);
462 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
463 __ move(result_reg, result);
464 } else if (x->op() == Bytecodes::_lmul) {
465 // missing test if instr is commutative and if we should swap
466 LIRItem left(x->x(), this);
467 LIRItem right(x->y(), this);
468
469 // right register is destroyed by the long mul, so it must be
470 // copied to a new register.
471 right.set_destroys_register();
472
473 left.load_item();
474 right.load_item();
475
476 LIR_Opr reg = FrameMap::long0_opr;
477 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
478 LIR_Opr result = rlock_result(x);
479 __ move(reg, result);
480 } else {
481 // missing test if instr is commutative and if we should swap
482 LIRItem left(x->x(), this);
483 LIRItem right(x->y(), this);
484
485 left.load_item();
486 // don't load constants to save register
487 right.load_nonconstant();
488 rlock_result(x);
489 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
490 }
491 }
492
493
494
495 // for: _iadd, _imul, _isub, _idiv, _irem
496 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
497 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
498 // The requirements for division and modulo
499 // input : rax,: dividend min_int
500 // reg: divisor (may not be rax,/rdx) -1
501 //
502 // output: rax,: quotient (= rax, idiv reg) min_int
503 // rdx: remainder (= rax, irem reg) 0
504
505 // rax, and rdx will be destroyed
506
507 // Note: does this invalidate the spec ???
508 LIRItem right(x->y(), this);
509 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
510
511 // call state_for before load_item_force because state_for may
512 // force the evaluation of other instructions that are needed for
513 // correct debug info. Otherwise the live range of the fix
514 // register might be too long.
515 CodeEmitInfo* info = state_for(x);
516
517 left.load_item_force(divInOpr());
518
519 right.load_item();
520
521 LIR_Opr result = rlock_result(x);
522 LIR_Opr result_reg;
523 if (x->op() == Bytecodes::_idiv) {
524 result_reg = divOutOpr();
525 } else {
526 result_reg = remOutOpr();
527 }
528
529 if (!ImplicitDiv0Checks) {
530 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
531 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
532 // Idiv/irem cannot trap (passing info would generate an assertion).
533 info = NULL;
534 }
535 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
536 if (x->op() == Bytecodes::_irem) {
537 __ irem(left.result(), right.result(), result_reg, tmp, info);
538 } else if (x->op() == Bytecodes::_idiv) {
539 __ idiv(left.result(), right.result(), result_reg, tmp, info);
540 } else {
541 ShouldNotReachHere();
542 }
543
544 __ move(result_reg, result);
545 } else {
546 // missing test if instr is commutative and if we should swap
547 LIRItem left(x->x(), this);
548 LIRItem right(x->y(), this);
549 LIRItem* left_arg = &left;
550 LIRItem* right_arg = &right;
551 if (x->is_commutative() && left.is_stack() && right.is_register()) {
552 // swap them if left is real stack (or cached) and right is real register(not cached)
553 left_arg = &right;
554 right_arg = &left;
555 }
556
557 left_arg->load_item();
558
559 // do not need to load right, as we can handle stack and constants
560 if (x->op() == Bytecodes::_imul ) {
561 // check if we can use shift instead
562 bool use_constant = false;
563 bool use_tmp = false;
564 if (right_arg->is_constant()) {
565 jint iconst = right_arg->get_jint_constant();
566 if (iconst > 0 && iconst < max_jint) {
567 if (is_power_of_2(iconst)) {
568 use_constant = true;
569 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
570 use_constant = true;
571 use_tmp = true;
572 }
573 }
574 }
575 if (use_constant) {
576 right_arg->dont_load_item();
577 } else {
578 right_arg->load_item();
579 }
580 LIR_Opr tmp = LIR_OprFact::illegalOpr;
581 if (use_tmp) {
582 tmp = new_register(T_INT);
583 }
584 rlock_result(x);
585
586 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
587 } else {
588 right_arg->dont_load_item();
589 rlock_result(x);
590 LIR_Opr tmp = LIR_OprFact::illegalOpr;
591 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
592 }
593 }
594 }
595
596
597 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
598 // when an operand with use count 1 is the left operand, then it is
599 // likely that no move for 2-operand-LIR-form is necessary
600 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
601 x->swap_operands();
602 }
603
604 ValueTag tag = x->type()->tag();
605 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
606 switch (tag) {
607 case floatTag:
608 case doubleTag: do_ArithmeticOp_FPU(x); return;
609 case longTag: do_ArithmeticOp_Long(x); return;
610 case intTag: do_ArithmeticOp_Int(x); return;
611 default: ShouldNotReachHere(); return;
612 }
613 }
614
615
616 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
617 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
618 // count must always be in rcx
619 LIRItem value(x->x(), this);
620 LIRItem count(x->y(), this);
621
622 ValueTag elemType = x->type()->tag();
623 bool must_load_count = !count.is_constant() || elemType == longTag;
624 if (must_load_count) {
625 // count for long must be in register
626 count.load_item_force(shiftCountOpr());
627 } else {
628 count.dont_load_item();
629 }
630 value.load_item();
631 LIR_Opr reg = rlock_result(x);
632
633 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
634 }
635
636
637 // _iand, _land, _ior, _lor, _ixor, _lxor
638 void LIRGenerator::do_LogicOp(LogicOp* x) {
639 // when an operand with use count 1 is the left operand, then it is
640 // likely that no move for 2-operand-LIR-form is necessary
641 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
642 x->swap_operands();
643 }
644
645 LIRItem left(x->x(), this);
646 LIRItem right(x->y(), this);
647
648 left.load_item();
649 right.load_nonconstant();
650 LIR_Opr reg = rlock_result(x);
651
652 logic_op(x->op(), reg, left.result(), right.result());
653 }
654
655
656
657 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
658 void LIRGenerator::do_CompareOp(CompareOp* x) {
659 LIRItem left(x->x(), this);
660 LIRItem right(x->y(), this);
661 ValueTag tag = x->x()->type()->tag();
662 if (tag == longTag) {
663 left.set_destroys_register();
664 }
665 left.load_item();
666 right.load_item();
667 LIR_Opr reg = rlock_result(x);
668
669 if (x->x()->type()->is_float_kind()) {
670 Bytecodes::Code code = x->op();
671 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
672 } else if (x->x()->type()->tag() == longTag) {
673 __ lcmp2int(left.result(), right.result(), reg);
674 } else {
675 Unimplemented();
676 }
677 }
678
679 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
680 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
681 if (type == T_OBJECT || type == T_ARRAY) {
682 cmp_value.load_item_force(FrameMap::rax_oop_opr);
683 new_value.load_item();
684 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
685 } else if (type == T_INT) {
686 cmp_value.load_item_force(FrameMap::rax_opr);
687 new_value.load_item();
688 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
689 } else if (type == T_LONG) {
690 cmp_value.load_item_force(FrameMap::long0_opr);
691 new_value.load_item_force(FrameMap::long1_opr);
692 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
693 } else {
694 Unimplemented();
695 }
696 LIR_Opr result = new_register(T_INT);
697 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
698 result, T_INT);
699 return result;
700 }
701
702 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
703 bool is_oop = type == T_OBJECT || type == T_ARRAY;
704 LIR_Opr result = new_register(type);
705 value.load_item();
706 // Because we want a 2-arg form of xchg and xadd
707 __ move(value.result(), result);
708 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
709 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
710 return result;
711 }
712
713 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
714 LIR_Opr result = new_register(type);
715 value.load_item();
716 // Because we want a 2-arg form of xchg and xadd
717 __ move(value.result(), result);
718 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
719 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
720 return result;
721 }
722
723 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
724 assert(x->number_of_arguments() == 3, "wrong type");
725 assert(UseFMA, "Needs FMA instructions support.");
726 LIRItem value(x->argument_at(0), this);
727 LIRItem value1(x->argument_at(1), this);
728 LIRItem value2(x->argument_at(2), this);
729
730 value2.set_destroys_register();
731
732 value.load_item();
733 value1.load_item();
734 value2.load_item();
735
736 LIR_Opr calc_input = value.result();
737 LIR_Opr calc_input1 = value1.result();
738 LIR_Opr calc_input2 = value2.result();
739 LIR_Opr calc_result = rlock_result(x);
740
741 switch (x->id()) {
742 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
743 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
744 default: ShouldNotReachHere();
745 }
746
747 }
748
749
750 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
751 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
752
753 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
754 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
755 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
756 x->id() == vmIntrinsics::_dlog10) {
757 do_LibmIntrinsic(x);
758 return;
759 }
760
761 LIRItem value(x->argument_at(0), this);
762
763 bool use_fpu = false;
764 if (UseSSE < 2) {
765 value.set_destroys_register();
766 }
767 value.load_item();
768
769 LIR_Opr calc_input = value.result();
770 LIR_Opr calc_result = rlock_result(x);
771
772 LIR_Opr tmp = LIR_OprFact::illegalOpr;
773 #ifdef _LP64
774 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
775 (x->id() == vmIntrinsics::_dabs)) {
776 tmp = new_register(T_DOUBLE);
777 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
778 }
779 #endif
780
781 switch(x->id()) {
782 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, tmp); break;
783 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
784 default: ShouldNotReachHere();
785 }
786
787 if (use_fpu) {
788 __ move(calc_result, x->operand());
789 }
790 }
791
792 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
793 LIRItem value(x->argument_at(0), this);
794 value.set_destroys_register();
795
796 LIR_Opr calc_result = rlock_result(x);
797 LIR_Opr result_reg = result_register_for(x->type());
798
799 CallingConvention* cc = NULL;
800
801 if (x->id() == vmIntrinsics::_dpow) {
802 LIRItem value1(x->argument_at(1), this);
803
804 value1.set_destroys_register();
805
806 BasicTypeList signature(2);
807 signature.append(T_DOUBLE);
808 signature.append(T_DOUBLE);
809 cc = frame_map()->c_calling_convention(&signature);
810 value.load_item_force(cc->at(0));
811 value1.load_item_force(cc->at(1));
812 } else {
813 BasicTypeList signature(1);
814 signature.append(T_DOUBLE);
815 cc = frame_map()->c_calling_convention(&signature);
816 value.load_item_force(cc->at(0));
817 }
818
819 #ifndef _LP64
820 LIR_Opr tmp = FrameMap::fpu0_double_opr;
821 result_reg = tmp;
822 switch(x->id()) {
823 case vmIntrinsics::_dexp:
824 if (StubRoutines::dexp() != NULL) {
825 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
826 } else {
827 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
828 }
829 break;
830 case vmIntrinsics::_dlog:
831 if (StubRoutines::dlog() != NULL) {
832 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
833 } else {
834 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
835 }
836 break;
837 case vmIntrinsics::_dlog10:
838 if (StubRoutines::dlog10() != NULL) {
839 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
840 } else {
841 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
842 }
843 break;
844 case vmIntrinsics::_dpow:
845 if (StubRoutines::dpow() != NULL) {
846 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
847 } else {
848 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
849 }
850 break;
851 case vmIntrinsics::_dsin:
852 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
853 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
854 } else {
855 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
856 }
857 break;
858 case vmIntrinsics::_dcos:
859 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
860 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
861 } else {
862 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
863 }
864 break;
865 case vmIntrinsics::_dtan:
866 if (StubRoutines::dtan() != NULL) {
867 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
868 } else {
869 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
870 }
871 break;
872 default: ShouldNotReachHere();
873 }
874 #else
875 switch (x->id()) {
876 case vmIntrinsics::_dexp:
877 if (StubRoutines::dexp() != NULL) {
878 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
879 } else {
880 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
881 }
882 break;
883 case vmIntrinsics::_dlog:
884 if (StubRoutines::dlog() != NULL) {
885 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
886 } else {
887 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
888 }
889 break;
890 case vmIntrinsics::_dlog10:
891 if (StubRoutines::dlog10() != NULL) {
892 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
893 } else {
894 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
895 }
896 break;
897 case vmIntrinsics::_dpow:
898 if (StubRoutines::dpow() != NULL) {
899 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
900 } else {
901 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
902 }
903 break;
904 case vmIntrinsics::_dsin:
905 if (StubRoutines::dsin() != NULL) {
906 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
907 } else {
908 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
909 }
910 break;
911 case vmIntrinsics::_dcos:
912 if (StubRoutines::dcos() != NULL) {
913 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
914 } else {
915 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
916 }
917 break;
918 case vmIntrinsics::_dtan:
919 if (StubRoutines::dtan() != NULL) {
920 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
921 } else {
922 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
923 }
924 break;
925 default: ShouldNotReachHere();
926 }
927 #endif // _LP64
928 __ move(result_reg, calc_result);
929 }
930
931 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
932 assert(x->number_of_arguments() == 5, "wrong type");
933
934 // Make all state_for calls early since they can emit code
935 CodeEmitInfo* info = state_for(x, x->state());
936
937 LIRItem src(x->argument_at(0), this);
938 LIRItem src_pos(x->argument_at(1), this);
939 LIRItem dst(x->argument_at(2), this);
940 LIRItem dst_pos(x->argument_at(3), this);
941 LIRItem length(x->argument_at(4), this);
942
943 // operands for arraycopy must use fixed registers, otherwise
944 // LinearScan will fail allocation (because arraycopy always needs a
945 // call)
946
947 #ifndef _LP64
948 src.load_item_force (FrameMap::rcx_oop_opr);
949 src_pos.load_item_force (FrameMap::rdx_opr);
950 dst.load_item_force (FrameMap::rax_oop_opr);
951 dst_pos.load_item_force (FrameMap::rbx_opr);
952 length.load_item_force (FrameMap::rdi_opr);
953 LIR_Opr tmp = (FrameMap::rsi_opr);
954 #else
955
956 // The java calling convention will give us enough registers
957 // so that on the stub side the args will be perfect already.
958 // On the other slow/special case side we call C and the arg
959 // positions are not similar enough to pick one as the best.
960 // Also because the java calling convention is a "shifted" version
961 // of the C convention we can process the java args trivially into C
962 // args without worry of overwriting during the xfer
963
964 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
965 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
966 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
967 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
968 length.load_item_force (FrameMap::as_opr(j_rarg4));
969
970 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
971 #endif // LP64
972
973 set_no_result(x);
974
975 int flags;
976 ciArrayKlass* expected_type;
977 arraycopy_helper(x, &flags, &expected_type);
978
979 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
980 }
981
982 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
983 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
984 // Make all state_for calls early since they can emit code
985 LIR_Opr result = rlock_result(x);
986 int flags = 0;
987 switch (x->id()) {
988 case vmIntrinsics::_updateCRC32: {
989 LIRItem crc(x->argument_at(0), this);
990 LIRItem val(x->argument_at(1), this);
991 // val is destroyed by update_crc32
992 val.set_destroys_register();
993 crc.load_item();
994 val.load_item();
995 __ update_crc32(crc.result(), val.result(), result);
996 break;
997 }
998 case vmIntrinsics::_updateBytesCRC32:
999 case vmIntrinsics::_updateByteBufferCRC32: {
1000 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1001
1002 LIRItem crc(x->argument_at(0), this);
1003 LIRItem buf(x->argument_at(1), this);
1004 LIRItem off(x->argument_at(2), this);
1005 LIRItem len(x->argument_at(3), this);
1006 buf.load_item();
1007 off.load_nonconstant();
1008
1009 LIR_Opr index = off.result();
1010 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1011 if(off.result()->is_constant()) {
1012 index = LIR_OprFact::illegalOpr;
1013 offset += off.result()->as_jint();
1014 }
1015 LIR_Opr base_op = buf.result();
1016
1017 #ifndef _LP64
1018 if (!is_updateBytes) { // long b raw address
1019 base_op = new_register(T_INT);
1020 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1021 }
1022 #else
1023 if (index->is_valid()) {
1024 LIR_Opr tmp = new_register(T_LONG);
1025 __ convert(Bytecodes::_i2l, index, tmp);
1026 index = tmp;
1027 }
1028 #endif
1029
1030 if (is_updateBytes) {
1031 base_op = access_resolve(IS_NOT_NULL | ACCESS_READ, base_op);
1032 }
1033
1034 LIR_Address* a = new LIR_Address(base_op,
1035 index,
1036 offset,
1037 T_BYTE);
1038 BasicTypeList signature(3);
1039 signature.append(T_INT);
1040 signature.append(T_ADDRESS);
1041 signature.append(T_INT);
1042 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1043 const LIR_Opr result_reg = result_register_for(x->type());
1044
1045 LIR_Opr addr = new_pointer_register();
1046 __ leal(LIR_OprFact::address(a), addr);
1047
1048 crc.load_item_force(cc->at(0));
1049 __ move(addr, cc->at(1));
1050 len.load_item_force(cc->at(2));
1051
1052 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1053 __ move(result_reg, result);
1054
1055 break;
1056 }
1057 default: {
1058 ShouldNotReachHere();
1059 }
1060 }
1061 }
1062
1063 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1064 Unimplemented();
1065 }
1066
1067 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1068 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1069
1070 // Make all state_for calls early since they can emit code
1071 LIR_Opr result = rlock_result(x);
1072
1073 LIRItem a(x->argument_at(0), this); // Object
1074 LIRItem aOffset(x->argument_at(1), this); // long
1075 LIRItem b(x->argument_at(2), this); // Object
1076 LIRItem bOffset(x->argument_at(3), this); // long
1077 LIRItem length(x->argument_at(4), this); // int
1078 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1079
1080 a.load_item();
1081 aOffset.load_nonconstant();
1082 b.load_item();
1083 bOffset.load_nonconstant();
1084
1085 long constant_aOffset = 0;
1086 LIR_Opr result_aOffset = aOffset.result();
1087 if (result_aOffset->is_constant()) {
1088 constant_aOffset = result_aOffset->as_jlong();
1089 result_aOffset = LIR_OprFact::illegalOpr;
1090 }
1091 LIR_Opr result_a = access_resolve(ACCESS_READ, a.result());
1092
1093 long constant_bOffset = 0;
1094 LIR_Opr result_bOffset = bOffset.result();
1095 if (result_bOffset->is_constant()) {
1096 constant_bOffset = result_bOffset->as_jlong();
1097 result_bOffset = LIR_OprFact::illegalOpr;
1098 }
1099 LIR_Opr result_b = access_resolve(ACCESS_READ, b.result());
1100
1101 #ifndef _LP64
1102 result_a = new_register(T_INT);
1103 __ convert(Bytecodes::_l2i, a.result(), result_a);
1104 result_b = new_register(T_INT);
1105 __ convert(Bytecodes::_l2i, b.result(), result_b);
1106 #endif
1107
1108
1109 LIR_Address* addr_a = new LIR_Address(result_a,
1110 result_aOffset,
1111 constant_aOffset,
1112 T_BYTE);
1113
1114 LIR_Address* addr_b = new LIR_Address(result_b,
1115 result_bOffset,
1116 constant_bOffset,
1117 T_BYTE);
1118
1119 BasicTypeList signature(4);
1120 signature.append(T_ADDRESS);
1121 signature.append(T_ADDRESS);
1122 signature.append(T_INT);
1123 signature.append(T_INT);
1124 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1125 const LIR_Opr result_reg = result_register_for(x->type());
1126
1127 LIR_Opr ptr_addr_a = new_pointer_register();
1128 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1129
1130 LIR_Opr ptr_addr_b = new_pointer_register();
1131 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1132
1133 __ move(ptr_addr_a, cc->at(0));
1134 __ move(ptr_addr_b, cc->at(1));
1135 length.load_item_force(cc->at(2));
1136 log2ArrayIndexScale.load_item_force(cc->at(3));
1137
1138 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1139 __ move(result_reg, result);
1140 }
1141
1142 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1143 // _i2b, _i2c, _i2s
1144 LIR_Opr fixed_register_for(BasicType type) {
1145 switch (type) {
1146 case T_FLOAT: return FrameMap::fpu0_float_opr;
1147 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1148 case T_INT: return FrameMap::rax_opr;
1149 case T_LONG: return FrameMap::long0_opr;
1150 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1151 }
1152 }
1153
1154 void LIRGenerator::do_Convert(Convert* x) {
1155 // flags that vary for the different operations and different SSE-settings
1156 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1157
1158 switch (x->op()) {
1159 case Bytecodes::_i2l: // fall through
1160 case Bytecodes::_l2i: // fall through
1161 case Bytecodes::_i2b: // fall through
1162 case Bytecodes::_i2c: // fall through
1163 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1164
1165 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1166 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1167 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1168 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1169 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1170 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1171 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1172 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1173 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1174 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1175 default: ShouldNotReachHere();
1176 }
1177
1178 LIRItem value(x->value(), this);
1179 value.load_item();
1180 LIR_Opr input = value.result();
1181 LIR_Opr result = rlock(x);
1182
1183 // arguments of lir_convert
1184 LIR_Opr conv_input = input;
1185 LIR_Opr conv_result = result;
1186 ConversionStub* stub = NULL;
1187
1188 if (fixed_input) {
1189 conv_input = fixed_register_for(input->type());
1190 __ move(input, conv_input);
1191 }
1192
1193 assert(fixed_result == false || round_result == false, "cannot set both");
1194 if (fixed_result) {
1195 conv_result = fixed_register_for(result->type());
1196 } else if (round_result) {
1197 result = new_register(result->type());
1198 set_vreg_flag(result, must_start_in_memory);
1199 }
1200
1201 if (needs_stub) {
1202 stub = new ConversionStub(x->op(), conv_input, conv_result);
1203 }
1204
1205 __ convert(x->op(), conv_input, conv_result, stub);
1206
1207 if (result != conv_result) {
1208 __ move(conv_result, result);
1209 }
1210
1211 assert(result->is_virtual(), "result must be virtual register");
1212 set_result(x, result);
1213 }
1214
1215
1216 void LIRGenerator::do_NewInstance(NewInstance* x) {
1217 print_if_not_loaded(x);
1218
1219 CodeEmitInfo* info = state_for(x, x->state());
1220 LIR_Opr reg = result_register_for(x->type());
1221 new_instance(reg, x->klass(), x->is_unresolved(),
1222 FrameMap::rcx_oop_opr,
1223 FrameMap::rdi_oop_opr,
1224 FrameMap::rsi_oop_opr,
1225 LIR_OprFact::illegalOpr,
1226 FrameMap::rdx_metadata_opr, info);
1227 LIR_Opr result = rlock_result(x);
1228 __ move(reg, result);
1229 }
1230
1231 void LIRGenerator::do_NewValueTypeInstance (NewValueTypeInstance* x) {
1232 // Mapping to do_NewInstance (same code)
1233 CodeEmitInfo* info = state_for(x, x->state());
1234 x->set_to_object_type();
1235 LIR_Opr reg = result_register_for(x->type());
1236 new_instance(reg, x->klass(), x->is_unresolved(),
1237 FrameMap::rcx_oop_opr,
1238 FrameMap::rdi_oop_opr,
1239 FrameMap::rsi_oop_opr,
1240 LIR_OprFact::illegalOpr,
1241 FrameMap::rdx_metadata_opr, info);
1242 LIR_Opr result = rlock_result(x);
1243 __ move(reg, result);
1244
1245 }
1246
1247 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1248 CodeEmitInfo* info = state_for(x, x->state());
1249
1250 LIRItem length(x->length(), this);
1251 length.load_item_force(FrameMap::rbx_opr);
1252
1253 LIR_Opr reg = result_register_for(x->type());
1254 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1255 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1256 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1257 LIR_Opr tmp4 = reg;
1258 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1259 LIR_Opr len = length.result();
1260 BasicType elem_type = x->elt_type();
1261
1262 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1263
1264 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1265 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1266
1267 LIR_Opr result = rlock_result(x);
1268 __ move(reg, result);
1269 }
1270
1271
1272 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1273 LIRItem length(x->length(), this);
1274 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1275 // and therefore provide the state before the parameters have been consumed
1276 CodeEmitInfo* patching_info = NULL;
1277 if (!x->klass()->is_loaded() || PatchALot) {
1278 patching_info = state_for(x, x->state_before());
1279 }
1280
1281 CodeEmitInfo* info = state_for(x, x->state());
1282
1283 const LIR_Opr reg = result_register_for(x->type());
1284 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1285 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1286 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1287 LIR_Opr tmp4 = reg;
1288 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1289
1290 length.load_item_force(FrameMap::rbx_opr);
1291 LIR_Opr len = length.result();
1292
1293 ciKlass* obj = (ciKlass*) x->exact_type();
1294 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, obj->is_value_array_klass());
1295 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1296 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1297 }
1298 klass2reg_with_patching(klass_reg, obj, patching_info);
1299 if (obj->is_value_array_klass()) {
1300 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_VALUETYPE, klass_reg, slow_path);
1301 } else {
1302 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1303 }
1304
1305 LIR_Opr result = rlock_result(x);
1306 __ move(reg, result);
1307 }
1308
1309
1310 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1311 Values* dims = x->dims();
1312 int i = dims->length();
1313 LIRItemList* items = new LIRItemList(i, i, NULL);
1314 while (i-- > 0) {
1315 LIRItem* size = new LIRItem(dims->at(i), this);
1316 items->at_put(i, size);
1317 }
1318
1319 // Evaluate state_for early since it may emit code.
1320 CodeEmitInfo* patching_info = NULL;
1321 if (!x->klass()->is_loaded() || PatchALot) {
1322 patching_info = state_for(x, x->state_before());
1323
1324 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1325 // clone all handlers (NOTE: Usually this is handled transparently
1326 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1327 // is done explicitly here because a stub isn't being used).
1328 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1329 }
1330 CodeEmitInfo* info = state_for(x, x->state());
1331
1332 i = dims->length();
1333 while (i-- > 0) {
1334 LIRItem* size = items->at(i);
1335 size->load_nonconstant();
1336
1337 store_stack_parameter(size->result(), in_ByteSize(i*4));
1338 }
1339
1340 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1341 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1342
1343 LIR_Opr rank = FrameMap::rbx_opr;
1344 __ move(LIR_OprFact::intConst(x->rank()), rank);
1345 LIR_Opr varargs = FrameMap::rcx_opr;
1346 __ move(FrameMap::rsp_opr, varargs);
1347 LIR_OprList* args = new LIR_OprList(3);
1348 args->append(klass_reg);
1349 args->append(rank);
1350 args->append(varargs);
1351 LIR_Opr reg = result_register_for(x->type());
1352 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1353 LIR_OprFact::illegalOpr,
1354 reg, args, info);
1355
1356 LIR_Opr result = rlock_result(x);
1357 __ move(reg, result);
1358 }
1359
1360
1361 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1362 // nothing to do for now
1363 }
1364
1365
1366 void LIRGenerator::do_CheckCast(CheckCast* x) {
1367 LIRItem obj(x->obj(), this);
1368
1369 CodeEmitInfo* patching_info = NULL;
1370 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1371 // must do this before locking the destination register as an oop register,
1372 // and before the obj is loaded (the latter is for deoptimization)
1373 patching_info = state_for(x, x->state_before());
1374 }
1375 obj.load_item();
1376
1377 // info for exceptions
1378 CodeEmitInfo* info_for_exception =
1379 (x->needs_exception_state() ? state_for(x) :
1380 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1381
1382 if (x->is_never_null()) {
1383 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception));
1384 }
1385
1386 CodeStub* stub;
1387 if (x->is_incompatible_class_change_check()) {
1388 assert(patching_info == NULL, "can't patch this");
1389 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1390 } else if (x->is_invokespecial_receiver_check()) {
1391 assert(patching_info == NULL, "can't patch this");
1392 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1393 } else {
1394 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1395 }
1396 LIR_Opr reg = rlock_result(x);
1397 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1398 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1399 tmp3 = new_register(objectType);
1400 }
1401 __ checkcast(reg, obj.result(), x->klass(),
1402 new_register(objectType), new_register(objectType), tmp3,
1403 x->direct_compare(), info_for_exception, patching_info, stub,
1404 x->profiled_method(), x->profiled_bci(), x->is_never_null());
1405 }
1406
1407
1408 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1409 LIRItem obj(x->obj(), this);
1410
1411 // result and test object may not be in same register
1412 LIR_Opr reg = rlock_result(x);
1413 CodeEmitInfo* patching_info = NULL;
1414 if ((!x->klass()->is_loaded() || PatchALot)) {
1415 // must do this before locking the destination register as an oop register
1416 patching_info = state_for(x, x->state_before());
1417 }
1418 obj.load_item();
1419 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1420 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1421 tmp3 = new_register(objectType);
1422 }
1423 __ instanceof(reg, obj.result(), x->klass(),
1424 new_register(objectType), new_register(objectType), tmp3,
1425 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1426 }
1427
1428
1429 void LIRGenerator::do_If(If* x) {
1430 assert(x->number_of_sux() == 2, "inconsistency");
1431 ValueTag tag = x->x()->type()->tag();
1432 bool is_safepoint = x->is_safepoint();
1433
1434 If::Condition cond = x->cond();
1435
1436 LIRItem xitem(x->x(), this);
1437 LIRItem yitem(x->y(), this);
1438 LIRItem* xin = &xitem;
1439 LIRItem* yin = &yitem;
1440
1441 if (tag == longTag) {
1442 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1443 // mirror for other conditions
1444 if (cond == If::gtr || cond == If::leq) {
1445 cond = Instruction::mirror(cond);
1446 xin = &yitem;
1447 yin = &xitem;
1448 }
1449 xin->set_destroys_register();
1450 }
1451 xin->load_item();
1452 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1453 // inline long zero
1454 yin->dont_load_item();
1455 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1456 // longs cannot handle constants at right side
1457 yin->load_item();
1458 } else {
1459 yin->dont_load_item();
1460 }
1461
1462 LIR_Opr left = xin->result();
1463 LIR_Opr right = yin->result();
1464
1465 set_no_result(x);
1466
1467 // add safepoint before generating condition code so it can be recomputed
1468 if (x->is_safepoint()) {
1469 // increment backedge counter if needed
1470 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1471 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1472 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1473 }
1474
1475 __ cmp(lir_cond(cond), left, right);
1476 // Generate branch profiling. Profiling code doesn't kill flags.
1477 profile_branch(x, cond);
1478 move_to_phi(x->state());
1479 if (x->x()->type()->is_float_kind()) {
1480 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1481 } else {
1482 __ branch(lir_cond(cond), right->type(), x->tsux());
1483 }
1484 assert(x->default_sux() == x->fsux(), "wrong destination above");
1485 __ jump(x->default_sux());
1486 }
1487
1488
1489 LIR_Opr LIRGenerator::getThreadPointer() {
1490 #ifdef _LP64
1491 return FrameMap::as_pointer_opr(r15_thread);
1492 #else
1493 LIR_Opr result = new_register(T_INT);
1494 __ get_thread(result);
1495 return result;
1496 #endif //
1497 }
1498
1499 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1500 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1501 LIR_OprList* args = new LIR_OprList();
1502 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1503 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1504 }
1505
1506
1507 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1508 CodeEmitInfo* info) {
1509 if (address->type() == T_LONG) {
1510 address = new LIR_Address(address->base(),
1511 address->index(), address->scale(),
1512 address->disp(), T_DOUBLE);
1513 // Transfer the value atomically by using FP moves. This means
1514 // the value has to be moved between CPU and FPU registers. It
1515 // always has to be moved through spill slot since there's no
1516 // quick way to pack the value into an SSE register.
1517 LIR_Opr temp_double = new_register(T_DOUBLE);
1518 LIR_Opr spill = new_register(T_LONG);
1519 set_vreg_flag(spill, must_start_in_memory);
1520 __ move(value, spill);
1521 __ volatile_move(spill, temp_double, T_LONG);
1522 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1523 } else {
1524 __ store(value, address, info);
1525 }
1526 }
1527
1528 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1529 CodeEmitInfo* info) {
1530 if (address->type() == T_LONG) {
1531 address = new LIR_Address(address->base(),
1532 address->index(), address->scale(),
1533 address->disp(), T_DOUBLE);
1534 // Transfer the value atomically by using FP moves. This means
1535 // the value has to be moved between CPU and FPU registers. In
1536 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1537 // SSE2+ mode it can be moved directly.
1538 LIR_Opr temp_double = new_register(T_DOUBLE);
1539 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1540 __ volatile_move(temp_double, result, T_LONG);
1541 if (UseSSE < 2) {
1542 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1543 set_vreg_flag(result, must_start_in_memory);
1544 }
1545 } else {
1546 __ load(address, result, info);
1547 }
1548 }