1 /*
2 * Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_C1_C1_LIRASSEMBLER_HPP
26 #define SHARE_C1_C1_LIRASSEMBLER_HPP
27
28 #include "c1/c1_CodeStubs.hpp"
29 #include "ci/ciMethodData.hpp"
30 #include "oops/methodData.hpp"
31 #include "utilities/macros.hpp"
32
33 class Compilation;
34 class CompiledEntrySignature;
35 class ScopeValue;
36 class BarrierSet;
37
38 class LIR_Assembler: public CompilationResourceObj {
39 private:
40 C1_MacroAssembler* _masm;
41 CodeStubList* _slow_case_stubs;
42 BarrierSet* _bs;
43
44 Compilation* _compilation;
45 FrameMap* _frame_map;
46 BlockBegin* _current_block;
47
48 Instruction* _pending_non_safepoint;
49 int _pending_non_safepoint_offset;
50
51 Label _unwind_handler_entry;
52 Label _verified_value_entry;
53
54 #ifdef ASSERT
55 BlockList _branch_target_blocks;
56 void check_no_unbound_labels();
57 #endif
58
59 FrameMap* frame_map() const { return _frame_map; }
60
61 void set_current_block(BlockBegin* b) { _current_block = b; }
62 BlockBegin* current_block() const { return _current_block; }
63
64 // non-safepoint debug info management
65 void flush_debug_info(int before_pc_offset) {
66 if (_pending_non_safepoint != NULL) {
67 if (_pending_non_safepoint_offset < before_pc_offset)
68 record_non_safepoint_debug_info();
69 _pending_non_safepoint = NULL;
70 }
71 }
72 void process_debug_info(LIR_Op* op);
73 void record_non_safepoint_debug_info();
74
75 // unified bailout support
76 void bailout(const char* msg) const { compilation()->bailout(msg); }
77 bool bailed_out() const { return compilation()->bailed_out(); }
78
79 // code emission patterns and accessors
80 void check_codespace();
81 bool needs_icache(ciMethod* method) const;
82
83 // returns offset of icache check
84 int check_icache();
85
86 void jobject2reg(jobject o, Register reg);
87 void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
88
89 void metadata2reg(Metadata* o, Register reg);
90 void klass2reg_with_patching(Register reg, CodeEmitInfo* info);
91
92 void emit_stubs(CodeStubList* stub_list);
93
94 bool needs_stack_repair() const {
95 return compilation()->needs_stack_repair();
96 }
97
98 // addresses
99 Address as_Address(LIR_Address* addr);
100 Address as_Address_lo(LIR_Address* addr);
101 Address as_Address_hi(LIR_Address* addr);
102
103 // debug information
104 void add_call_info(int pc_offset, CodeEmitInfo* cinfo);
105 void add_debug_info_for_branch(CodeEmitInfo* info);
106 void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
107 void add_debug_info_for_div0_here(CodeEmitInfo* info);
108 ImplicitNullCheckStub* add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
109 ImplicitNullCheckStub* add_debug_info_for_null_check_here(CodeEmitInfo* info);
110
111 void set_24bit_FPU();
112 void reset_FPU();
113 void fpop();
114 void fxch(int i);
115 void fld(int i);
116 void ffree(int i);
117
118 void breakpoint();
119 void push(LIR_Opr opr);
120 void pop(LIR_Opr opr);
121
122 // patching
123 void append_patching_stub(PatchingStub* stub);
124 void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);
125
126 void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op);
127
128 PatchingStub::PatchID patching_id(CodeEmitInfo* info);
129
130 public:
131 LIR_Assembler(Compilation* c);
132 ~LIR_Assembler();
133 C1_MacroAssembler* masm() const { return _masm; }
134 Compilation* compilation() const { return _compilation; }
135 ciMethod* method() const { return compilation()->method(); }
136
137 CodeOffsets* offsets() const { return _compilation->offsets(); }
138 int code_offset() const;
139 address pc() const;
140
141 int initial_frame_size_in_bytes() const;
142 int bang_size_in_bytes() const;
143
144 // test for constants which can be encoded directly in instructions
145 static bool is_small_constant(LIR_Opr opr);
146
147 static LIR_Opr receiverOpr();
148 static LIR_Opr osrBufferPointer();
149
150 // stubs
151 void emit_slow_case_stubs();
152 void emit_static_call_stub();
153 void append_code_stub(CodeStub* op);
154 void add_call_info_here(CodeEmitInfo* info) { add_call_info(code_offset(), info); }
155
156 // code patterns
157 int emit_exception_handler();
158 int emit_unwind_handler();
159 void emit_exception_entries(ExceptionInfoList* info_list);
160 int emit_deopt_handler();
161
162 void emit_code(BlockList* hir);
163 void emit_block(BlockBegin* block);
164 void emit_lir_list(LIR_List* list);
165
166 // any last minute peephole optimizations are performed here. In
167 // particular sparc uses this for delay slot filling.
168 void peephole(LIR_List* list);
169
170 void return_op(LIR_Opr result);
171
172 // returns offset of poll instruction
173 int safepoint_poll(LIR_Opr result, CodeEmitInfo* info);
174
175 void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
176 void const2stack(LIR_Opr src, LIR_Opr dest);
177 void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide);
178 void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);
179 void reg2reg (LIR_Opr src, LIR_Opr dest);
180 void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type,
181 LIR_PatchCode patch_code, CodeEmitInfo* info,
182 bool pop_fpu_stack, bool wide, bool unaligned);
183 void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type);
184 void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type);
185 void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type,
186 LIR_PatchCode patch_code,
187 CodeEmitInfo* info, bool wide, bool unaligned);
188
189 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
190 void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest);
191
192 void move_regs(Register from_reg, Register to_reg);
193 void swap_reg(Register a, Register b);
194
195 void emit_op0(LIR_Op0* op);
196 void emit_op1(LIR_Op1* op);
197 void emit_op2(LIR_Op2* op);
198 void emit_op3(LIR_Op3* op);
199 void emit_opBranch(LIR_OpBranch* op);
200 void emit_opLabel(LIR_OpLabel* op);
201 void emit_arraycopy(LIR_OpArrayCopy* op);
202 void emit_updatecrc32(LIR_OpUpdateCRC32* op);
203 void emit_opConvert(LIR_OpConvert* op);
204 void emit_alloc_obj(LIR_OpAllocObj* op);
205 void emit_alloc_array(LIR_OpAllocArray* op);
206 void emit_opTypeCheck(LIR_OpTypeCheck* op);
207 void emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op);
208 void emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op);
209 void emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null);
210 void emit_compare_and_swap(LIR_OpCompareAndSwap* op);
211 void emit_lock(LIR_OpLock* op);
212 void emit_call(LIR_OpJavaCall* op);
213 void emit_rtcall(LIR_OpRTCall* op);
214 void emit_profile_call(LIR_OpProfileCall* op);
215 void emit_profile_type(LIR_OpProfileType* op);
216 void emit_delay(LIR_OpDelay* op);
217 void emit_std_entries();
218 int emit_std_entry(CodeOffsets::Entries entry, const CompiledEntrySignature* ces);
219 void add_std_entry_info(int call_offset, bool no_receiver);
220
221 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
222 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
223 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
224 #ifdef ASSERT
225 void emit_assert(LIR_OpAssert* op);
226 #endif
227
228 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
229
230 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
231 void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
232 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide);
233 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
234 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
235 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
236 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type);
237
238 void call( LIR_OpJavaCall* op, relocInfo::relocType rtype);
239 void ic_call( LIR_OpJavaCall* op);
240 void vtable_call( LIR_OpJavaCall* op);
241 void store_value_type_fields_to_buf(ciValueKlass* vk);
242
243 void osr_entry();
244
245 void build_frame();
246
247 void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
248 void unwind_op(LIR_Opr exceptionOop);
249 void monitor_address(int monitor_ix, LIR_Opr dst);
250
251 void align_backward_branch_target();
252 void align_call(LIR_Code code);
253
254 void negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp = LIR_OprFact::illegalOpr);
255 void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL);
256
257 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
258
259 void membar();
260 void membar_acquire();
261 void membar_release();
262 void membar_loadload();
263 void membar_storestore();
264 void membar_loadstore();
265 void membar_storeload();
266 void on_spin_wait();
267 void get_thread(LIR_Opr result);
268
269 void verify_oop_map(CodeEmitInfo* info);
270
271 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
272
273 #include CPU_HEADER(c1_LIRAssembler)
274
275 public:
276
277 static int call_stub_size() {
278 if (UseAOT) {
279 return _call_stub_size + _call_aot_stub_size;
280 } else {
281 return _call_stub_size;
282 }
283 }
284
285 static int exception_handler_size() {
286 return _exception_handler_size;
287 }
288
289 static int deopt_handler_size() {
290 return _deopt_handler_size;
291 }
292 };
293
294 #endif // SHARE_C1_C1_LIRASSEMBLER_HPP