1 /*
   2  * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"

  36 #include "gc/shared/c1/barrierSetC1.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_x86.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 // Item will be loaded into a byte register; Intel only
  48 void LIRItem::load_byte_item() {
  49   load_item();
  50   LIR_Opr res = result();
  51 
  52   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  53     // make sure that it is a byte register
  54     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  55            "can't load floats in byte register");
  56     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  57     __ move(res, reg);
  58 
  59     _result = reg;
  60   }
  61 }
  62 
  63 
  64 void LIRItem::load_nonconstant() {
  65   LIR_Opr r = value()->operand();
  66   if (r->is_constant()) {
  67     _result = r;
  68   } else {
  69     load_item();
  70   }
  71 }
  72 
  73 //--------------------------------------------------------------
  74 //               LIRGenerator
  75 //--------------------------------------------------------------
  76 
  77 
  78 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  79 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  80 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  81 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  82 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  83 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  84 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  85 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  86 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  87 
  88 
  89 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  90   LIR_Opr opr;
  91   switch (type->tag()) {
  92     case intTag:     opr = FrameMap::rax_opr;          break;
  93     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  94     case longTag:    opr = FrameMap::long0_opr;        break;
  95     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  96     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  97 
  98     case addressTag:
  99     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 100   }
 101 
 102   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 103   return opr;
 104 }
 105 
 106 
 107 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 108   LIR_Opr reg = new_register(T_INT);
 109   set_vreg_flag(reg, LIRGenerator::byte_reg);
 110   return reg;
 111 }
 112 
 113 
 114 //--------- loading items into registers --------------------------------
 115 
 116 
 117 // i486 instructions can inline constants
 118 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 119   if (type == T_SHORT || type == T_CHAR) {
 120     // there is no immediate move of word values in asembler_i486.?pp
 121     return false;
 122   }
 123   Constant* c = v->as_Constant();
 124   if (c && c->state_before() == NULL) {
 125     // constants of any type can be stored directly, except for
 126     // unloaded object constants.
 127     return true;
 128   }
 129   return false;
 130 }
 131 
 132 
 133 bool LIRGenerator::can_inline_as_constant(Value v) const {
 134   if (v->type()->tag() == longTag) return false;
 135   return v->type()->tag() != objectTag ||
 136     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 137 }
 138 
 139 
 140 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 141   if (c->type() == T_LONG) return false;
 142   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 143 }
 144 
 145 
 146 LIR_Opr LIRGenerator::safepoint_poll_register() {
 147   NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
 148   return LIR_OprFact::illegalOpr;
 149 }
 150 
 151 
 152 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 153                                             int shift, int disp, BasicType type) {
 154   assert(base->is_register(), "must be");
 155   if (index->is_constant()) {
 156     LIR_Const *constant = index->as_constant_ptr();
 157 #ifdef _LP64
 158     jlong c;
 159     if (constant->type() == T_INT) {
 160       c = (jlong(index->as_jint()) << shift) + disp;
 161     } else {
 162       assert(constant->type() == T_LONG, "should be");
 163       c = (index->as_jlong() << shift) + disp;
 164     }
 165     if ((jlong)((jint)c) == c) {
 166       return new LIR_Address(base, (jint)c, type);
 167     } else {
 168       LIR_Opr tmp = new_register(T_LONG);
 169       __ move(index, tmp);
 170       return new LIR_Address(base, tmp, type);
 171     }
 172 #else
 173     return new LIR_Address(base,
 174                            ((intx)(constant->as_jint()) << shift) + disp,
 175                            type);
 176 #endif
 177   } else {
 178     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 179   }
 180 }
 181 
 182 
 183 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 184                                               BasicType type) {
 185   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 186 
 187   LIR_Address* addr;
 188   if (index_opr->is_constant()) {
 189     int elem_size = type2aelembytes(type);
 190     addr = new LIR_Address(array_opr,
 191                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 192   } else {
 193 #ifdef _LP64
 194     if (index_opr->type() == T_INT) {
 195       LIR_Opr tmp = new_register(T_LONG);
 196       __ convert(Bytecodes::_i2l, index_opr, tmp);
 197       index_opr = tmp;
 198     }
 199 #endif // _LP64
 200     addr =  new LIR_Address(array_opr,
 201                             index_opr,
 202                             LIR_Address::scale(type),
 203                             offset_in_bytes, type);
 204   }
 205   return addr;
 206 }
 207 
 208 
 209 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 210   LIR_Opr r = NULL;
 211   if (type == T_LONG) {
 212     r = LIR_OprFact::longConst(x);
 213   } else if (type == T_INT) {
 214     r = LIR_OprFact::intConst(x);
 215   } else {
 216     ShouldNotReachHere();
 217   }
 218   return r;
 219 }
 220 
 221 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 222   LIR_Opr pointer = new_pointer_register();
 223   __ move(LIR_OprFact::intptrConst(counter), pointer);
 224   LIR_Address* addr = new LIR_Address(pointer, type);
 225   increment_counter(addr, step);
 226 }
 227 
 228 
 229 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 230   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 231 }
 232 
 233 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 234   __ cmp_mem_int(condition, base, disp, c, info);
 235 }
 236 
 237 
 238 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 239   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 240 }
 241 
 242 
 243 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 244   if (tmp->is_valid() && c > 0 && c < max_jint) {
 245     if (is_power_of_2(c + 1)) {
 246       __ move(left, tmp);
 247       __ shift_left(left, log2_intptr(c + 1), left);
 248       __ sub(left, tmp, result);
 249       return true;
 250     } else if (is_power_of_2(c - 1)) {
 251       __ move(left, tmp);
 252       __ shift_left(left, log2_intptr(c - 1), left);
 253       __ add(left, tmp, result);
 254       return true;
 255     }
 256   }
 257   return false;
 258 }
 259 
 260 
 261 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 262   BasicType type = item->type();
 263   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 264 }
 265 
 266 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 267   LIR_Opr tmp1 = new_register(objectType);
 268   LIR_Opr tmp2 = new_register(objectType);
 269   LIR_Opr tmp3 = new_register(objectType);
 270   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 271 }
 272 
 273 //----------------------------------------------------------------------
 274 //             visitor functions
 275 //----------------------------------------------------------------------
 276 
 277 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 278   assert(x->is_pinned(),"");
 279   LIRItem obj(x->obj(), this);
 280   obj.load_item();
 281 
 282   set_no_result(x);
 283 
 284   // "lock" stores the address of the monitor stack slot, so this is not an oop
 285   LIR_Opr lock = new_register(T_INT);
 286   // Need a scratch register for biased locking on x86
 287   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 288   if (UseBiasedLocking) {
 289     scratch = new_register(T_INT);
 290   }
 291 
 292   CodeEmitInfo* info_for_exception = NULL;
 293   if (x->needs_null_check()) {
 294     info_for_exception = state_for(x);
 295   }
 296   // this CodeEmitInfo must not have the xhandlers because here the
 297   // object is already locked (xhandlers expect object to be unlocked)
 298   CodeEmitInfo* info = state_for(x, x->state(), true);
 299   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 300                         x->monitor_no(), info_for_exception, info);
 301 }
 302 
 303 
 304 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 305   assert(x->is_pinned(),"");
 306 
 307   LIRItem obj(x->obj(), this);
 308   obj.dont_load_item();
 309 
 310   LIR_Opr lock = new_register(T_INT);
 311   LIR_Opr obj_temp = new_register(T_INT);
 312   set_no_result(x);
 313   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 314 }
 315 
 316 
 317 // _ineg, _lneg, _fneg, _dneg
 318 void LIRGenerator::do_NegateOp(NegateOp* x) {
 319   LIRItem value(x->x(), this);
 320   value.set_destroys_register();
 321   value.load_item();
 322   LIR_Opr reg = rlock(x);
 323   __ negate(value.result(), reg);
 324 
 325   set_result(x, round_item(reg));
 326 }
 327 
 328 
 329 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 330 //      _dadd, _dmul, _dsub, _ddiv, _drem
 331 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 332   LIRItem left(x->x(),  this);
 333   LIRItem right(x->y(), this);
 334   LIRItem* left_arg  = &left;
 335   LIRItem* right_arg = &right;
 336   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 337   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 338   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 339     left.load_item();
 340   } else {
 341     left.dont_load_item();
 342   }
 343 
 344   // do not load right operand if it is a constant.  only 0 and 1 are
 345   // loaded because there are special instructions for loading them
 346   // without memory access (not needed for SSE2 instructions)
 347   bool must_load_right = false;
 348   if (right.is_constant()) {
 349     LIR_Const* c = right.result()->as_constant_ptr();
 350     assert(c != NULL, "invalid constant");
 351     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 352 
 353     if (c->type() == T_FLOAT) {
 354       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 355     } else {
 356       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 357     }
 358   }
 359 
 360   if (must_load_both) {
 361     // frem and drem destroy also right operand, so move it to a new register
 362     right.set_destroys_register();
 363     right.load_item();
 364   } else if (right.is_register() || must_load_right) {
 365     right.load_item();
 366   } else {
 367     right.dont_load_item();
 368   }
 369   LIR_Opr reg = rlock(x);
 370   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 371   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 372     tmp = new_register(T_DOUBLE);
 373   }
 374 
 375   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 376     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 377     LIR_Opr fpu0, fpu1;
 378     if (x->op() == Bytecodes::_frem) {
 379       fpu0 = LIR_OprFact::single_fpu(0);
 380       fpu1 = LIR_OprFact::single_fpu(1);
 381     } else {
 382       fpu0 = LIR_OprFact::double_fpu(0);
 383       fpu1 = LIR_OprFact::double_fpu(1);
 384     }
 385     __ move(right.result(), fpu1); // order of left and right operand is important!
 386     __ move(left.result(), fpu0);
 387     __ rem (fpu0, fpu1, fpu0);
 388     __ move(fpu0, reg);
 389 
 390   } else {
 391     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 392   }
 393 
 394   set_result(x, round_item(reg));
 395 }
 396 
 397 
 398 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 399 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 400   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 401     // long division is implemented as a direct call into the runtime
 402     LIRItem left(x->x(), this);
 403     LIRItem right(x->y(), this);
 404 
 405     // the check for division by zero destroys the right operand
 406     right.set_destroys_register();
 407 
 408     BasicTypeList signature(2);
 409     signature.append(T_LONG);
 410     signature.append(T_LONG);
 411     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 412 
 413     // check for division by zero (destroys registers of right operand!)
 414     CodeEmitInfo* info = state_for(x);
 415 
 416     const LIR_Opr result_reg = result_register_for(x->type());
 417     left.load_item_force(cc->at(1));
 418     right.load_item();
 419 
 420     __ move(right.result(), cc->at(0));
 421 
 422     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 423     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 424 
 425     address entry = NULL;
 426     switch (x->op()) {
 427     case Bytecodes::_lrem:
 428       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 429       break; // check if dividend is 0 is done elsewhere
 430     case Bytecodes::_ldiv:
 431       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 432       break; // check if dividend is 0 is done elsewhere
 433     case Bytecodes::_lmul:
 434       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 435       break;
 436     default:
 437       ShouldNotReachHere();
 438     }
 439 
 440     LIR_Opr result = rlock_result(x);
 441     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 442     __ move(result_reg, result);
 443   } else if (x->op() == Bytecodes::_lmul) {
 444     // missing test if instr is commutative and if we should swap
 445     LIRItem left(x->x(), this);
 446     LIRItem right(x->y(), this);
 447 
 448     // right register is destroyed by the long mul, so it must be
 449     // copied to a new register.
 450     right.set_destroys_register();
 451 
 452     left.load_item();
 453     right.load_item();
 454 
 455     LIR_Opr reg = FrameMap::long0_opr;
 456     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 457     LIR_Opr result = rlock_result(x);
 458     __ move(reg, result);
 459   } else {
 460     // missing test if instr is commutative and if we should swap
 461     LIRItem left(x->x(), this);
 462     LIRItem right(x->y(), this);
 463 
 464     left.load_item();
 465     // don't load constants to save register
 466     right.load_nonconstant();
 467     rlock_result(x);
 468     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 469   }
 470 }
 471 
 472 
 473 
 474 // for: _iadd, _imul, _isub, _idiv, _irem
 475 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 476   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 477     // The requirements for division and modulo
 478     // input : rax,: dividend                         min_int
 479     //         reg: divisor   (may not be rax,/rdx)   -1
 480     //
 481     // output: rax,: quotient  (= rax, idiv reg)       min_int
 482     //         rdx: remainder (= rax, irem reg)       0
 483 
 484     // rax, and rdx will be destroyed
 485 
 486     // Note: does this invalidate the spec ???
 487     LIRItem right(x->y(), this);
 488     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 489 
 490     // call state_for before load_item_force because state_for may
 491     // force the evaluation of other instructions that are needed for
 492     // correct debug info.  Otherwise the live range of the fix
 493     // register might be too long.
 494     CodeEmitInfo* info = state_for(x);
 495 
 496     left.load_item_force(divInOpr());
 497 
 498     right.load_item();
 499 
 500     LIR_Opr result = rlock_result(x);
 501     LIR_Opr result_reg;
 502     if (x->op() == Bytecodes::_idiv) {
 503       result_reg = divOutOpr();
 504     } else {
 505       result_reg = remOutOpr();
 506     }
 507 
 508     if (!ImplicitDiv0Checks) {
 509       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 510       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 511       // Idiv/irem cannot trap (passing info would generate an assertion).
 512       info = NULL;
 513     }
 514     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 515     if (x->op() == Bytecodes::_irem) {
 516       __ irem(left.result(), right.result(), result_reg, tmp, info);
 517     } else if (x->op() == Bytecodes::_idiv) {
 518       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 519     } else {
 520       ShouldNotReachHere();
 521     }
 522 
 523     __ move(result_reg, result);
 524   } else {
 525     // missing test if instr is commutative and if we should swap
 526     LIRItem left(x->x(),  this);
 527     LIRItem right(x->y(), this);
 528     LIRItem* left_arg = &left;
 529     LIRItem* right_arg = &right;
 530     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 531       // swap them if left is real stack (or cached) and right is real register(not cached)
 532       left_arg = &right;
 533       right_arg = &left;
 534     }
 535 
 536     left_arg->load_item();
 537 
 538     // do not need to load right, as we can handle stack and constants
 539     if (x->op() == Bytecodes::_imul ) {
 540       // check if we can use shift instead
 541       bool use_constant = false;
 542       bool use_tmp = false;
 543       if (right_arg->is_constant()) {
 544         jint iconst = right_arg->get_jint_constant();
 545         if (iconst > 0 && iconst < max_jint) {
 546           if (is_power_of_2(iconst)) {
 547             use_constant = true;
 548           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 549             use_constant = true;
 550             use_tmp = true;
 551           }
 552         }
 553       }
 554       if (use_constant) {
 555         right_arg->dont_load_item();
 556       } else {
 557         right_arg->load_item();
 558       }
 559       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 560       if (use_tmp) {
 561         tmp = new_register(T_INT);
 562       }
 563       rlock_result(x);
 564 
 565       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 566     } else {
 567       right_arg->dont_load_item();
 568       rlock_result(x);
 569       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 570       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 571     }
 572   }
 573 }
 574 
 575 
 576 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 577   // when an operand with use count 1 is the left operand, then it is
 578   // likely that no move for 2-operand-LIR-form is necessary
 579   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 580     x->swap_operands();
 581   }
 582 
 583   ValueTag tag = x->type()->tag();
 584   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 585   switch (tag) {
 586     case floatTag:
 587     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 588     case longTag:    do_ArithmeticOp_Long(x); return;
 589     case intTag:     do_ArithmeticOp_Int(x);  return;
 590     default:         ShouldNotReachHere();    return;
 591   }
 592 }
 593 
 594 
 595 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 596 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 597   // count must always be in rcx
 598   LIRItem value(x->x(), this);
 599   LIRItem count(x->y(), this);
 600 
 601   ValueTag elemType = x->type()->tag();
 602   bool must_load_count = !count.is_constant() || elemType == longTag;
 603   if (must_load_count) {
 604     // count for long must be in register
 605     count.load_item_force(shiftCountOpr());
 606   } else {
 607     count.dont_load_item();
 608   }
 609   value.load_item();
 610   LIR_Opr reg = rlock_result(x);
 611 
 612   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 613 }
 614 
 615 
 616 // _iand, _land, _ior, _lor, _ixor, _lxor
 617 void LIRGenerator::do_LogicOp(LogicOp* x) {
 618   // when an operand with use count 1 is the left operand, then it is
 619   // likely that no move for 2-operand-LIR-form is necessary
 620   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 621     x->swap_operands();
 622   }
 623 
 624   LIRItem left(x->x(), this);
 625   LIRItem right(x->y(), this);
 626 
 627   left.load_item();
 628   right.load_nonconstant();
 629   LIR_Opr reg = rlock_result(x);
 630 
 631   logic_op(x->op(), reg, left.result(), right.result());
 632 }
 633 
 634 
 635 
 636 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 637 void LIRGenerator::do_CompareOp(CompareOp* x) {
 638   LIRItem left(x->x(), this);
 639   LIRItem right(x->y(), this);
 640   ValueTag tag = x->x()->type()->tag();
 641   if (tag == longTag) {
 642     left.set_destroys_register();
 643   }
 644   left.load_item();
 645   right.load_item();
 646   LIR_Opr reg = rlock_result(x);
 647 
 648   if (x->x()->type()->is_float_kind()) {
 649     Bytecodes::Code code = x->op();
 650     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 651   } else if (x->x()->type()->tag() == longTag) {
 652     __ lcmp2int(left.result(), right.result(), reg);
 653   } else {
 654     Unimplemented();
 655   }
 656 }
 657 
 658 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 659   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 660   if (type == T_OBJECT || type == T_ARRAY) {
 661     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 662     new_value.load_item();
 663     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 664   } else if (type == T_INT) {
 665     cmp_value.load_item_force(FrameMap::rax_opr);
 666     new_value.load_item();
 667     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 668   } else if (type == T_LONG) {
 669     cmp_value.load_item_force(FrameMap::long0_opr);
 670     new_value.load_item_force(FrameMap::long1_opr);
 671     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 672   } else {
 673     Unimplemented();
 674   }
 675   LIR_Opr result = new_register(T_INT);
 676   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 677            result, type);
 678   return result;
 679 }
 680 
 681 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 682   bool is_oop = type == T_OBJECT || type == T_ARRAY;
 683   LIR_Opr result = new_register(type);
 684   value.load_item();
 685   // Because we want a 2-arg form of xchg and xadd
 686   __ move(value.result(), result);
 687   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
 688   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 689   return result;
 690 }
 691 
 692 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 693   LIR_Opr result = new_register(type);
 694   value.load_item();
 695   // Because we want a 2-arg form of xchg and xadd
 696   __ move(value.result(), result);
 697   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 698   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 699   return result;
 700 }
 701 
 702 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 703   assert(x->number_of_arguments() == 3, "wrong type");
 704   assert(UseFMA, "Needs FMA instructions support.");
 705   LIRItem value(x->argument_at(0), this);
 706   LIRItem value1(x->argument_at(1), this);
 707   LIRItem value2(x->argument_at(2), this);
 708 
 709   value2.set_destroys_register();
 710 
 711   value.load_item();
 712   value1.load_item();
 713   value2.load_item();
 714 
 715   LIR_Opr calc_input = value.result();
 716   LIR_Opr calc_input1 = value1.result();
 717   LIR_Opr calc_input2 = value2.result();
 718   LIR_Opr calc_result = rlock_result(x);
 719 
 720   switch (x->id()) {
 721   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 722   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 723   default:                    ShouldNotReachHere();
 724   }
 725 
 726 }
 727 
 728 
 729 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 730   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 731 
 732   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 733       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 734       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 735       x->id() == vmIntrinsics::_dlog10) {
 736     do_LibmIntrinsic(x);
 737     return;
 738   }
 739 
 740   LIRItem value(x->argument_at(0), this);
 741 
 742   bool use_fpu = false;
 743   if (UseSSE < 2) {
 744     value.set_destroys_register();
 745   }
 746   value.load_item();
 747 
 748   LIR_Opr calc_input = value.result();
 749   LIR_Opr calc_result = rlock_result(x);
 750 
 751   switch(x->id()) {
 752     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 753     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 754     default:                    ShouldNotReachHere();
 755   }
 756 
 757   if (use_fpu) {
 758     __ move(calc_result, x->operand());
 759   }
 760 }
 761 
 762 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 763   LIRItem value(x->argument_at(0), this);
 764   value.set_destroys_register();
 765 
 766   LIR_Opr calc_result = rlock_result(x);
 767   LIR_Opr result_reg = result_register_for(x->type());
 768 
 769   CallingConvention* cc = NULL;
 770 
 771   if (x->id() == vmIntrinsics::_dpow) {
 772     LIRItem value1(x->argument_at(1), this);
 773 
 774     value1.set_destroys_register();
 775 
 776     BasicTypeList signature(2);
 777     signature.append(T_DOUBLE);
 778     signature.append(T_DOUBLE);
 779     cc = frame_map()->c_calling_convention(&signature);
 780     value.load_item_force(cc->at(0));
 781     value1.load_item_force(cc->at(1));
 782   } else {
 783     BasicTypeList signature(1);
 784     signature.append(T_DOUBLE);
 785     cc = frame_map()->c_calling_convention(&signature);
 786     value.load_item_force(cc->at(0));
 787   }
 788 
 789 #ifndef _LP64
 790   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 791   result_reg = tmp;
 792   switch(x->id()) {
 793     case vmIntrinsics::_dexp:
 794       if (StubRoutines::dexp() != NULL) {
 795         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 796       } else {
 797         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 798       }
 799       break;
 800     case vmIntrinsics::_dlog:
 801       if (StubRoutines::dlog() != NULL) {
 802         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 803       } else {
 804         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 805       }
 806       break;
 807     case vmIntrinsics::_dlog10:
 808       if (StubRoutines::dlog10() != NULL) {
 809        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 810       } else {
 811         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 812       }
 813       break;
 814     case vmIntrinsics::_dpow:
 815       if (StubRoutines::dpow() != NULL) {
 816         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 817       } else {
 818         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 819       }
 820       break;
 821     case vmIntrinsics::_dsin:
 822       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 823         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 824       } else {
 825         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 826       }
 827       break;
 828     case vmIntrinsics::_dcos:
 829       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 830         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 831       } else {
 832         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 833       }
 834       break;
 835     case vmIntrinsics::_dtan:
 836       if (StubRoutines::dtan() != NULL) {
 837         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 838       } else {
 839         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 840       }
 841       break;
 842     default:  ShouldNotReachHere();
 843   }
 844 #else
 845   switch (x->id()) {
 846     case vmIntrinsics::_dexp:
 847       if (StubRoutines::dexp() != NULL) {
 848         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 849       } else {
 850         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 851       }
 852       break;
 853     case vmIntrinsics::_dlog:
 854       if (StubRoutines::dlog() != NULL) {
 855       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 856       } else {
 857         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 858       }
 859       break;
 860     case vmIntrinsics::_dlog10:
 861       if (StubRoutines::dlog10() != NULL) {
 862       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 863       } else {
 864         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 865       }
 866       break;
 867     case vmIntrinsics::_dpow:
 868        if (StubRoutines::dpow() != NULL) {
 869       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 870       } else {
 871         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 872       }
 873       break;
 874     case vmIntrinsics::_dsin:
 875       if (StubRoutines::dsin() != NULL) {
 876         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 877       } else {
 878         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 879       }
 880       break;
 881     case vmIntrinsics::_dcos:
 882       if (StubRoutines::dcos() != NULL) {
 883         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 884       } else {
 885         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 886       }
 887       break;
 888     case vmIntrinsics::_dtan:
 889        if (StubRoutines::dtan() != NULL) {
 890       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 891       } else {
 892         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 893       }
 894       break;
 895     default:  ShouldNotReachHere();
 896   }
 897 #endif // _LP64
 898   __ move(result_reg, calc_result);
 899 }
 900 
 901 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 902   assert(x->number_of_arguments() == 5, "wrong type");
 903 
 904   // Make all state_for calls early since they can emit code
 905   CodeEmitInfo* info = state_for(x, x->state());
 906 
 907   LIRItem src(x->argument_at(0), this);
 908   LIRItem src_pos(x->argument_at(1), this);
 909   LIRItem dst(x->argument_at(2), this);
 910   LIRItem dst_pos(x->argument_at(3), this);
 911   LIRItem length(x->argument_at(4), this);
 912 
 913   // operands for arraycopy must use fixed registers, otherwise
 914   // LinearScan will fail allocation (because arraycopy always needs a
 915   // call)
 916 
 917 #ifndef _LP64
 918   src.load_item_force     (FrameMap::rcx_oop_opr);
 919   src_pos.load_item_force (FrameMap::rdx_opr);
 920   dst.load_item_force     (FrameMap::rax_oop_opr);
 921   dst_pos.load_item_force (FrameMap::rbx_opr);
 922   length.load_item_force  (FrameMap::rdi_opr);
 923   LIR_Opr tmp =           (FrameMap::rsi_opr);
 924 #else
 925 
 926   // The java calling convention will give us enough registers
 927   // so that on the stub side the args will be perfect already.
 928   // On the other slow/special case side we call C and the arg
 929   // positions are not similar enough to pick one as the best.
 930   // Also because the java calling convention is a "shifted" version
 931   // of the C convention we can process the java args trivially into C
 932   // args without worry of overwriting during the xfer
 933 
 934   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
 935   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
 936   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
 937   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
 938   length.load_item_force  (FrameMap::as_opr(j_rarg4));
 939 
 940   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
 941 #endif // LP64
 942 
 943   set_no_result(x);
 944 
 945   int flags;
 946   ciArrayKlass* expected_type;
 947   arraycopy_helper(x, &flags, &expected_type);
 948 
 949   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
 950 }
 951 
 952 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
 953   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
 954   // Make all state_for calls early since they can emit code
 955   LIR_Opr result = rlock_result(x);
 956   int flags = 0;
 957   switch (x->id()) {
 958     case vmIntrinsics::_updateCRC32: {
 959       LIRItem crc(x->argument_at(0), this);
 960       LIRItem val(x->argument_at(1), this);
 961       // val is destroyed by update_crc32
 962       val.set_destroys_register();
 963       crc.load_item();
 964       val.load_item();
 965       __ update_crc32(crc.result(), val.result(), result);
 966       break;
 967     }
 968     case vmIntrinsics::_updateBytesCRC32:
 969     case vmIntrinsics::_updateByteBufferCRC32: {
 970       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
 971 
 972       LIRItem crc(x->argument_at(0), this);
 973       LIRItem buf(x->argument_at(1), this);
 974       LIRItem off(x->argument_at(2), this);
 975       LIRItem len(x->argument_at(3), this);
 976       buf.load_item();
 977       off.load_nonconstant();
 978 
 979       LIR_Opr index = off.result();
 980       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
 981       if(off.result()->is_constant()) {
 982         index = LIR_OprFact::illegalOpr;
 983        offset += off.result()->as_jint();
 984       }
 985       LIR_Opr base_op = buf.result();
 986 
 987 #ifndef _LP64
 988       if (!is_updateBytes) { // long b raw address
 989          base_op = new_register(T_INT);
 990          __ convert(Bytecodes::_l2i, buf.result(), base_op);
 991       }
 992 #else
 993       if (index->is_valid()) {
 994         LIR_Opr tmp = new_register(T_LONG);
 995         __ convert(Bytecodes::_i2l, index, tmp);
 996         index = tmp;
 997       }
 998 #endif
 999 
1000       if (is_updateBytes) {
1001         base_op = access_resolve(IS_NOT_NULL | ACCESS_READ, base_op);
1002       }
1003 
1004       LIR_Address* a = new LIR_Address(base_op,
1005                                        index,
1006                                        offset,
1007                                        T_BYTE);
1008       BasicTypeList signature(3);
1009       signature.append(T_INT);
1010       signature.append(T_ADDRESS);
1011       signature.append(T_INT);
1012       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1013       const LIR_Opr result_reg = result_register_for(x->type());
1014 
1015       LIR_Opr addr = new_pointer_register();
1016       __ leal(LIR_OprFact::address(a), addr);
1017 
1018       crc.load_item_force(cc->at(0));
1019       __ move(addr, cc->at(1));
1020       len.load_item_force(cc->at(2));
1021 
1022       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1023       __ move(result_reg, result);
1024 
1025       break;
1026     }
1027     default: {
1028       ShouldNotReachHere();
1029     }
1030   }
1031 }
1032 
1033 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1034   Unimplemented();
1035 }
1036 
1037 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1038   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1039 
1040   // Make all state_for calls early since they can emit code
1041   LIR_Opr result = rlock_result(x);
1042 
1043   LIRItem a(x->argument_at(0), this); // Object
1044   LIRItem aOffset(x->argument_at(1), this); // long
1045   LIRItem b(x->argument_at(2), this); // Object
1046   LIRItem bOffset(x->argument_at(3), this); // long
1047   LIRItem length(x->argument_at(4), this); // int
1048   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1049 
1050   a.load_item();
1051   aOffset.load_nonconstant();
1052   b.load_item();
1053   bOffset.load_nonconstant();
1054 
1055   long constant_aOffset = 0;
1056   LIR_Opr result_aOffset = aOffset.result();
1057   if (result_aOffset->is_constant()) {
1058     constant_aOffset = result_aOffset->as_jlong();
1059     result_aOffset = LIR_OprFact::illegalOpr;
1060   }
1061   LIR_Opr result_a = access_resolve(ACCESS_READ, a.result());
1062 
1063   long constant_bOffset = 0;
1064   LIR_Opr result_bOffset = bOffset.result();
1065   if (result_bOffset->is_constant()) {
1066     constant_bOffset = result_bOffset->as_jlong();
1067     result_bOffset = LIR_OprFact::illegalOpr;
1068   }
1069   LIR_Opr result_b = access_resolve(ACCESS_READ, b.result());
1070 
1071 #ifndef _LP64
1072   result_a = new_register(T_INT);
1073   __ convert(Bytecodes::_l2i, a.result(), result_a);
1074   result_b = new_register(T_INT);
1075   __ convert(Bytecodes::_l2i, b.result(), result_b);
1076 #endif
1077 
1078 
1079   LIR_Address* addr_a = new LIR_Address(result_a,
1080                                         result_aOffset,
1081                                         constant_aOffset,
1082                                         T_BYTE);
1083 
1084   LIR_Address* addr_b = new LIR_Address(result_b,
1085                                         result_bOffset,
1086                                         constant_bOffset,
1087                                         T_BYTE);
1088 
1089   BasicTypeList signature(4);
1090   signature.append(T_ADDRESS);
1091   signature.append(T_ADDRESS);
1092   signature.append(T_INT);
1093   signature.append(T_INT);
1094   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1095   const LIR_Opr result_reg = result_register_for(x->type());
1096 
1097   LIR_Opr ptr_addr_a = new_pointer_register();
1098   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1099 
1100   LIR_Opr ptr_addr_b = new_pointer_register();
1101   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1102 
1103   __ move(ptr_addr_a, cc->at(0));
1104   __ move(ptr_addr_b, cc->at(1));
1105   length.load_item_force(cc->at(2));
1106   log2ArrayIndexScale.load_item_force(cc->at(3));
1107 
1108   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1109   __ move(result_reg, result);
1110 }
1111 
1112 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1113 // _i2b, _i2c, _i2s
1114 LIR_Opr fixed_register_for(BasicType type) {
1115   switch (type) {
1116     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1117     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1118     case T_INT:    return FrameMap::rax_opr;
1119     case T_LONG:   return FrameMap::long0_opr;
1120     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1121   }
1122 }
1123 
1124 void LIRGenerator::do_Convert(Convert* x) {
1125   // flags that vary for the different operations and different SSE-settings
1126   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1127 
1128   switch (x->op()) {
1129     case Bytecodes::_i2l: // fall through
1130     case Bytecodes::_l2i: // fall through
1131     case Bytecodes::_i2b: // fall through
1132     case Bytecodes::_i2c: // fall through
1133     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1134 
1135     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1136     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1137     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1138     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1139     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1140     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1141     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1142     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1143     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1144     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1145     default: ShouldNotReachHere();
1146   }
1147 
1148   LIRItem value(x->value(), this);
1149   value.load_item();
1150   LIR_Opr input = value.result();
1151   LIR_Opr result = rlock(x);
1152 
1153   // arguments of lir_convert
1154   LIR_Opr conv_input = input;
1155   LIR_Opr conv_result = result;
1156   ConversionStub* stub = NULL;
1157 
1158   if (fixed_input) {
1159     conv_input = fixed_register_for(input->type());
1160     __ move(input, conv_input);
1161   }
1162 
1163   assert(fixed_result == false || round_result == false, "cannot set both");
1164   if (fixed_result) {
1165     conv_result = fixed_register_for(result->type());
1166   } else if (round_result) {
1167     result = new_register(result->type());
1168     set_vreg_flag(result, must_start_in_memory);
1169   }
1170 
1171   if (needs_stub) {
1172     stub = new ConversionStub(x->op(), conv_input, conv_result);
1173   }
1174 
1175   __ convert(x->op(), conv_input, conv_result, stub);
1176 
1177   if (result != conv_result) {
1178     __ move(conv_result, result);
1179   }
1180 
1181   assert(result->is_virtual(), "result must be virtual register");
1182   set_result(x, result);
1183 }
1184 
1185 
1186 void LIRGenerator::do_NewInstance(NewInstance* x) {
1187   print_if_not_loaded(x);
1188 
1189   CodeEmitInfo* info = state_for(x, x->state());
1190   LIR_Opr reg = result_register_for(x->type());
1191   new_instance(reg, x->klass(), x->is_unresolved(),
1192                        FrameMap::rcx_oop_opr,
1193                        FrameMap::rdi_oop_opr,
1194                        FrameMap::rsi_oop_opr,
1195                        LIR_OprFact::illegalOpr,
1196                        FrameMap::rdx_metadata_opr, info);
1197   LIR_Opr result = rlock_result(x);
1198   __ move(reg, result);
1199 }
1200 















1201 
1202 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1203   CodeEmitInfo* info = state_for(x, x->state());
1204 
1205   LIRItem length(x->length(), this);
1206   length.load_item_force(FrameMap::rbx_opr);
1207 
1208   LIR_Opr reg = result_register_for(x->type());
1209   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1210   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1211   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1212   LIR_Opr tmp4 = reg;
1213   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1214   LIR_Opr len = length.result();
1215   BasicType elem_type = x->elt_type();
1216 
1217   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1218 
1219   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1220   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1221 
1222   LIR_Opr result = rlock_result(x);
1223   __ move(reg, result);
1224 }
1225 
1226 
1227 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1228   LIRItem length(x->length(), this);
1229   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1230   // and therefore provide the state before the parameters have been consumed
1231   CodeEmitInfo* patching_info = NULL;
1232   if (!x->klass()->is_loaded() || PatchALot) {
1233     patching_info =  state_for(x, x->state_before());
1234   }
1235 
1236   CodeEmitInfo* info = state_for(x, x->state());
1237 
1238   const LIR_Opr reg = result_register_for(x->type());
1239   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1240   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1241   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1242   LIR_Opr tmp4 = reg;
1243   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1244 
1245   length.load_item_force(FrameMap::rbx_opr);
1246   LIR_Opr len = length.result();
1247 
1248   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1249   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1250   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1251     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1252   }
1253   klass2reg_with_patching(klass_reg, obj, patching_info);
1254   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1255 
1256   LIR_Opr result = rlock_result(x);
1257   __ move(reg, result);
1258 }
1259 
1260 
1261 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1262   Values* dims = x->dims();
1263   int i = dims->length();
1264   LIRItemList* items = new LIRItemList(i, i, NULL);
1265   while (i-- > 0) {
1266     LIRItem* size = new LIRItem(dims->at(i), this);
1267     items->at_put(i, size);
1268   }
1269 
1270   // Evaluate state_for early since it may emit code.
1271   CodeEmitInfo* patching_info = NULL;
1272   if (!x->klass()->is_loaded() || PatchALot) {
1273     patching_info = state_for(x, x->state_before());
1274 
1275     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1276     // clone all handlers (NOTE: Usually this is handled transparently
1277     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1278     // is done explicitly here because a stub isn't being used).
1279     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1280   }
1281   CodeEmitInfo* info = state_for(x, x->state());
1282 
1283   i = dims->length();
1284   while (i-- > 0) {
1285     LIRItem* size = items->at(i);
1286     size->load_nonconstant();
1287 
1288     store_stack_parameter(size->result(), in_ByteSize(i*4));
1289   }
1290 
1291   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1292   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1293 
1294   LIR_Opr rank = FrameMap::rbx_opr;
1295   __ move(LIR_OprFact::intConst(x->rank()), rank);
1296   LIR_Opr varargs = FrameMap::rcx_opr;
1297   __ move(FrameMap::rsp_opr, varargs);
1298   LIR_OprList* args = new LIR_OprList(3);
1299   args->append(klass_reg);
1300   args->append(rank);
1301   args->append(varargs);
1302   LIR_Opr reg = result_register_for(x->type());
1303   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1304                   LIR_OprFact::illegalOpr,
1305                   reg, args, info);
1306 
1307   LIR_Opr result = rlock_result(x);
1308   __ move(reg, result);
1309 }
1310 
1311 
1312 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1313   // nothing to do for now
1314 }
1315 
1316 
1317 void LIRGenerator::do_CheckCast(CheckCast* x) {
1318   LIRItem obj(x->obj(), this);
1319 
1320   CodeEmitInfo* patching_info = NULL;
1321   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1322     // must do this before locking the destination register as an oop register,
1323     // and before the obj is loaded (the latter is for deoptimization)
1324     patching_info = state_for(x, x->state_before());
1325   }
1326   obj.load_item();
1327 
1328   // info for exceptions
1329   CodeEmitInfo* info_for_exception =
1330       (x->needs_exception_state() ? state_for(x) :
1331                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1332 
1333   CodeStub* stub;
1334   if (x->is_incompatible_class_change_check()) {
1335     assert(patching_info == NULL, "can't patch this");
1336     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1337   } else if (x->is_invokespecial_receiver_check()) {
1338     assert(patching_info == NULL, "can't patch this");
1339     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1340   } else {
1341     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1342   }
1343   LIR_Opr reg = rlock_result(x);
1344   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1345   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1346     tmp3 = new_register(objectType);
1347   }
1348   __ checkcast(reg, obj.result(), x->klass(),
1349                new_register(objectType), new_register(objectType), tmp3,
1350                x->direct_compare(), info_for_exception, patching_info, stub,
1351                x->profiled_method(), x->profiled_bci());
1352 }
1353 
1354 
1355 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1356   LIRItem obj(x->obj(), this);
1357 
1358   // result and test object may not be in same register
1359   LIR_Opr reg = rlock_result(x);
1360   CodeEmitInfo* patching_info = NULL;
1361   if ((!x->klass()->is_loaded() || PatchALot)) {
1362     // must do this before locking the destination register as an oop register
1363     patching_info = state_for(x, x->state_before());
1364   }
1365   obj.load_item();
1366   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1367   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1368     tmp3 = new_register(objectType);
1369   }
1370   __ instanceof(reg, obj.result(), x->klass(),
1371                 new_register(objectType), new_register(objectType), tmp3,
1372                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1373 }
1374 
1375 
1376 void LIRGenerator::do_If(If* x) {
1377   assert(x->number_of_sux() == 2, "inconsistency");
1378   ValueTag tag = x->x()->type()->tag();
1379   bool is_safepoint = x->is_safepoint();
1380 
1381   If::Condition cond = x->cond();
1382 
1383   LIRItem xitem(x->x(), this);
1384   LIRItem yitem(x->y(), this);
1385   LIRItem* xin = &xitem;
1386   LIRItem* yin = &yitem;
1387 
1388   if (tag == longTag) {
1389     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1390     // mirror for other conditions
1391     if (cond == If::gtr || cond == If::leq) {
1392       cond = Instruction::mirror(cond);
1393       xin = &yitem;
1394       yin = &xitem;
1395     }
1396     xin->set_destroys_register();
1397   }
1398   xin->load_item();
1399   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1400     // inline long zero
1401     yin->dont_load_item();
1402   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1403     // longs cannot handle constants at right side
1404     yin->load_item();
1405   } else {
1406     yin->dont_load_item();
1407   }
1408 
1409   LIR_Opr left = xin->result();
1410   LIR_Opr right = yin->result();
1411 
1412   set_no_result(x);
1413 
1414   // add safepoint before generating condition code so it can be recomputed
1415   if (x->is_safepoint()) {
1416     // increment backedge counter if needed
1417     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1418         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1419     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1420   }
1421 
1422   __ cmp(lir_cond(cond), left, right);
1423   // Generate branch profiling. Profiling code doesn't kill flags.
1424   profile_branch(x, cond);
1425   move_to_phi(x->state());
1426   if (x->x()->type()->is_float_kind()) {
1427     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1428   } else {
1429     __ branch(lir_cond(cond), right->type(), x->tsux());
1430   }
1431   assert(x->default_sux() == x->fsux(), "wrong destination above");
1432   __ jump(x->default_sux());
1433 }
1434 
1435 
1436 LIR_Opr LIRGenerator::getThreadPointer() {
1437 #ifdef _LP64
1438   return FrameMap::as_pointer_opr(r15_thread);
1439 #else
1440   LIR_Opr result = new_register(T_INT);
1441   __ get_thread(result);
1442   return result;
1443 #endif //
1444 }
1445 
1446 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1447   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1448   LIR_OprList* args = new LIR_OprList();
1449   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1450   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1451 }
1452 
1453 
1454 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1455                                         CodeEmitInfo* info) {
1456   if (address->type() == T_LONG) {
1457     address = new LIR_Address(address->base(),
1458                               address->index(), address->scale(),
1459                               address->disp(), T_DOUBLE);
1460     // Transfer the value atomically by using FP moves.  This means
1461     // the value has to be moved between CPU and FPU registers.  It
1462     // always has to be moved through spill slot since there's no
1463     // quick way to pack the value into an SSE register.
1464     LIR_Opr temp_double = new_register(T_DOUBLE);
1465     LIR_Opr spill = new_register(T_LONG);
1466     set_vreg_flag(spill, must_start_in_memory);
1467     __ move(value, spill);
1468     __ volatile_move(spill, temp_double, T_LONG);
1469     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1470   } else {
1471     __ store(value, address, info);
1472   }
1473 }
1474 
1475 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1476                                        CodeEmitInfo* info) {
1477   if (address->type() == T_LONG) {
1478     address = new LIR_Address(address->base(),
1479                               address->index(), address->scale(),
1480                               address->disp(), T_DOUBLE);
1481     // Transfer the value atomically by using FP moves.  This means
1482     // the value has to be moved between CPU and FPU registers.  In
1483     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1484     // SSE2+ mode it can be moved directly.
1485     LIR_Opr temp_double = new_register(T_DOUBLE);
1486     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1487     __ volatile_move(temp_double, result, T_LONG);
1488     if (UseSSE < 2) {
1489       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1490       set_vreg_flag(result, must_start_in_memory);
1491     }
1492   } else {
1493     __ load(address, result, info);
1494   }
1495 }
--- EOF ---