1 /*
   2  * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "ci/ciValueKlass.hpp"
  37 #include "gc/shared/c1/barrierSetC1.hpp"
  38 #include "runtime/sharedRuntime.hpp"
  39 #include "runtime/stubRoutines.hpp"
  40 #include "vmreg_x86.inline.hpp"
  41 
  42 #ifdef ASSERT
  43 #define __ gen()->lir(__FILE__, __LINE__)->
  44 #else
  45 #define __ gen()->lir()->
  46 #endif
  47 
  48 // Item will be loaded into a byte register; Intel only
  49 void LIRItem::load_byte_item() {
  50   load_item();
  51   LIR_Opr res = result();
  52 
  53   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  54     // make sure that it is a byte register
  55     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  56            "can't load floats in byte register");
  57     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  58     __ move(res, reg);
  59 
  60     _result = reg;
  61   }
  62 }
  63 
  64 
  65 void LIRItem::load_nonconstant() {
  66   LIR_Opr r = value()->operand();
  67   if (r->is_constant()) {
  68     _result = r;
  69   } else {
  70     load_item();
  71   }
  72 }
  73 
  74 //--------------------------------------------------------------
  75 //               LIRGenerator
  76 //--------------------------------------------------------------
  77 
  78 
  79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  80 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  81 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  82 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  83 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  84 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  85 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  86 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  87 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  88 
  89 
  90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  91   LIR_Opr opr;
  92   switch (type->tag()) {
  93     case intTag:     opr = FrameMap::rax_opr;          break;
  94     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  95     case longTag:    opr = FrameMap::long0_opr;        break;
  96     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  97     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  98 
  99     case addressTag:
 100     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 101   }
 102 
 103   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 104   return opr;
 105 }
 106 
 107 
 108 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 109   LIR_Opr reg = new_register(T_INT);
 110   set_vreg_flag(reg, LIRGenerator::byte_reg);
 111   return reg;
 112 }
 113 
 114 
 115 //--------- loading items into registers --------------------------------
 116 
 117 
 118 // i486 instructions can inline constants
 119 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 120   if (type == T_SHORT || type == T_CHAR) {
 121     // there is no immediate move of word values in asembler_i486.?pp
 122     return false;
 123   }
 124   Constant* c = v->as_Constant();
 125   if (c && c->state_before() == NULL) {
 126     // constants of any type can be stored directly, except for
 127     // unloaded object constants.
 128     return true;
 129   }
 130   return false;
 131 }
 132 
 133 
 134 bool LIRGenerator::can_inline_as_constant(Value v) const {
 135   if (v->type()->tag() == longTag) return false;
 136   return v->type()->tag() != objectTag ||
 137     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 138 }
 139 
 140 
 141 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 142   if (c->type() == T_LONG) return false;
 143   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 144 }
 145 
 146 
 147 LIR_Opr LIRGenerator::safepoint_poll_register() {
 148   NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
 149   return LIR_OprFact::illegalOpr;
 150 }
 151 
 152 
 153 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 154                                             int shift, int disp, BasicType type) {
 155   assert(base->is_register(), "must be");
 156   if (index->is_constant()) {
 157     LIR_Const *constant = index->as_constant_ptr();
 158 #ifdef _LP64
 159     jlong c;
 160     if (constant->type() == T_INT) {
 161       c = (jlong(index->as_jint()) << shift) + disp;
 162     } else {
 163       assert(constant->type() == T_LONG, "should be");
 164       c = (index->as_jlong() << shift) + disp;
 165     }
 166     if ((jlong)((jint)c) == c) {
 167       return new LIR_Address(base, (jint)c, type);
 168     } else {
 169       LIR_Opr tmp = new_register(T_LONG);
 170       __ move(index, tmp);
 171       return new LIR_Address(base, tmp, type);
 172     }
 173 #else
 174     return new LIR_Address(base,
 175                            ((intx)(constant->as_jint()) << shift) + disp,
 176                            type);
 177 #endif
 178   } else {
 179     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 180   }
 181 }
 182 
 183 
 184 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 185                                               BasicType type) {
 186   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 187 
 188   LIR_Address* addr;
 189   if (index_opr->is_constant()) {
 190     int elem_size = type2aelembytes(type);
 191     addr = new LIR_Address(array_opr,
 192                            offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 193   } else {
 194 #ifdef _LP64
 195     if (index_opr->type() == T_INT) {
 196       LIR_Opr tmp = new_register(T_LONG);
 197       __ convert(Bytecodes::_i2l, index_opr, tmp);
 198       index_opr = tmp;
 199     }
 200 #endif // _LP64
 201     addr =  new LIR_Address(array_opr,
 202                             index_opr,
 203                             LIR_Address::scale(type),
 204                             offset_in_bytes, type);
 205   }
 206   return addr;
 207 }
 208 
 209 
 210 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 211   LIR_Opr r = NULL;
 212   if (type == T_LONG) {
 213     r = LIR_OprFact::longConst(x);
 214   } else if (type == T_INT) {
 215     r = LIR_OprFact::intConst(x);
 216   } else {
 217     ShouldNotReachHere();
 218   }
 219   return r;
 220 }
 221 
 222 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 223   LIR_Opr pointer = new_pointer_register();
 224   __ move(LIR_OprFact::intptrConst(counter), pointer);
 225   LIR_Address* addr = new LIR_Address(pointer, type);
 226   increment_counter(addr, step);
 227 }
 228 
 229 
 230 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 231   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 232 }
 233 
 234 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 235   __ cmp_mem_int(condition, base, disp, c, info);
 236 }
 237 
 238 
 239 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 240   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 241 }
 242 
 243 
 244 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 245   if (tmp->is_valid() && c > 0 && c < max_jint) {
 246     if (is_power_of_2(c + 1)) {
 247       __ move(left, tmp);
 248       __ shift_left(left, log2_intptr(c + 1), left);
 249       __ sub(left, tmp, result);
 250       return true;
 251     } else if (is_power_of_2(c - 1)) {
 252       __ move(left, tmp);
 253       __ shift_left(left, log2_intptr(c - 1), left);
 254       __ add(left, tmp, result);
 255       return true;
 256     }
 257   }
 258   return false;
 259 }
 260 
 261 
 262 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 263   BasicType type = item->type();
 264   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 265 }
 266 
 267 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 268   LIR_Opr tmp1 = new_register(objectType);
 269   LIR_Opr tmp2 = new_register(objectType);
 270   LIR_Opr tmp3 = new_register(objectType);
 271   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 272 }
 273 
 274 //----------------------------------------------------------------------
 275 //             visitor functions
 276 //----------------------------------------------------------------------
 277 
 278 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 279   assert(x->is_pinned(),"");
 280   LIRItem obj(x->obj(), this);
 281   obj.load_item();
 282 
 283   set_no_result(x);
 284 
 285   // "lock" stores the address of the monitor stack slot, so this is not an oop
 286   LIR_Opr lock = new_register(T_INT);
 287   // Need a scratch register for biased locking on x86
 288   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 289   if (UseBiasedLocking) {
 290     scratch = new_register(T_INT);
 291   }
 292 
 293   CodeEmitInfo* info_for_exception = NULL;
 294   if (x->needs_null_check()) {
 295     info_for_exception = state_for(x);
 296   }
 297   // this CodeEmitInfo must not have the xhandlers because here the
 298   // object is already locked (xhandlers expect object to be unlocked)
 299   CodeEmitInfo* info = state_for(x, x->state(), true);
 300   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 301                         x->monitor_no(), info_for_exception, info);
 302 }
 303 
 304 
 305 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 306   assert(x->is_pinned(),"");
 307 
 308   LIRItem obj(x->obj(), this);
 309   obj.dont_load_item();
 310 
 311   LIR_Opr lock = new_register(T_INT);
 312   LIR_Opr obj_temp = new_register(T_INT);
 313   set_no_result(x);
 314   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 315 }
 316 
 317 
 318 // _ineg, _lneg, _fneg, _dneg
 319 void LIRGenerator::do_NegateOp(NegateOp* x) {
 320   LIRItem value(x->x(), this);
 321   value.set_destroys_register();
 322   value.load_item();
 323   LIR_Opr reg = rlock(x);
 324   __ negate(value.result(), reg);
 325 
 326   set_result(x, round_item(reg));
 327 }
 328 
 329 
 330 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 331 //      _dadd, _dmul, _dsub, _ddiv, _drem
 332 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 333   LIRItem left(x->x(),  this);
 334   LIRItem right(x->y(), this);
 335   LIRItem* left_arg  = &left;
 336   LIRItem* right_arg = &right;
 337   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 338   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 339   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 340     left.load_item();
 341   } else {
 342     left.dont_load_item();
 343   }
 344 
 345   // do not load right operand if it is a constant.  only 0 and 1 are
 346   // loaded because there are special instructions for loading them
 347   // without memory access (not needed for SSE2 instructions)
 348   bool must_load_right = false;
 349   if (right.is_constant()) {
 350     LIR_Const* c = right.result()->as_constant_ptr();
 351     assert(c != NULL, "invalid constant");
 352     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 353 
 354     if (c->type() == T_FLOAT) {
 355       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 356     } else {
 357       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 358     }
 359   }
 360 
 361   if (must_load_both) {
 362     // frem and drem destroy also right operand, so move it to a new register
 363     right.set_destroys_register();
 364     right.load_item();
 365   } else if (right.is_register() || must_load_right) {
 366     right.load_item();
 367   } else {
 368     right.dont_load_item();
 369   }
 370   LIR_Opr reg = rlock(x);
 371   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 372   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 373     tmp = new_register(T_DOUBLE);
 374   }
 375 
 376   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 377     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 378     LIR_Opr fpu0, fpu1;
 379     if (x->op() == Bytecodes::_frem) {
 380       fpu0 = LIR_OprFact::single_fpu(0);
 381       fpu1 = LIR_OprFact::single_fpu(1);
 382     } else {
 383       fpu0 = LIR_OprFact::double_fpu(0);
 384       fpu1 = LIR_OprFact::double_fpu(1);
 385     }
 386     __ move(right.result(), fpu1); // order of left and right operand is important!
 387     __ move(left.result(), fpu0);
 388     __ rem (fpu0, fpu1, fpu0);
 389     __ move(fpu0, reg);
 390 
 391   } else {
 392     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 393   }
 394 
 395   set_result(x, round_item(reg));
 396 }
 397 
 398 
 399 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 400 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 401   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 402     // long division is implemented as a direct call into the runtime
 403     LIRItem left(x->x(), this);
 404     LIRItem right(x->y(), this);
 405 
 406     // the check for division by zero destroys the right operand
 407     right.set_destroys_register();
 408 
 409     BasicTypeList signature(2);
 410     signature.append(T_LONG);
 411     signature.append(T_LONG);
 412     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 413 
 414     // check for division by zero (destroys registers of right operand!)
 415     CodeEmitInfo* info = state_for(x);
 416 
 417     const LIR_Opr result_reg = result_register_for(x->type());
 418     left.load_item_force(cc->at(1));
 419     right.load_item();
 420 
 421     __ move(right.result(), cc->at(0));
 422 
 423     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 424     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 425 
 426     address entry = NULL;
 427     switch (x->op()) {
 428     case Bytecodes::_lrem:
 429       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 430       break; // check if dividend is 0 is done elsewhere
 431     case Bytecodes::_ldiv:
 432       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 433       break; // check if dividend is 0 is done elsewhere
 434     case Bytecodes::_lmul:
 435       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 436       break;
 437     default:
 438       ShouldNotReachHere();
 439     }
 440 
 441     LIR_Opr result = rlock_result(x);
 442     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 443     __ move(result_reg, result);
 444   } else if (x->op() == Bytecodes::_lmul) {
 445     // missing test if instr is commutative and if we should swap
 446     LIRItem left(x->x(), this);
 447     LIRItem right(x->y(), this);
 448 
 449     // right register is destroyed by the long mul, so it must be
 450     // copied to a new register.
 451     right.set_destroys_register();
 452 
 453     left.load_item();
 454     right.load_item();
 455 
 456     LIR_Opr reg = FrameMap::long0_opr;
 457     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 458     LIR_Opr result = rlock_result(x);
 459     __ move(reg, result);
 460   } else {
 461     // missing test if instr is commutative and if we should swap
 462     LIRItem left(x->x(), this);
 463     LIRItem right(x->y(), this);
 464 
 465     left.load_item();
 466     // don't load constants to save register
 467     right.load_nonconstant();
 468     rlock_result(x);
 469     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 470   }
 471 }
 472 
 473 
 474 
 475 // for: _iadd, _imul, _isub, _idiv, _irem
 476 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 477   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 478     // The requirements for division and modulo
 479     // input : rax,: dividend                         min_int
 480     //         reg: divisor   (may not be rax,/rdx)   -1
 481     //
 482     // output: rax,: quotient  (= rax, idiv reg)       min_int
 483     //         rdx: remainder (= rax, irem reg)       0
 484 
 485     // rax, and rdx will be destroyed
 486 
 487     // Note: does this invalidate the spec ???
 488     LIRItem right(x->y(), this);
 489     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 490 
 491     // call state_for before load_item_force because state_for may
 492     // force the evaluation of other instructions that are needed for
 493     // correct debug info.  Otherwise the live range of the fix
 494     // register might be too long.
 495     CodeEmitInfo* info = state_for(x);
 496 
 497     left.load_item_force(divInOpr());
 498 
 499     right.load_item();
 500 
 501     LIR_Opr result = rlock_result(x);
 502     LIR_Opr result_reg;
 503     if (x->op() == Bytecodes::_idiv) {
 504       result_reg = divOutOpr();
 505     } else {
 506       result_reg = remOutOpr();
 507     }
 508 
 509     if (!ImplicitDiv0Checks) {
 510       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 511       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 512       // Idiv/irem cannot trap (passing info would generate an assertion).
 513       info = NULL;
 514     }
 515     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 516     if (x->op() == Bytecodes::_irem) {
 517       __ irem(left.result(), right.result(), result_reg, tmp, info);
 518     } else if (x->op() == Bytecodes::_idiv) {
 519       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 520     } else {
 521       ShouldNotReachHere();
 522     }
 523 
 524     __ move(result_reg, result);
 525   } else {
 526     // missing test if instr is commutative and if we should swap
 527     LIRItem left(x->x(),  this);
 528     LIRItem right(x->y(), this);
 529     LIRItem* left_arg = &left;
 530     LIRItem* right_arg = &right;
 531     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 532       // swap them if left is real stack (or cached) and right is real register(not cached)
 533       left_arg = &right;
 534       right_arg = &left;
 535     }
 536 
 537     left_arg->load_item();
 538 
 539     // do not need to load right, as we can handle stack and constants
 540     if (x->op() == Bytecodes::_imul ) {
 541       // check if we can use shift instead
 542       bool use_constant = false;
 543       bool use_tmp = false;
 544       if (right_arg->is_constant()) {
 545         jint iconst = right_arg->get_jint_constant();
 546         if (iconst > 0 && iconst < max_jint) {
 547           if (is_power_of_2(iconst)) {
 548             use_constant = true;
 549           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 550             use_constant = true;
 551             use_tmp = true;
 552           }
 553         }
 554       }
 555       if (use_constant) {
 556         right_arg->dont_load_item();
 557       } else {
 558         right_arg->load_item();
 559       }
 560       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 561       if (use_tmp) {
 562         tmp = new_register(T_INT);
 563       }
 564       rlock_result(x);
 565 
 566       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 567     } else {
 568       right_arg->dont_load_item();
 569       rlock_result(x);
 570       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 571       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 572     }
 573   }
 574 }
 575 
 576 
 577 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 578   // when an operand with use count 1 is the left operand, then it is
 579   // likely that no move for 2-operand-LIR-form is necessary
 580   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 581     x->swap_operands();
 582   }
 583 
 584   ValueTag tag = x->type()->tag();
 585   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 586   switch (tag) {
 587     case floatTag:
 588     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 589     case longTag:    do_ArithmeticOp_Long(x); return;
 590     case intTag:     do_ArithmeticOp_Int(x);  return;
 591     default:         ShouldNotReachHere();    return;
 592   }
 593 }
 594 
 595 
 596 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 597 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 598   // count must always be in rcx
 599   LIRItem value(x->x(), this);
 600   LIRItem count(x->y(), this);
 601 
 602   ValueTag elemType = x->type()->tag();
 603   bool must_load_count = !count.is_constant() || elemType == longTag;
 604   if (must_load_count) {
 605     // count for long must be in register
 606     count.load_item_force(shiftCountOpr());
 607   } else {
 608     count.dont_load_item();
 609   }
 610   value.load_item();
 611   LIR_Opr reg = rlock_result(x);
 612 
 613   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 614 }
 615 
 616 
 617 // _iand, _land, _ior, _lor, _ixor, _lxor
 618 void LIRGenerator::do_LogicOp(LogicOp* x) {
 619   // when an operand with use count 1 is the left operand, then it is
 620   // likely that no move for 2-operand-LIR-form is necessary
 621   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 622     x->swap_operands();
 623   }
 624 
 625   LIRItem left(x->x(), this);
 626   LIRItem right(x->y(), this);
 627 
 628   left.load_item();
 629   right.load_nonconstant();
 630   LIR_Opr reg = rlock_result(x);
 631 
 632   logic_op(x->op(), reg, left.result(), right.result());
 633 }
 634 
 635 
 636 
 637 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 638 void LIRGenerator::do_CompareOp(CompareOp* x) {
 639   LIRItem left(x->x(), this);
 640   LIRItem right(x->y(), this);
 641   ValueTag tag = x->x()->type()->tag();
 642   if (tag == longTag) {
 643     left.set_destroys_register();
 644   }
 645   left.load_item();
 646   right.load_item();
 647   LIR_Opr reg = rlock_result(x);
 648 
 649   if (x->x()->type()->is_float_kind()) {
 650     Bytecodes::Code code = x->op();
 651     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 652   } else if (x->x()->type()->tag() == longTag) {
 653     __ lcmp2int(left.result(), right.result(), reg);
 654   } else {
 655     Unimplemented();
 656   }
 657 }
 658 
 659 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 660   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 661   if (type == T_OBJECT || type == T_ARRAY) {
 662     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 663     new_value.load_item();
 664     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 665   } else if (type == T_INT) {
 666     cmp_value.load_item_force(FrameMap::rax_opr);
 667     new_value.load_item();
 668     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 669   } else if (type == T_LONG) {
 670     cmp_value.load_item_force(FrameMap::long0_opr);
 671     new_value.load_item_force(FrameMap::long1_opr);
 672     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 673   } else {
 674     Unimplemented();
 675   }
 676   LIR_Opr result = new_register(T_INT);
 677   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 678            result, type);
 679   return result;
 680 }
 681 
 682 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 683   bool is_oop = type == T_OBJECT || type == T_ARRAY;
 684   LIR_Opr result = new_register(type);
 685   value.load_item();
 686   // Because we want a 2-arg form of xchg and xadd
 687   __ move(value.result(), result);
 688   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
 689   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 690   return result;
 691 }
 692 
 693 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 694   LIR_Opr result = new_register(type);
 695   value.load_item();
 696   // Because we want a 2-arg form of xchg and xadd
 697   __ move(value.result(), result);
 698   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 699   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 700   return result;
 701 }
 702 
 703 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 704   assert(x->number_of_arguments() == 3, "wrong type");
 705   assert(UseFMA, "Needs FMA instructions support.");
 706   LIRItem value(x->argument_at(0), this);
 707   LIRItem value1(x->argument_at(1), this);
 708   LIRItem value2(x->argument_at(2), this);
 709 
 710   value2.set_destroys_register();
 711 
 712   value.load_item();
 713   value1.load_item();
 714   value2.load_item();
 715 
 716   LIR_Opr calc_input = value.result();
 717   LIR_Opr calc_input1 = value1.result();
 718   LIR_Opr calc_input2 = value2.result();
 719   LIR_Opr calc_result = rlock_result(x);
 720 
 721   switch (x->id()) {
 722   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 723   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 724   default:                    ShouldNotReachHere();
 725   }
 726 
 727 }
 728 
 729 
 730 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 731   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 732 
 733   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 734       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 735       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 736       x->id() == vmIntrinsics::_dlog10) {
 737     do_LibmIntrinsic(x);
 738     return;
 739   }
 740 
 741   LIRItem value(x->argument_at(0), this);
 742 
 743   bool use_fpu = false;
 744   if (UseSSE < 2) {
 745     value.set_destroys_register();
 746   }
 747   value.load_item();
 748 
 749   LIR_Opr calc_input = value.result();
 750   LIR_Opr calc_result = rlock_result(x);
 751 
 752   switch(x->id()) {
 753     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 754     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 755     default:                    ShouldNotReachHere();
 756   }
 757 
 758   if (use_fpu) {
 759     __ move(calc_result, x->operand());
 760   }
 761 }
 762 
 763 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 764   LIRItem value(x->argument_at(0), this);
 765   value.set_destroys_register();
 766 
 767   LIR_Opr calc_result = rlock_result(x);
 768   LIR_Opr result_reg = result_register_for(x->type());
 769 
 770   CallingConvention* cc = NULL;
 771 
 772   if (x->id() == vmIntrinsics::_dpow) {
 773     LIRItem value1(x->argument_at(1), this);
 774 
 775     value1.set_destroys_register();
 776 
 777     BasicTypeList signature(2);
 778     signature.append(T_DOUBLE);
 779     signature.append(T_DOUBLE);
 780     cc = frame_map()->c_calling_convention(&signature);
 781     value.load_item_force(cc->at(0));
 782     value1.load_item_force(cc->at(1));
 783   } else {
 784     BasicTypeList signature(1);
 785     signature.append(T_DOUBLE);
 786     cc = frame_map()->c_calling_convention(&signature);
 787     value.load_item_force(cc->at(0));
 788   }
 789 
 790 #ifndef _LP64
 791   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 792   result_reg = tmp;
 793   switch(x->id()) {
 794     case vmIntrinsics::_dexp:
 795       if (StubRoutines::dexp() != NULL) {
 796         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 797       } else {
 798         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 799       }
 800       break;
 801     case vmIntrinsics::_dlog:
 802       if (StubRoutines::dlog() != NULL) {
 803         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 804       } else {
 805         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 806       }
 807       break;
 808     case vmIntrinsics::_dlog10:
 809       if (StubRoutines::dlog10() != NULL) {
 810        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 811       } else {
 812         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 813       }
 814       break;
 815     case vmIntrinsics::_dpow:
 816       if (StubRoutines::dpow() != NULL) {
 817         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 818       } else {
 819         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 820       }
 821       break;
 822     case vmIntrinsics::_dsin:
 823       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 824         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 825       } else {
 826         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 827       }
 828       break;
 829     case vmIntrinsics::_dcos:
 830       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 831         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 832       } else {
 833         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 834       }
 835       break;
 836     case vmIntrinsics::_dtan:
 837       if (StubRoutines::dtan() != NULL) {
 838         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 839       } else {
 840         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 841       }
 842       break;
 843     default:  ShouldNotReachHere();
 844   }
 845 #else
 846   switch (x->id()) {
 847     case vmIntrinsics::_dexp:
 848       if (StubRoutines::dexp() != NULL) {
 849         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 850       } else {
 851         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 852       }
 853       break;
 854     case vmIntrinsics::_dlog:
 855       if (StubRoutines::dlog() != NULL) {
 856       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 857       } else {
 858         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 859       }
 860       break;
 861     case vmIntrinsics::_dlog10:
 862       if (StubRoutines::dlog10() != NULL) {
 863       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 864       } else {
 865         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 866       }
 867       break;
 868     case vmIntrinsics::_dpow:
 869        if (StubRoutines::dpow() != NULL) {
 870       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 871       } else {
 872         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 873       }
 874       break;
 875     case vmIntrinsics::_dsin:
 876       if (StubRoutines::dsin() != NULL) {
 877         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 878       } else {
 879         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 880       }
 881       break;
 882     case vmIntrinsics::_dcos:
 883       if (StubRoutines::dcos() != NULL) {
 884         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 885       } else {
 886         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 887       }
 888       break;
 889     case vmIntrinsics::_dtan:
 890        if (StubRoutines::dtan() != NULL) {
 891       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 892       } else {
 893         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 894       }
 895       break;
 896     default:  ShouldNotReachHere();
 897   }
 898 #endif // _LP64
 899   __ move(result_reg, calc_result);
 900 }
 901 
 902 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 903   assert(x->number_of_arguments() == 5, "wrong type");
 904 
 905   // Make all state_for calls early since they can emit code
 906   CodeEmitInfo* info = state_for(x, x->state());
 907 
 908   LIRItem src(x->argument_at(0), this);
 909   LIRItem src_pos(x->argument_at(1), this);
 910   LIRItem dst(x->argument_at(2), this);
 911   LIRItem dst_pos(x->argument_at(3), this);
 912   LIRItem length(x->argument_at(4), this);
 913 
 914   // operands for arraycopy must use fixed registers, otherwise
 915   // LinearScan will fail allocation (because arraycopy always needs a
 916   // call)
 917 
 918 #ifndef _LP64
 919   src.load_item_force     (FrameMap::rcx_oop_opr);
 920   src_pos.load_item_force (FrameMap::rdx_opr);
 921   dst.load_item_force     (FrameMap::rax_oop_opr);
 922   dst_pos.load_item_force (FrameMap::rbx_opr);
 923   length.load_item_force  (FrameMap::rdi_opr);
 924   LIR_Opr tmp =           (FrameMap::rsi_opr);
 925 #else
 926 
 927   // The java calling convention will give us enough registers
 928   // so that on the stub side the args will be perfect already.
 929   // On the other slow/special case side we call C and the arg
 930   // positions are not similar enough to pick one as the best.
 931   // Also because the java calling convention is a "shifted" version
 932   // of the C convention we can process the java args trivially into C
 933   // args without worry of overwriting during the xfer
 934 
 935   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
 936   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
 937   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
 938   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
 939   length.load_item_force  (FrameMap::as_opr(j_rarg4));
 940 
 941   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
 942 #endif // LP64
 943 
 944   set_no_result(x);
 945 
 946   int flags;
 947   ciArrayKlass* expected_type;
 948   arraycopy_helper(x, &flags, &expected_type);
 949 
 950   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
 951 }
 952 
 953 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
 954   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
 955   // Make all state_for calls early since they can emit code
 956   LIR_Opr result = rlock_result(x);
 957   int flags = 0;
 958   switch (x->id()) {
 959     case vmIntrinsics::_updateCRC32: {
 960       LIRItem crc(x->argument_at(0), this);
 961       LIRItem val(x->argument_at(1), this);
 962       // val is destroyed by update_crc32
 963       val.set_destroys_register();
 964       crc.load_item();
 965       val.load_item();
 966       __ update_crc32(crc.result(), val.result(), result);
 967       break;
 968     }
 969     case vmIntrinsics::_updateBytesCRC32:
 970     case vmIntrinsics::_updateByteBufferCRC32: {
 971       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
 972 
 973       LIRItem crc(x->argument_at(0), this);
 974       LIRItem buf(x->argument_at(1), this);
 975       LIRItem off(x->argument_at(2), this);
 976       LIRItem len(x->argument_at(3), this);
 977       buf.load_item();
 978       off.load_nonconstant();
 979 
 980       LIR_Opr index = off.result();
 981       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
 982       if(off.result()->is_constant()) {
 983         index = LIR_OprFact::illegalOpr;
 984        offset += off.result()->as_jint();
 985       }
 986       LIR_Opr base_op = buf.result();
 987 
 988 #ifndef _LP64
 989       if (!is_updateBytes) { // long b raw address
 990          base_op = new_register(T_INT);
 991          __ convert(Bytecodes::_l2i, buf.result(), base_op);
 992       }
 993 #else
 994       if (index->is_valid()) {
 995         LIR_Opr tmp = new_register(T_LONG);
 996         __ convert(Bytecodes::_i2l, index, tmp);
 997         index = tmp;
 998       }
 999 #endif
1000 
1001       if (is_updateBytes) {
1002         base_op = access_resolve(IS_NOT_NULL | ACCESS_READ, base_op);
1003       }
1004 
1005       LIR_Address* a = new LIR_Address(base_op,
1006                                        index,
1007                                        offset,
1008                                        T_BYTE);
1009       BasicTypeList signature(3);
1010       signature.append(T_INT);
1011       signature.append(T_ADDRESS);
1012       signature.append(T_INT);
1013       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1014       const LIR_Opr result_reg = result_register_for(x->type());
1015 
1016       LIR_Opr addr = new_pointer_register();
1017       __ leal(LIR_OprFact::address(a), addr);
1018 
1019       crc.load_item_force(cc->at(0));
1020       __ move(addr, cc->at(1));
1021       len.load_item_force(cc->at(2));
1022 
1023       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1024       __ move(result_reg, result);
1025 
1026       break;
1027     }
1028     default: {
1029       ShouldNotReachHere();
1030     }
1031   }
1032 }
1033 
1034 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1035   Unimplemented();
1036 }
1037 
1038 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1039   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1040 
1041   // Make all state_for calls early since they can emit code
1042   LIR_Opr result = rlock_result(x);
1043 
1044   LIRItem a(x->argument_at(0), this); // Object
1045   LIRItem aOffset(x->argument_at(1), this); // long
1046   LIRItem b(x->argument_at(2), this); // Object
1047   LIRItem bOffset(x->argument_at(3), this); // long
1048   LIRItem length(x->argument_at(4), this); // int
1049   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1050 
1051   a.load_item();
1052   aOffset.load_nonconstant();
1053   b.load_item();
1054   bOffset.load_nonconstant();
1055 
1056   long constant_aOffset = 0;
1057   LIR_Opr result_aOffset = aOffset.result();
1058   if (result_aOffset->is_constant()) {
1059     constant_aOffset = result_aOffset->as_jlong();
1060     result_aOffset = LIR_OprFact::illegalOpr;
1061   }
1062   LIR_Opr result_a = access_resolve(ACCESS_READ, a.result());
1063 
1064   long constant_bOffset = 0;
1065   LIR_Opr result_bOffset = bOffset.result();
1066   if (result_bOffset->is_constant()) {
1067     constant_bOffset = result_bOffset->as_jlong();
1068     result_bOffset = LIR_OprFact::illegalOpr;
1069   }
1070   LIR_Opr result_b = access_resolve(ACCESS_READ, b.result());
1071 
1072 #ifndef _LP64
1073   result_a = new_register(T_INT);
1074   __ convert(Bytecodes::_l2i, a.result(), result_a);
1075   result_b = new_register(T_INT);
1076   __ convert(Bytecodes::_l2i, b.result(), result_b);
1077 #endif
1078 
1079 
1080   LIR_Address* addr_a = new LIR_Address(result_a,
1081                                         result_aOffset,
1082                                         constant_aOffset,
1083                                         T_BYTE);
1084 
1085   LIR_Address* addr_b = new LIR_Address(result_b,
1086                                         result_bOffset,
1087                                         constant_bOffset,
1088                                         T_BYTE);
1089 
1090   BasicTypeList signature(4);
1091   signature.append(T_ADDRESS);
1092   signature.append(T_ADDRESS);
1093   signature.append(T_INT);
1094   signature.append(T_INT);
1095   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1096   const LIR_Opr result_reg = result_register_for(x->type());
1097 
1098   LIR_Opr ptr_addr_a = new_pointer_register();
1099   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1100 
1101   LIR_Opr ptr_addr_b = new_pointer_register();
1102   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1103 
1104   __ move(ptr_addr_a, cc->at(0));
1105   __ move(ptr_addr_b, cc->at(1));
1106   length.load_item_force(cc->at(2));
1107   log2ArrayIndexScale.load_item_force(cc->at(3));
1108 
1109   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1110   __ move(result_reg, result);
1111 }
1112 
1113 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1114 // _i2b, _i2c, _i2s
1115 LIR_Opr fixed_register_for(BasicType type) {
1116   switch (type) {
1117     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1118     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1119     case T_INT:    return FrameMap::rax_opr;
1120     case T_LONG:   return FrameMap::long0_opr;
1121     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1122   }
1123 }
1124 
1125 void LIRGenerator::do_Convert(Convert* x) {
1126   // flags that vary for the different operations and different SSE-settings
1127   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1128 
1129   switch (x->op()) {
1130     case Bytecodes::_i2l: // fall through
1131     case Bytecodes::_l2i: // fall through
1132     case Bytecodes::_i2b: // fall through
1133     case Bytecodes::_i2c: // fall through
1134     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1135 
1136     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1137     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1138     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1139     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1140     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1141     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1142     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1143     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1144     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1145     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1146     default: ShouldNotReachHere();
1147   }
1148 
1149   LIRItem value(x->value(), this);
1150   value.load_item();
1151   LIR_Opr input = value.result();
1152   LIR_Opr result = rlock(x);
1153 
1154   // arguments of lir_convert
1155   LIR_Opr conv_input = input;
1156   LIR_Opr conv_result = result;
1157   ConversionStub* stub = NULL;
1158 
1159   if (fixed_input) {
1160     conv_input = fixed_register_for(input->type());
1161     __ move(input, conv_input);
1162   }
1163 
1164   assert(fixed_result == false || round_result == false, "cannot set both");
1165   if (fixed_result) {
1166     conv_result = fixed_register_for(result->type());
1167   } else if (round_result) {
1168     result = new_register(result->type());
1169     set_vreg_flag(result, must_start_in_memory);
1170   }
1171 
1172   if (needs_stub) {
1173     stub = new ConversionStub(x->op(), conv_input, conv_result);
1174   }
1175 
1176   __ convert(x->op(), conv_input, conv_result, stub);
1177 
1178   if (result != conv_result) {
1179     __ move(conv_result, result);
1180   }
1181 
1182   assert(result->is_virtual(), "result must be virtual register");
1183   set_result(x, result);
1184 }
1185 
1186 
1187 void LIRGenerator::do_NewInstance(NewInstance* x) {
1188   print_if_not_loaded(x);
1189 
1190   CodeEmitInfo* info = state_for(x, x->state());
1191   LIR_Opr reg = result_register_for(x->type());
1192   new_instance(reg, x->klass(), x->is_unresolved(),
1193                        FrameMap::rcx_oop_opr,
1194                        FrameMap::rdi_oop_opr,
1195                        FrameMap::rsi_oop_opr,
1196                        LIR_OprFact::illegalOpr,
1197                        FrameMap::rdx_metadata_opr, info);
1198   LIR_Opr result = rlock_result(x);
1199   __ move(reg, result);
1200 }
1201 
1202 void LIRGenerator::do_NewValueTypeInstance  (NewValueTypeInstance* x) {
1203   // Mapping to do_NewInstance (same code)
1204   CodeEmitInfo* info = state_for(x, x->state());
1205   x->set_to_object_type();
1206   LIR_Opr reg = result_register_for(x->type());
1207   new_instance(reg, x->klass(), x->is_unresolved(),
1208              FrameMap::rcx_oop_opr,
1209              FrameMap::rdi_oop_opr,
1210              FrameMap::rsi_oop_opr,
1211              LIR_OprFact::illegalOpr,
1212              FrameMap::rdx_metadata_opr, info);
1213   LIR_Opr result = rlock_result(x);
1214   __ move(reg, result);
1215 
1216 }
1217 
1218 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1219   CodeEmitInfo* info = state_for(x, x->state());
1220 
1221   LIRItem length(x->length(), this);
1222   length.load_item_force(FrameMap::rbx_opr);
1223 
1224   LIR_Opr reg = result_register_for(x->type());
1225   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1226   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1227   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1228   LIR_Opr tmp4 = reg;
1229   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1230   LIR_Opr len = length.result();
1231   BasicType elem_type = x->elt_type();
1232 
1233   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1234 
1235   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1236   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1237 
1238   LIR_Opr result = rlock_result(x);
1239   __ move(reg, result);
1240 }
1241 
1242 
1243 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1244   LIRItem length(x->length(), this);
1245   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1246   // and therefore provide the state before the parameters have been consumed
1247   CodeEmitInfo* patching_info = NULL;
1248   if (!x->klass()->is_loaded() || PatchALot) {
1249     patching_info =  state_for(x, x->state_before());
1250   }
1251 
1252   CodeEmitInfo* info = state_for(x, x->state());
1253 
1254   const LIR_Opr reg = result_register_for(x->type());
1255   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1256   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1257   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1258   LIR_Opr tmp4 = reg;
1259   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1260 
1261   length.load_item_force(FrameMap::rbx_opr);
1262   LIR_Opr len = length.result();
1263 
1264   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1265   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1266   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1267     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1268   }
1269   klass2reg_with_patching(klass_reg, obj, patching_info);
1270   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1271 
1272   LIR_Opr result = rlock_result(x);
1273   __ move(reg, result);
1274 }
1275 
1276 
1277 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1278   Values* dims = x->dims();
1279   int i = dims->length();
1280   LIRItemList* items = new LIRItemList(i, i, NULL);
1281   while (i-- > 0) {
1282     LIRItem* size = new LIRItem(dims->at(i), this);
1283     items->at_put(i, size);
1284   }
1285 
1286   // Evaluate state_for early since it may emit code.
1287   CodeEmitInfo* patching_info = NULL;
1288   if (!x->klass()->is_loaded() || PatchALot) {
1289     patching_info = state_for(x, x->state_before());
1290 
1291     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1292     // clone all handlers (NOTE: Usually this is handled transparently
1293     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1294     // is done explicitly here because a stub isn't being used).
1295     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1296   }
1297   CodeEmitInfo* info = state_for(x, x->state());
1298 
1299   i = dims->length();
1300   while (i-- > 0) {
1301     LIRItem* size = items->at(i);
1302     size->load_nonconstant();
1303 
1304     store_stack_parameter(size->result(), in_ByteSize(i*4));
1305   }
1306 
1307   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1308   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1309 
1310   LIR_Opr rank = FrameMap::rbx_opr;
1311   __ move(LIR_OprFact::intConst(x->rank()), rank);
1312   LIR_Opr varargs = FrameMap::rcx_opr;
1313   __ move(FrameMap::rsp_opr, varargs);
1314   LIR_OprList* args = new LIR_OprList(3);
1315   args->append(klass_reg);
1316   args->append(rank);
1317   args->append(varargs);
1318   LIR_Opr reg = result_register_for(x->type());
1319   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1320                   LIR_OprFact::illegalOpr,
1321                   reg, args, info);
1322 
1323   LIR_Opr result = rlock_result(x);
1324   __ move(reg, result);
1325 }
1326 
1327 
1328 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1329   // nothing to do for now
1330 }
1331 
1332 
1333 void LIRGenerator::do_CheckCast(CheckCast* x) {
1334   LIRItem obj(x->obj(), this);
1335 
1336   CodeEmitInfo* patching_info = NULL;
1337   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1338     // must do this before locking the destination register as an oop register,
1339     // and before the obj is loaded (the latter is for deoptimization)
1340     patching_info = state_for(x, x->state_before());
1341   }
1342   obj.load_item();
1343 
1344   // info for exceptions
1345   CodeEmitInfo* info_for_exception =
1346       (x->needs_exception_state() ? state_for(x) :
1347                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1348 
1349   CodeStub* stub;
1350   if (x->is_incompatible_class_change_check()) {
1351     assert(patching_info == NULL, "can't patch this");
1352     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1353   } else if (x->is_invokespecial_receiver_check()) {
1354     assert(patching_info == NULL, "can't patch this");
1355     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1356   } else {
1357     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1358   }
1359   LIR_Opr reg = rlock_result(x);
1360   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1361   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1362     tmp3 = new_register(objectType);
1363   }
1364   __ checkcast(reg, obj.result(), x->klass(),
1365                new_register(objectType), new_register(objectType), tmp3,
1366                x->direct_compare(), info_for_exception, patching_info, stub,
1367                x->profiled_method(), x->profiled_bci());
1368 }
1369 
1370 
1371 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1372   LIRItem obj(x->obj(), this);
1373 
1374   // result and test object may not be in same register
1375   LIR_Opr reg = rlock_result(x);
1376   CodeEmitInfo* patching_info = NULL;
1377   if ((!x->klass()->is_loaded() || PatchALot)) {
1378     // must do this before locking the destination register as an oop register
1379     patching_info = state_for(x, x->state_before());
1380   }
1381   obj.load_item();
1382   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1383   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1384     tmp3 = new_register(objectType);
1385   }
1386   __ instanceof(reg, obj.result(), x->klass(),
1387                 new_register(objectType), new_register(objectType), tmp3,
1388                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1389 }
1390 
1391 
1392 void LIRGenerator::do_If(If* x) {
1393   assert(x->number_of_sux() == 2, "inconsistency");
1394   ValueTag tag = x->x()->type()->tag();
1395   bool is_safepoint = x->is_safepoint();
1396 
1397   If::Condition cond = x->cond();
1398 
1399   LIRItem xitem(x->x(), this);
1400   LIRItem yitem(x->y(), this);
1401   LIRItem* xin = &xitem;
1402   LIRItem* yin = &yitem;
1403 
1404   if (tag == longTag) {
1405     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1406     // mirror for other conditions
1407     if (cond == If::gtr || cond == If::leq) {
1408       cond = Instruction::mirror(cond);
1409       xin = &yitem;
1410       yin = &xitem;
1411     }
1412     xin->set_destroys_register();
1413   }
1414   xin->load_item();
1415   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1416     // inline long zero
1417     yin->dont_load_item();
1418   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1419     // longs cannot handle constants at right side
1420     yin->load_item();
1421   } else {
1422     yin->dont_load_item();
1423   }
1424 
1425   LIR_Opr left = xin->result();
1426   LIR_Opr right = yin->result();
1427 
1428   set_no_result(x);
1429 
1430   // add safepoint before generating condition code so it can be recomputed
1431   if (x->is_safepoint()) {
1432     // increment backedge counter if needed
1433     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1434         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1435     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1436   }
1437 
1438   __ cmp(lir_cond(cond), left, right);
1439   // Generate branch profiling. Profiling code doesn't kill flags.
1440   profile_branch(x, cond);
1441   move_to_phi(x->state());
1442   if (x->x()->type()->is_float_kind()) {
1443     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1444   } else {
1445     __ branch(lir_cond(cond), right->type(), x->tsux());
1446   }
1447   assert(x->default_sux() == x->fsux(), "wrong destination above");
1448   __ jump(x->default_sux());
1449 }
1450 
1451 
1452 LIR_Opr LIRGenerator::getThreadPointer() {
1453 #ifdef _LP64
1454   return FrameMap::as_pointer_opr(r15_thread);
1455 #else
1456   LIR_Opr result = new_register(T_INT);
1457   __ get_thread(result);
1458   return result;
1459 #endif //
1460 }
1461 
1462 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1463   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1464   LIR_OprList* args = new LIR_OprList();
1465   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1466   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1467 }
1468 
1469 
1470 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1471                                         CodeEmitInfo* info) {
1472   if (address->type() == T_LONG) {
1473     address = new LIR_Address(address->base(),
1474                               address->index(), address->scale(),
1475                               address->disp(), T_DOUBLE);
1476     // Transfer the value atomically by using FP moves.  This means
1477     // the value has to be moved between CPU and FPU registers.  It
1478     // always has to be moved through spill slot since there's no
1479     // quick way to pack the value into an SSE register.
1480     LIR_Opr temp_double = new_register(T_DOUBLE);
1481     LIR_Opr spill = new_register(T_LONG);
1482     set_vreg_flag(spill, must_start_in_memory);
1483     __ move(value, spill);
1484     __ volatile_move(spill, temp_double, T_LONG);
1485     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1486   } else {
1487     __ store(value, address, info);
1488   }
1489 }
1490 
1491 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1492                                        CodeEmitInfo* info) {
1493   if (address->type() == T_LONG) {
1494     address = new LIR_Address(address->base(),
1495                               address->index(), address->scale(),
1496                               address->disp(), T_DOUBLE);
1497     // Transfer the value atomically by using FP moves.  This means
1498     // the value has to be moved between CPU and FPU registers.  In
1499     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1500     // SSE2+ mode it can be moved directly.
1501     LIR_Opr temp_double = new_register(T_DOUBLE);
1502     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1503     __ volatile_move(temp_double, result, T_LONG);
1504     if (UseSSE < 2) {
1505       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1506       set_vreg_flag(result, must_start_in_memory);
1507     }
1508   } else {
1509     __ load(address, result, info);
1510   }
1511 }
--- EOF ---