473     case T_SHORT:
 474     case T_INT:
 475       if (int_args < Argument::n_int_register_parameters_j) {
 476         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 477       } else {
 478         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 479         stk_args += 2;
 480       }
 481       break;
 482     case T_VOID:
 483       // halves of T_LONG or T_DOUBLE
 484       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 485       regs[i].set_bad();
 486       break;
 487     case T_LONG:
 488       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 489       // fall through
 490     case T_OBJECT:
 491     case T_ARRAY:
 492     case T_ADDRESS:

 493     case T_VALUETYPEPTR:
 494       if (int_args < Argument::n_int_register_parameters_j) {
 495         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 496       } else {
 497         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 498         stk_args += 2;
 499       }
 500       break;
 501     case T_FLOAT:
 502       if (fp_args < Argument::n_float_register_parameters_j) {
 503         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 504       } else {
 505         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 506         stk_args += 2;
 507       }
 508       break;
 509     case T_DOUBLE:
 510       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 511       if (fp_args < Argument::n_float_register_parameters_j) {
 512         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());

 473     case T_SHORT:
 474     case T_INT:
 475       if (int_args < Argument::n_int_register_parameters_j) {
 476         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 477       } else {
 478         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 479         stk_args += 2;
 480       }
 481       break;
 482     case T_VOID:
 483       // halves of T_LONG or T_DOUBLE
 484       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 485       regs[i].set_bad();
 486       break;
 487     case T_LONG:
 488       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 489       // fall through
 490     case T_OBJECT:
 491     case T_ARRAY:
 492     case T_ADDRESS:
 493     case T_VALUETYPE:
 494     case T_VALUETYPEPTR:
 495       if (int_args < Argument::n_int_register_parameters_j) {
 496         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 497       } else {
 498         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 499         stk_args += 2;
 500       }
 501       break;
 502     case T_FLOAT:
 503       if (fp_args < Argument::n_float_register_parameters_j) {
 504         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 505       } else {
 506         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 507         stk_args += 2;
 508       }
 509       break;
 510     case T_DOUBLE:
 511       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 512       if (fp_args < Argument::n_float_register_parameters_j) {
 513         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());