1 /* 2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_InstructionPrinter.hpp" 27 #include "c1/c1_LIR.hpp" 28 #include "c1/c1_LIRAssembler.hpp" 29 #include "c1/c1_ValueStack.hpp" 30 #include "ci/ciInstance.hpp" 31 #include "runtime/sharedRuntime.hpp" 32 33 Register LIR_OprDesc::as_register() const { 34 return FrameMap::cpu_rnr2reg(cpu_regnr()); 35 } 36 37 Register LIR_OprDesc::as_register_lo() const { 38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 39 } 40 41 Register LIR_OprDesc::as_register_hi() const { 42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 43 } 44 45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 46 47 LIR_Opr LIR_OprFact::value_type(ValueType* type) { 48 ValueTag tag = type->tag(); 49 switch (tag) { 50 case metaDataTag : { 51 ClassConstant* c = type->as_ClassConstant(); 52 if (c != NULL && !c->value()->is_loaded()) { 53 return LIR_OprFact::metadataConst(NULL); 54 } else if (c != NULL) { 55 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); 56 } else { 57 MethodConstant* m = type->as_MethodConstant(); 58 assert (m != NULL, "not a class or a method?"); 59 return LIR_OprFact::metadataConst(m->value()->constant_encoding()); 60 } 61 } 62 case objectTag : { 63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 64 } 65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); 66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 71 } 72 } 73 74 75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { 76 switch (type->tag()) { 77 case objectTag: return LIR_OprFact::oopConst(NULL); 78 case addressTag:return LIR_OprFact::addressConst(0); 79 case intTag: return LIR_OprFact::intConst(0); 80 case floatTag: return LIR_OprFact::floatConst(0.0); 81 case longTag: return LIR_OprFact::longConst(0); 82 case doubleTag: return LIR_OprFact::doubleConst(0.0); 83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 84 } 85 return illegalOpr; 86 } 87 88 89 90 //--------------------------------------------------- 91 92 93 LIR_Address::Scale LIR_Address::scale(BasicType type) { 94 int elem_size = type2aelembytes(type); 95 switch (elem_size) { 96 case 1: return LIR_Address::times_1; 97 case 2: return LIR_Address::times_2; 98 case 4: return LIR_Address::times_4; 99 case 8: return LIR_Address::times_8; 100 } 101 ShouldNotReachHere(); 102 return LIR_Address::times_1; 103 } 104 105 //--------------------------------------------------- 106 107 char LIR_OprDesc::type_char(BasicType t) { 108 switch (t) { 109 case T_ARRAY: 110 case T_VALUETYPE: 111 t = T_OBJECT; 112 case T_BOOLEAN: 113 case T_CHAR: 114 case T_FLOAT: 115 case T_DOUBLE: 116 case T_BYTE: 117 case T_SHORT: 118 case T_INT: 119 case T_LONG: 120 case T_OBJECT: 121 case T_ADDRESS: 122 case T_VOID: 123 return ::type2char(t); 124 case T_METADATA: 125 return 'M'; 126 case T_ILLEGAL: 127 return '?'; 128 129 default: 130 ShouldNotReachHere(); 131 return '?'; 132 } 133 } 134 135 #ifndef PRODUCT 136 void LIR_OprDesc::validate_type() const { 137 138 #ifdef ASSERT 139 if (!is_pointer() && !is_illegal()) { 140 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160 141 switch (as_BasicType(type_field())) { 142 case T_LONG: 143 assert((kindfield == cpu_register || kindfield == stack_value) && 144 size_field() == double_size, "must match"); 145 break; 146 case T_FLOAT: 147 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 148 assert((kindfield == fpu_register || kindfield == stack_value 149 ARM_ONLY(|| kindfield == cpu_register) 150 PPC32_ONLY(|| kindfield == cpu_register) ) && 151 size_field() == single_size, "must match"); 152 break; 153 case T_DOUBLE: 154 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 155 assert((kindfield == fpu_register || kindfield == stack_value 156 ARM_ONLY(|| kindfield == cpu_register) 157 PPC32_ONLY(|| kindfield == cpu_register) ) && 158 size_field() == double_size, "must match"); 159 break; 160 case T_BOOLEAN: 161 case T_CHAR: 162 case T_BYTE: 163 case T_SHORT: 164 case T_INT: 165 case T_ADDRESS: 166 case T_OBJECT: 167 case T_METADATA: 168 case T_ARRAY: 169 case T_VALUETYPE: 170 assert((kindfield == cpu_register || kindfield == stack_value) && 171 size_field() == single_size, "must match"); 172 break; 173 174 case T_ILLEGAL: 175 // XXX TKR also means unknown right now 176 // assert(is_illegal(), "must match"); 177 break; 178 179 default: 180 ShouldNotReachHere(); 181 } 182 } 183 #endif 184 185 } 186 #endif // PRODUCT 187 188 189 bool LIR_OprDesc::is_oop() const { 190 if (is_pointer()) { 191 return pointer()->is_oop_pointer(); 192 } else { 193 OprType t= type_field(); 194 assert(t != unknown_type, "not set"); 195 return t == object_type; 196 } 197 } 198 199 200 201 void LIR_Op2::verify() const { 202 #ifdef ASSERT 203 switch (code()) { 204 case lir_cmove: 205 case lir_xchg: 206 break; 207 208 default: 209 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 210 "can't produce oops from arith"); 211 } 212 213 if (TwoOperandLIRForm) { 214 215 #ifdef ASSERT 216 bool threeOperandForm = false; 217 #ifdef S390 218 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()). 219 threeOperandForm = 220 code() == lir_shl || 221 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT)); 222 #endif 223 #endif 224 225 switch (code()) { 226 case lir_add: 227 case lir_sub: 228 case lir_mul: 229 case lir_mul_strictfp: 230 case lir_div: 231 case lir_div_strictfp: 232 case lir_rem: 233 case lir_logic_and: 234 case lir_logic_or: 235 case lir_logic_xor: 236 case lir_shl: 237 case lir_shr: 238 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match"); 239 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 240 break; 241 242 // special handling for lir_ushr because of write barriers 243 case lir_ushr: 244 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant"); 245 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 246 break; 247 248 default: 249 break; 250 } 251 } 252 #endif 253 } 254 255 256 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) 257 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 258 , _cond(cond) 259 , _type(type) 260 , _label(block->label()) 261 , _block(block) 262 , _ublock(NULL) 263 , _stub(NULL) { 264 } 265 266 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : 267 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 268 , _cond(cond) 269 , _type(type) 270 , _label(stub->entry()) 271 , _block(NULL) 272 , _ublock(NULL) 273 , _stub(stub) { 274 } 275 276 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) 277 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 278 , _cond(cond) 279 , _type(type) 280 , _label(block->label()) 281 , _block(block) 282 , _ublock(ublock) 283 , _stub(NULL) 284 { 285 } 286 287 void LIR_OpBranch::change_block(BlockBegin* b) { 288 assert(_block != NULL, "must have old block"); 289 assert(_block->label() == label(), "must be equal"); 290 291 _block = b; 292 _label = b->label(); 293 } 294 295 void LIR_OpBranch::change_ublock(BlockBegin* b) { 296 assert(_ublock != NULL, "must have old block"); 297 _ublock = b; 298 } 299 300 void LIR_OpBranch::negate_cond() { 301 switch (_cond) { 302 case lir_cond_equal: _cond = lir_cond_notEqual; break; 303 case lir_cond_notEqual: _cond = lir_cond_equal; break; 304 case lir_cond_less: _cond = lir_cond_greaterEqual; break; 305 case lir_cond_lessEqual: _cond = lir_cond_greater; break; 306 case lir_cond_greaterEqual: _cond = lir_cond_less; break; 307 case lir_cond_greater: _cond = lir_cond_lessEqual; break; 308 default: ShouldNotReachHere(); 309 } 310 } 311 312 313 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 314 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 315 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 316 CodeStub* stub) 317 318 : LIR_Op(code, result, NULL) 319 , _object(object) 320 , _array(LIR_OprFact::illegalOpr) 321 , _klass(klass) 322 , _tmp1(tmp1) 323 , _tmp2(tmp2) 324 , _tmp3(tmp3) 325 , _fast_check(fast_check) 326 , _info_for_patch(info_for_patch) 327 , _info_for_exception(info_for_exception) 328 , _stub(stub) 329 , _profiled_method(NULL) 330 , _profiled_bci(-1) 331 , _should_profile(false) 332 { 333 if (code == lir_checkcast) { 334 assert(info_for_exception != NULL, "checkcast throws exceptions"); 335 } else if (code == lir_instanceof) { 336 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 337 } else { 338 ShouldNotReachHere(); 339 } 340 } 341 342 343 344 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) 345 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 346 , _object(object) 347 , _array(array) 348 , _klass(NULL) 349 , _tmp1(tmp1) 350 , _tmp2(tmp2) 351 , _tmp3(tmp3) 352 , _fast_check(false) 353 , _info_for_patch(NULL) 354 , _info_for_exception(info_for_exception) 355 , _stub(NULL) 356 , _profiled_method(NULL) 357 , _profiled_bci(-1) 358 , _should_profile(false) 359 { 360 if (code == lir_store_check) { 361 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 362 assert(info_for_exception != NULL, "store_check throws exceptions"); 363 } else { 364 ShouldNotReachHere(); 365 } 366 } 367 368 369 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 370 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 371 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 372 , _src(src) 373 , _src_pos(src_pos) 374 , _dst(dst) 375 , _dst_pos(dst_pos) 376 , _length(length) 377 , _tmp(tmp) 378 , _expected_type(expected_type) 379 , _flags(flags) { 380 _stub = new ArrayCopyStub(this); 381 } 382 383 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) 384 : LIR_Op(lir_updatecrc32, res, NULL) 385 , _crc(crc) 386 , _val(val) { 387 } 388 389 //-------------------verify-------------------------- 390 391 void LIR_Op1::verify() const { 392 switch(code()) { 393 case lir_move: 394 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 395 break; 396 case lir_null_check: 397 assert(in_opr()->is_register(), "must be"); 398 break; 399 case lir_return: 400 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 401 break; 402 default: 403 break; 404 } 405 } 406 407 void LIR_OpRTCall::verify() const { 408 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 409 } 410 411 //-------------------visits-------------------------- 412 413 // complete rework of LIR instruction visitor. 414 // The virtual call for each instruction type is replaced by a big 415 // switch that adds the operands for each instruction 416 417 void LIR_OpVisitState::visit(LIR_Op* op) { 418 // copy information from the LIR_Op 419 reset(); 420 set_op(op); 421 422 switch (op->code()) { 423 424 // LIR_Op0 425 case lir_word_align: // result and info always invalid 426 case lir_backwardbranch_target: // result and info always invalid 427 case lir_build_frame: // result and info always invalid 428 case lir_fpop_raw: // result and info always invalid 429 case lir_24bit_FPU: // result and info always invalid 430 case lir_reset_FPU: // result and info always invalid 431 case lir_breakpoint: // result and info always invalid 432 case lir_membar: // result and info always invalid 433 case lir_membar_acquire: // result and info always invalid 434 case lir_membar_release: // result and info always invalid 435 case lir_membar_loadload: // result and info always invalid 436 case lir_membar_storestore: // result and info always invalid 437 case lir_membar_loadstore: // result and info always invalid 438 case lir_membar_storeload: // result and info always invalid 439 case lir_on_spin_wait: 440 { 441 assert(op->as_Op0() != NULL, "must be"); 442 assert(op->_info == NULL, "info not used by this instruction"); 443 assert(op->_result->is_illegal(), "not used"); 444 break; 445 } 446 447 case lir_nop: // may have info, result always invalid 448 case lir_std_entry: // may have result, info always invalid 449 case lir_osr_entry: // may have result, info always invalid 450 case lir_get_thread: // may have result, info always invalid 451 { 452 assert(op->as_Op0() != NULL, "must be"); 453 if (op->_info != NULL) do_info(op->_info); 454 if (op->_result->is_valid()) do_output(op->_result); 455 break; 456 } 457 458 459 // LIR_OpLabel 460 case lir_label: // result and info always invalid 461 { 462 assert(op->as_OpLabel() != NULL, "must be"); 463 assert(op->_info == NULL, "info not used by this instruction"); 464 assert(op->_result->is_illegal(), "not used"); 465 break; 466 } 467 468 469 // LIR_Op1 470 case lir_fxch: // input always valid, result and info always invalid 471 case lir_fld: // input always valid, result and info always invalid 472 case lir_ffree: // input always valid, result and info always invalid 473 case lir_push: // input always valid, result and info always invalid 474 case lir_pop: // input always valid, result and info always invalid 475 case lir_return: // input always valid, result and info always invalid 476 case lir_leal: // input and result always valid, info always invalid 477 case lir_neg: // input and result always valid, info always invalid 478 case lir_monaddr: // input and result always valid, info always invalid 479 case lir_null_check: // input and info always valid, result always invalid 480 case lir_move: // input and result always valid, may have info 481 case lir_pack64: // input and result always valid 482 case lir_unpack64: // input and result always valid 483 { 484 assert(op->as_Op1() != NULL, "must be"); 485 LIR_Op1* op1 = (LIR_Op1*)op; 486 487 if (op1->_info) do_info(op1->_info); 488 if (op1->_opr->is_valid()) do_input(op1->_opr); 489 if (op1->_result->is_valid()) do_output(op1->_result); 490 491 break; 492 } 493 494 case lir_safepoint: 495 { 496 assert(op->as_Op1() != NULL, "must be"); 497 LIR_Op1* op1 = (LIR_Op1*)op; 498 499 assert(op1->_info != NULL, ""); do_info(op1->_info); 500 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 501 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 502 503 break; 504 } 505 506 // LIR_OpConvert; 507 case lir_convert: // input and result always valid, info always invalid 508 { 509 assert(op->as_OpConvert() != NULL, "must be"); 510 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 511 512 assert(opConvert->_info == NULL, "must be"); 513 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 514 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 515 #ifdef PPC32 516 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); 517 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); 518 #endif 519 do_stub(opConvert->_stub); 520 521 break; 522 } 523 524 // LIR_OpBranch; 525 case lir_branch: // may have info, input and result register always invalid 526 case lir_cond_float_branch: // may have info, input and result register always invalid 527 { 528 assert(op->as_OpBranch() != NULL, "must be"); 529 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 530 531 if (opBranch->_info != NULL) do_info(opBranch->_info); 532 assert(opBranch->_result->is_illegal(), "not used"); 533 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 534 535 break; 536 } 537 538 539 // LIR_OpAllocObj 540 case lir_alloc_object: 541 { 542 assert(op->as_OpAllocObj() != NULL, "must be"); 543 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 544 545 if (opAllocObj->_info) do_info(opAllocObj->_info); 546 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); 547 do_temp(opAllocObj->_opr); 548 } 549 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 550 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 551 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 552 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 553 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 554 do_stub(opAllocObj->_stub); 555 break; 556 } 557 558 559 // LIR_OpRoundFP; 560 case lir_roundfp: { 561 assert(op->as_OpRoundFP() != NULL, "must be"); 562 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 563 564 assert(op->_info == NULL, "info not used by this instruction"); 565 assert(opRoundFP->_tmp->is_illegal(), "not used"); 566 do_input(opRoundFP->_opr); 567 do_output(opRoundFP->_result); 568 569 break; 570 } 571 572 573 // LIR_Op2 574 case lir_cmp: 575 case lir_cmp_l2i: 576 case lir_ucmp_fd2i: 577 case lir_cmp_fd2i: 578 case lir_add: 579 case lir_sub: 580 case lir_mul: 581 case lir_div: 582 case lir_rem: 583 case lir_sqrt: 584 case lir_abs: 585 case lir_logic_and: 586 case lir_logic_or: 587 case lir_logic_xor: 588 case lir_shl: 589 case lir_shr: 590 case lir_ushr: 591 case lir_xadd: 592 case lir_xchg: 593 case lir_assert: 594 { 595 assert(op->as_Op2() != NULL, "must be"); 596 LIR_Op2* op2 = (LIR_Op2*)op; 597 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 598 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 599 600 if (op2->_info) do_info(op2->_info); 601 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 602 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 603 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 604 if (op2->_result->is_valid()) do_output(op2->_result); 605 if (op->code() == lir_xchg || op->code() == lir_xadd) { 606 // on ARM and PPC, return value is loaded first so could 607 // destroy inputs. On other platforms that implement those 608 // (x86, sparc), the extra constrainsts are harmless. 609 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 610 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 611 } 612 613 break; 614 } 615 616 // special handling for cmove: right input operand must not be equal 617 // to the result operand, otherwise the backend fails 618 case lir_cmove: 619 { 620 assert(op->as_Op2() != NULL, "must be"); 621 LIR_Op2* op2 = (LIR_Op2*)op; 622 623 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() && 624 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 625 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); 626 627 do_input(op2->_opr1); 628 do_input(op2->_opr2); 629 do_temp(op2->_opr2); 630 do_output(op2->_result); 631 632 break; 633 } 634 635 // vspecial handling for strict operations: register input operands 636 // as temp to guarantee that they do not overlap with other 637 // registers 638 case lir_mul_strictfp: 639 case lir_div_strictfp: 640 { 641 assert(op->as_Op2() != NULL, "must be"); 642 LIR_Op2* op2 = (LIR_Op2*)op; 643 644 assert(op2->_info == NULL, "not used"); 645 assert(op2->_opr1->is_valid(), "used"); 646 assert(op2->_opr2->is_valid(), "used"); 647 assert(op2->_result->is_valid(), "used"); 648 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 649 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 650 651 do_input(op2->_opr1); do_temp(op2->_opr1); 652 do_input(op2->_opr2); do_temp(op2->_opr2); 653 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 654 do_output(op2->_result); 655 656 break; 657 } 658 659 case lir_throw: { 660 assert(op->as_Op2() != NULL, "must be"); 661 LIR_Op2* op2 = (LIR_Op2*)op; 662 663 if (op2->_info) do_info(op2->_info); 664 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 665 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 666 assert(op2->_result->is_illegal(), "no result"); 667 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 668 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 669 670 break; 671 } 672 673 case lir_unwind: { 674 assert(op->as_Op1() != NULL, "must be"); 675 LIR_Op1* op1 = (LIR_Op1*)op; 676 677 assert(op1->_info == NULL, "no info"); 678 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); 679 assert(op1->_result->is_illegal(), "no result"); 680 681 break; 682 } 683 684 // LIR_Op3 685 case lir_idiv: 686 case lir_irem: { 687 assert(op->as_Op3() != NULL, "must be"); 688 LIR_Op3* op3= (LIR_Op3*)op; 689 690 if (op3->_info) do_info(op3->_info); 691 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 692 693 // second operand is input and temp, so ensure that second operand 694 // and third operand get not the same register 695 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 696 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 697 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 698 699 if (op3->_result->is_valid()) do_output(op3->_result); 700 701 break; 702 } 703 704 case lir_fmad: 705 case lir_fmaf: { 706 assert(op->as_Op3() != NULL, "must be"); 707 LIR_Op3* op3= (LIR_Op3*)op; 708 assert(op3->_info == NULL, "no info"); 709 do_input(op3->_opr1); 710 do_input(op3->_opr2); 711 do_input(op3->_opr3); 712 do_output(op3->_result); 713 break; 714 } 715 716 // LIR_OpJavaCall 717 case lir_static_call: 718 case lir_optvirtual_call: 719 case lir_icvirtual_call: 720 case lir_virtual_call: 721 case lir_dynamic_call: { 722 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); 723 assert(opJavaCall != NULL, "must be"); 724 725 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 726 727 // only visit register parameters 728 int n = opJavaCall->_arguments->length(); 729 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) { 730 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 731 do_input(*opJavaCall->_arguments->adr_at(i)); 732 } 733 } 734 735 if (opJavaCall->_info) do_info(opJavaCall->_info); 736 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr && 737 opJavaCall->is_method_handle_invoke()) { 738 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); 739 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); 740 } 741 do_call(); 742 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 743 744 break; 745 } 746 747 748 // LIR_OpRTCall 749 case lir_rtcall: { 750 assert(op->as_OpRTCall() != NULL, "must be"); 751 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 752 753 // only visit register parameters 754 int n = opRTCall->_arguments->length(); 755 for (int i = 0; i < n; i++) { 756 if (!opRTCall->_arguments->at(i)->is_pointer()) { 757 do_input(*opRTCall->_arguments->adr_at(i)); 758 } 759 } 760 if (opRTCall->_info) do_info(opRTCall->_info); 761 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 762 do_call(); 763 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 764 765 break; 766 } 767 768 769 // LIR_OpArrayCopy 770 case lir_arraycopy: { 771 assert(op->as_OpArrayCopy() != NULL, "must be"); 772 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 773 774 assert(opArrayCopy->_result->is_illegal(), "unused"); 775 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 776 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 777 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 778 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 779 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 780 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 781 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 782 783 // the implementation of arraycopy always has a call into the runtime 784 do_call(); 785 786 break; 787 } 788 789 790 // LIR_OpUpdateCRC32 791 case lir_updatecrc32: { 792 assert(op->as_OpUpdateCRC32() != NULL, "must be"); 793 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; 794 795 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); 796 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); 797 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); 798 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); 799 800 break; 801 } 802 803 804 // LIR_OpLock 805 case lir_lock: 806 case lir_unlock: { 807 assert(op->as_OpLock() != NULL, "must be"); 808 LIR_OpLock* opLock = (LIR_OpLock*)op; 809 810 if (opLock->_info) do_info(opLock->_info); 811 812 // TODO: check if these operands really have to be temp 813 // (or if input is sufficient). This may have influence on the oop map! 814 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 815 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 816 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 817 818 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 819 assert(opLock->_result->is_illegal(), "unused"); 820 821 do_stub(opLock->_stub); 822 823 break; 824 } 825 826 827 // LIR_OpDelay 828 case lir_delay_slot: { 829 assert(op->as_OpDelay() != NULL, "must be"); 830 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 831 832 visit(opDelay->delay_op()); 833 break; 834 } 835 836 // LIR_OpTypeCheck 837 case lir_instanceof: 838 case lir_checkcast: 839 case lir_store_check: { 840 assert(op->as_OpTypeCheck() != NULL, "must be"); 841 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 842 843 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 844 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 845 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 846 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { 847 do_temp(opTypeCheck->_object); 848 } 849 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 850 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 851 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 852 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 853 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 854 do_stub(opTypeCheck->_stub); 855 break; 856 } 857 858 // LIR_OpCompareAndSwap 859 case lir_cas_long: 860 case lir_cas_obj: 861 case lir_cas_int: { 862 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 863 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 864 865 assert(opCompareAndSwap->_addr->is_valid(), "used"); 866 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); 867 assert(opCompareAndSwap->_new_value->is_valid(), "used"); 868 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 869 do_input(opCompareAndSwap->_addr); 870 do_temp(opCompareAndSwap->_addr); 871 do_input(opCompareAndSwap->_cmp_value); 872 do_temp(opCompareAndSwap->_cmp_value); 873 do_input(opCompareAndSwap->_new_value); 874 do_temp(opCompareAndSwap->_new_value); 875 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 876 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 877 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 878 879 break; 880 } 881 882 883 // LIR_OpAllocArray; 884 case lir_alloc_array: { 885 assert(op->as_OpAllocArray() != NULL, "must be"); 886 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 887 888 if (opAllocArray->_info) do_info(opAllocArray->_info); 889 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 890 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 891 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 892 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 893 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 894 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 895 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 896 do_stub(opAllocArray->_stub); 897 break; 898 } 899 900 // LIR_OpProfileCall: 901 case lir_profile_call: { 902 assert(op->as_OpProfileCall() != NULL, "must be"); 903 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 904 905 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 906 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 907 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 908 break; 909 } 910 911 // LIR_OpProfileType: 912 case lir_profile_type: { 913 assert(op->as_OpProfileType() != NULL, "must be"); 914 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op; 915 916 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp); 917 do_input(opProfileType->_obj); 918 do_temp(opProfileType->_tmp); 919 break; 920 } 921 default: 922 op->visit(this); 923 } 924 } 925 926 void LIR_Op::visit(LIR_OpVisitState* state) { 927 ShouldNotReachHere(); 928 } 929 930 void LIR_OpVisitState::do_stub(CodeStub* stub) { 931 if (stub != NULL) { 932 stub->visit(this); 933 } 934 } 935 936 XHandlers* LIR_OpVisitState::all_xhandler() { 937 XHandlers* result = NULL; 938 939 int i; 940 for (i = 0; i < info_count(); i++) { 941 if (info_at(i)->exception_handlers() != NULL) { 942 result = info_at(i)->exception_handlers(); 943 break; 944 } 945 } 946 947 #ifdef ASSERT 948 for (i = 0; i < info_count(); i++) { 949 assert(info_at(i)->exception_handlers() == NULL || 950 info_at(i)->exception_handlers() == result, 951 "only one xhandler list allowed per LIR-operation"); 952 } 953 #endif 954 955 if (result != NULL) { 956 return result; 957 } else { 958 return new XHandlers(); 959 } 960 961 return result; 962 } 963 964 965 #ifdef ASSERT 966 bool LIR_OpVisitState::no_operands(LIR_Op* op) { 967 visit(op); 968 969 return opr_count(inputMode) == 0 && 970 opr_count(outputMode) == 0 && 971 opr_count(tempMode) == 0 && 972 info_count() == 0 && 973 !has_call() && 974 !has_slow_case(); 975 } 976 #endif 977 978 //--------------------------------------------------- 979 980 981 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 982 masm->emit_call(this); 983 } 984 985 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 986 masm->emit_rtcall(this); 987 } 988 989 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 990 masm->emit_opLabel(this); 991 } 992 993 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 994 masm->emit_arraycopy(this); 995 masm->append_code_stub(stub()); 996 } 997 998 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { 999 masm->emit_updatecrc32(this); 1000 } 1001 1002 void LIR_Op0::emit_code(LIR_Assembler* masm) { 1003 masm->emit_op0(this); 1004 } 1005 1006 void LIR_Op1::emit_code(LIR_Assembler* masm) { 1007 masm->emit_op1(this); 1008 } 1009 1010 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 1011 masm->emit_alloc_obj(this); 1012 masm->append_code_stub(stub()); 1013 } 1014 1015 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 1016 masm->emit_opBranch(this); 1017 if (stub()) { 1018 masm->append_code_stub(stub()); 1019 } 1020 } 1021 1022 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 1023 masm->emit_opConvert(this); 1024 if (stub() != NULL) { 1025 masm->append_code_stub(stub()); 1026 } 1027 } 1028 1029 void LIR_Op2::emit_code(LIR_Assembler* masm) { 1030 masm->emit_op2(this); 1031 } 1032 1033 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 1034 masm->emit_alloc_array(this); 1035 masm->append_code_stub(stub()); 1036 } 1037 1038 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 1039 masm->emit_opTypeCheck(this); 1040 if (stub()) { 1041 masm->append_code_stub(stub()); 1042 } 1043 } 1044 1045 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 1046 masm->emit_compare_and_swap(this); 1047 } 1048 1049 void LIR_Op3::emit_code(LIR_Assembler* masm) { 1050 masm->emit_op3(this); 1051 } 1052 1053 void LIR_OpLock::emit_code(LIR_Assembler* masm) { 1054 masm->emit_lock(this); 1055 if (stub()) { 1056 masm->append_code_stub(stub()); 1057 } 1058 } 1059 1060 #ifdef ASSERT 1061 void LIR_OpAssert::emit_code(LIR_Assembler* masm) { 1062 masm->emit_assert(this); 1063 } 1064 #endif 1065 1066 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 1067 masm->emit_delay(this); 1068 } 1069 1070 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 1071 masm->emit_profile_call(this); 1072 } 1073 1074 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) { 1075 masm->emit_profile_type(this); 1076 } 1077 1078 // LIR_List 1079 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 1080 : _operations(8) 1081 , _compilation(compilation) 1082 #ifndef PRODUCT 1083 , _block(block) 1084 #endif 1085 #ifdef ASSERT 1086 , _file(NULL) 1087 , _line(0) 1088 #endif 1089 { } 1090 1091 1092 #ifdef ASSERT 1093 void LIR_List::set_file_and_line(const char * file, int line) { 1094 const char * f = strrchr(file, '/'); 1095 if (f == NULL) f = strrchr(file, '\\'); 1096 if (f == NULL) { 1097 f = file; 1098 } else { 1099 f++; 1100 } 1101 _file = f; 1102 _line = line; 1103 } 1104 #endif 1105 1106 1107 void LIR_List::append(LIR_InsertionBuffer* buffer) { 1108 assert(this == buffer->lir_list(), "wrong lir list"); 1109 const int n = _operations.length(); 1110 1111 if (buffer->number_of_ops() > 0) { 1112 // increase size of instructions list 1113 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1114 // insert ops from buffer into instructions list 1115 int op_index = buffer->number_of_ops() - 1; 1116 int ip_index = buffer->number_of_insertion_points() - 1; 1117 int from_index = n - 1; 1118 int to_index = _operations.length() - 1; 1119 for (; ip_index >= 0; ip_index --) { 1120 int index = buffer->index_at(ip_index); 1121 // make room after insertion point 1122 while (index < from_index) { 1123 _operations.at_put(to_index --, _operations.at(from_index --)); 1124 } 1125 // insert ops from buffer 1126 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1127 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1128 } 1129 } 1130 } 1131 1132 buffer->finish(); 1133 } 1134 1135 1136 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1137 assert(reg->type() == T_OBJECT, "bad reg"); 1138 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1139 } 1140 1141 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { 1142 assert(reg->type() == T_METADATA, "bad reg"); 1143 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); 1144 } 1145 1146 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1147 append(new LIR_Op1( 1148 lir_move, 1149 LIR_OprFact::address(addr), 1150 src, 1151 addr->type(), 1152 patch_code, 1153 info)); 1154 } 1155 1156 1157 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1158 append(new LIR_Op1( 1159 lir_move, 1160 LIR_OprFact::address(address), 1161 dst, 1162 address->type(), 1163 patch_code, 1164 info, lir_move_volatile)); 1165 } 1166 1167 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1168 append(new LIR_Op1( 1169 lir_move, 1170 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1171 dst, 1172 type, 1173 patch_code, 1174 info, lir_move_volatile)); 1175 } 1176 1177 1178 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1179 append(new LIR_Op1( 1180 lir_move, 1181 LIR_OprFact::intConst(v), 1182 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1183 type, 1184 patch_code, 1185 info)); 1186 } 1187 1188 1189 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1190 append(new LIR_Op1( 1191 lir_move, 1192 LIR_OprFact::oopConst(o), 1193 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1194 type, 1195 patch_code, 1196 info)); 1197 } 1198 1199 1200 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1201 append(new LIR_Op1( 1202 lir_move, 1203 src, 1204 LIR_OprFact::address(addr), 1205 addr->type(), 1206 patch_code, 1207 info)); 1208 } 1209 1210 1211 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1212 append(new LIR_Op1( 1213 lir_move, 1214 src, 1215 LIR_OprFact::address(addr), 1216 addr->type(), 1217 patch_code, 1218 info, 1219 lir_move_volatile)); 1220 } 1221 1222 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1223 append(new LIR_Op1( 1224 lir_move, 1225 src, 1226 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1227 type, 1228 patch_code, 1229 info, lir_move_volatile)); 1230 } 1231 1232 1233 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1234 append(new LIR_Op3( 1235 lir_idiv, 1236 left, 1237 right, 1238 tmp, 1239 res, 1240 info)); 1241 } 1242 1243 1244 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1245 append(new LIR_Op3( 1246 lir_idiv, 1247 left, 1248 LIR_OprFact::intConst(right), 1249 tmp, 1250 res, 1251 info)); 1252 } 1253 1254 1255 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1256 append(new LIR_Op3( 1257 lir_irem, 1258 left, 1259 right, 1260 tmp, 1261 res, 1262 info)); 1263 } 1264 1265 1266 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1267 append(new LIR_Op3( 1268 lir_irem, 1269 left, 1270 LIR_OprFact::intConst(right), 1271 tmp, 1272 res, 1273 info)); 1274 } 1275 1276 1277 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1278 append(new LIR_Op2( 1279 lir_cmp, 1280 condition, 1281 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1282 LIR_OprFact::intConst(c), 1283 info)); 1284 } 1285 1286 1287 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1288 append(new LIR_Op2( 1289 lir_cmp, 1290 condition, 1291 reg, 1292 LIR_OprFact::address(addr), 1293 info)); 1294 } 1295 1296 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1297 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1298 append(new LIR_OpAllocObj( 1299 klass, 1300 dst, 1301 t1, 1302 t2, 1303 t3, 1304 t4, 1305 header_size, 1306 object_size, 1307 init_check, 1308 stub)); 1309 } 1310 1311 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1312 append(new LIR_OpAllocArray( 1313 klass, 1314 len, 1315 dst, 1316 t1, 1317 t2, 1318 t3, 1319 t4, 1320 type, 1321 stub)); 1322 } 1323 1324 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1325 append(new LIR_Op2( 1326 lir_shl, 1327 value, 1328 count, 1329 dst, 1330 tmp)); 1331 } 1332 1333 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1334 append(new LIR_Op2( 1335 lir_shr, 1336 value, 1337 count, 1338 dst, 1339 tmp)); 1340 } 1341 1342 1343 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1344 append(new LIR_Op2( 1345 lir_ushr, 1346 value, 1347 count, 1348 dst, 1349 tmp)); 1350 } 1351 1352 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1353 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1354 left, 1355 right, 1356 dst)); 1357 } 1358 1359 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { 1360 append(new LIR_OpLock( 1361 lir_lock, 1362 hdr, 1363 obj, 1364 lock, 1365 scratch, 1366 stub, 1367 info)); 1368 } 1369 1370 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { 1371 append(new LIR_OpLock( 1372 lir_unlock, 1373 hdr, 1374 obj, 1375 lock, 1376 scratch, 1377 stub, 1378 NULL)); 1379 } 1380 1381 1382 void check_LIR() { 1383 // cannot do the proper checking as PRODUCT and other modes return different results 1384 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); 1385 } 1386 1387 1388 1389 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1390 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1391 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1392 ciMethod* profiled_method, int profiled_bci) { 1393 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1394 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); 1395 if (profiled_method != NULL) { 1396 c->set_profiled_method(profiled_method); 1397 c->set_profiled_bci(profiled_bci); 1398 c->set_should_profile(true); 1399 } 1400 append(c); 1401 } 1402 1403 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { 1404 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); 1405 if (profiled_method != NULL) { 1406 c->set_profiled_method(profiled_method); 1407 c->set_profiled_bci(profiled_bci); 1408 c->set_should_profile(true); 1409 } 1410 append(c); 1411 } 1412 1413 1414 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 1415 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 1416 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 1417 if (profiled_method != NULL) { 1418 c->set_profiled_method(profiled_method); 1419 c->set_profiled_bci(profiled_bci); 1420 c->set_should_profile(true); 1421 } 1422 append(c); 1423 } 1424 1425 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { 1426 if (deoptimize_on_null) { 1427 // Emit an explicit null check and deoptimize if opr is null 1428 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none); 1429 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 1430 branch(lir_cond_equal, T_OBJECT, deopt); 1431 } else { 1432 // Emit an implicit null check 1433 append(new LIR_Op1(lir_null_check, opr, info)); 1434 } 1435 } 1436 1437 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1438 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1439 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); 1440 } 1441 1442 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1443 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1444 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); 1445 } 1446 1447 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1448 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1449 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); 1450 } 1451 1452 1453 #ifdef PRODUCT 1454 1455 void print_LIR(BlockList* blocks) { 1456 } 1457 1458 #else 1459 // LIR_OprDesc 1460 void LIR_OprDesc::print() const { 1461 print(tty); 1462 } 1463 1464 void LIR_OprDesc::print(outputStream* out) const { 1465 if (is_illegal()) { 1466 return; 1467 } 1468 1469 out->print("["); 1470 if (is_pointer()) { 1471 pointer()->print_value_on(out); 1472 } else if (is_single_stack()) { 1473 out->print("stack:%d", single_stack_ix()); 1474 } else if (is_double_stack()) { 1475 out->print("dbl_stack:%d",double_stack_ix()); 1476 } else if (is_virtual()) { 1477 out->print("R%d", vreg_number()); 1478 } else if (is_single_cpu()) { 1479 out->print("%s", as_register()->name()); 1480 } else if (is_double_cpu()) { 1481 out->print("%s", as_register_hi()->name()); 1482 out->print("%s", as_register_lo()->name()); 1483 #if defined(X86) 1484 } else if (is_single_xmm()) { 1485 out->print("%s", as_xmm_float_reg()->name()); 1486 } else if (is_double_xmm()) { 1487 out->print("%s", as_xmm_double_reg()->name()); 1488 } else if (is_single_fpu()) { 1489 out->print("fpu%d", fpu_regnr()); 1490 } else if (is_double_fpu()) { 1491 out->print("fpu%d", fpu_regnrLo()); 1492 #elif defined(AARCH64) 1493 } else if (is_single_fpu()) { 1494 out->print("fpu%d", fpu_regnr()); 1495 } else if (is_double_fpu()) { 1496 out->print("fpu%d", fpu_regnrLo()); 1497 #elif defined(ARM) 1498 } else if (is_single_fpu()) { 1499 out->print("s%d", fpu_regnr()); 1500 } else if (is_double_fpu()) { 1501 out->print("d%d", fpu_regnrLo() >> 1); 1502 #else 1503 } else if (is_single_fpu()) { 1504 out->print("%s", as_float_reg()->name()); 1505 } else if (is_double_fpu()) { 1506 out->print("%s", as_double_reg()->name()); 1507 #endif 1508 1509 } else if (is_illegal()) { 1510 out->print("-"); 1511 } else { 1512 out->print("Unknown Operand"); 1513 } 1514 if (!is_illegal()) { 1515 out->print("|%c", type_char()); 1516 } 1517 if (is_register() && is_last_use()) { 1518 out->print("(last_use)"); 1519 } 1520 out->print("]"); 1521 } 1522 1523 1524 // LIR_Address 1525 void LIR_Const::print_value_on(outputStream* out) const { 1526 switch (type()) { 1527 case T_ADDRESS:out->print("address:%d",as_jint()); break; 1528 case T_INT: out->print("int:%d", as_jint()); break; 1529 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break; 1530 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1531 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1532 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break; 1533 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break; 1534 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break; 1535 } 1536 } 1537 1538 // LIR_Address 1539 void LIR_Address::print_value_on(outputStream* out) const { 1540 out->print("Base:"); _base->print(out); 1541 if (!_index->is_illegal()) { 1542 out->print(" Index:"); _index->print(out); 1543 switch (scale()) { 1544 case times_1: break; 1545 case times_2: out->print(" * 2"); break; 1546 case times_4: out->print(" * 4"); break; 1547 case times_8: out->print(" * 8"); break; 1548 } 1549 } 1550 out->print(" Disp: " INTX_FORMAT, _disp); 1551 } 1552 1553 // debug output of block header without InstructionPrinter 1554 // (because phi functions are not necessary for LIR) 1555 static void print_block(BlockBegin* x) { 1556 // print block id 1557 BlockEnd* end = x->end(); 1558 tty->print("B%d ", x->block_id()); 1559 1560 // print flags 1561 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1562 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1563 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1564 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1565 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1566 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1567 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1568 1569 // print block bci range 1570 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); 1571 1572 // print predecessors and successors 1573 if (x->number_of_preds() > 0) { 1574 tty->print("preds: "); 1575 for (int i = 0; i < x->number_of_preds(); i ++) { 1576 tty->print("B%d ", x->pred_at(i)->block_id()); 1577 } 1578 } 1579 1580 if (x->number_of_sux() > 0) { 1581 tty->print("sux: "); 1582 for (int i = 0; i < x->number_of_sux(); i ++) { 1583 tty->print("B%d ", x->sux_at(i)->block_id()); 1584 } 1585 } 1586 1587 // print exception handlers 1588 if (x->number_of_exception_handlers() > 0) { 1589 tty->print("xhandler: "); 1590 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1591 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1592 } 1593 } 1594 1595 tty->cr(); 1596 } 1597 1598 void print_LIR(BlockList* blocks) { 1599 tty->print_cr("LIR:"); 1600 int i; 1601 for (i = 0; i < blocks->length(); i++) { 1602 BlockBegin* bb = blocks->at(i); 1603 print_block(bb); 1604 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1605 bb->lir()->print_instructions(); 1606 } 1607 } 1608 1609 void LIR_List::print_instructions() { 1610 for (int i = 0; i < _operations.length(); i++) { 1611 _operations.at(i)->print(); tty->cr(); 1612 } 1613 tty->cr(); 1614 } 1615 1616 // LIR_Ops printing routines 1617 // LIR_Op 1618 void LIR_Op::print_on(outputStream* out) const { 1619 if (id() != -1 || PrintCFGToFile) { 1620 out->print("%4d ", id()); 1621 } else { 1622 out->print(" "); 1623 } 1624 out->print("%s ", name()); 1625 print_instr(out); 1626 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); 1627 #ifdef ASSERT 1628 if (Verbose && _file != NULL) { 1629 out->print(" (%s:%d)", _file, _line); 1630 } 1631 #endif 1632 } 1633 1634 const char * LIR_Op::name() const { 1635 const char* s = NULL; 1636 switch(code()) { 1637 // LIR_Op0 1638 case lir_membar: s = "membar"; break; 1639 case lir_membar_acquire: s = "membar_acquire"; break; 1640 case lir_membar_release: s = "membar_release"; break; 1641 case lir_membar_loadload: s = "membar_loadload"; break; 1642 case lir_membar_storestore: s = "membar_storestore"; break; 1643 case lir_membar_loadstore: s = "membar_loadstore"; break; 1644 case lir_membar_storeload: s = "membar_storeload"; break; 1645 case lir_word_align: s = "word_align"; break; 1646 case lir_label: s = "label"; break; 1647 case lir_nop: s = "nop"; break; 1648 case lir_on_spin_wait: s = "on_spin_wait"; break; 1649 case lir_backwardbranch_target: s = "backbranch"; break; 1650 case lir_std_entry: s = "std_entry"; break; 1651 case lir_osr_entry: s = "osr_entry"; break; 1652 case lir_build_frame: s = "build_frm"; break; 1653 case lir_fpop_raw: s = "fpop_raw"; break; 1654 case lir_24bit_FPU: s = "24bit_FPU"; break; 1655 case lir_reset_FPU: s = "reset_FPU"; break; 1656 case lir_breakpoint: s = "breakpoint"; break; 1657 case lir_get_thread: s = "get_thread"; break; 1658 // LIR_Op1 1659 case lir_fxch: s = "fxch"; break; 1660 case lir_fld: s = "fld"; break; 1661 case lir_ffree: s = "ffree"; break; 1662 case lir_push: s = "push"; break; 1663 case lir_pop: s = "pop"; break; 1664 case lir_null_check: s = "null_check"; break; 1665 case lir_return: s = "return"; break; 1666 case lir_safepoint: s = "safepoint"; break; 1667 case lir_neg: s = "neg"; break; 1668 case lir_leal: s = "leal"; break; 1669 case lir_branch: s = "branch"; break; 1670 case lir_cond_float_branch: s = "flt_cond_br"; break; 1671 case lir_move: s = "move"; break; 1672 case lir_roundfp: s = "roundfp"; break; 1673 case lir_rtcall: s = "rtcall"; break; 1674 case lir_throw: s = "throw"; break; 1675 case lir_unwind: s = "unwind"; break; 1676 case lir_convert: s = "convert"; break; 1677 case lir_alloc_object: s = "alloc_obj"; break; 1678 case lir_monaddr: s = "mon_addr"; break; 1679 case lir_pack64: s = "pack64"; break; 1680 case lir_unpack64: s = "unpack64"; break; 1681 // LIR_Op2 1682 case lir_cmp: s = "cmp"; break; 1683 case lir_cmp_l2i: s = "cmp_l2i"; break; 1684 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1685 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1686 case lir_cmove: s = "cmove"; break; 1687 case lir_add: s = "add"; break; 1688 case lir_sub: s = "sub"; break; 1689 case lir_mul: s = "mul"; break; 1690 case lir_mul_strictfp: s = "mul_strictfp"; break; 1691 case lir_div: s = "div"; break; 1692 case lir_div_strictfp: s = "div_strictfp"; break; 1693 case lir_rem: s = "rem"; break; 1694 case lir_abs: s = "abs"; break; 1695 case lir_sqrt: s = "sqrt"; break; 1696 case lir_logic_and: s = "logic_and"; break; 1697 case lir_logic_or: s = "logic_or"; break; 1698 case lir_logic_xor: s = "logic_xor"; break; 1699 case lir_shl: s = "shift_left"; break; 1700 case lir_shr: s = "shift_right"; break; 1701 case lir_ushr: s = "ushift_right"; break; 1702 case lir_alloc_array: s = "alloc_array"; break; 1703 case lir_xadd: s = "xadd"; break; 1704 case lir_xchg: s = "xchg"; break; 1705 // LIR_Op3 1706 case lir_idiv: s = "idiv"; break; 1707 case lir_irem: s = "irem"; break; 1708 case lir_fmad: s = "fmad"; break; 1709 case lir_fmaf: s = "fmaf"; break; 1710 // LIR_OpJavaCall 1711 case lir_static_call: s = "static"; break; 1712 case lir_optvirtual_call: s = "optvirtual"; break; 1713 case lir_icvirtual_call: s = "icvirtual"; break; 1714 case lir_virtual_call: s = "virtual"; break; 1715 case lir_dynamic_call: s = "dynamic"; break; 1716 // LIR_OpArrayCopy 1717 case lir_arraycopy: s = "arraycopy"; break; 1718 // LIR_OpUpdateCRC32 1719 case lir_updatecrc32: s = "updatecrc32"; break; 1720 // LIR_OpLock 1721 case lir_lock: s = "lock"; break; 1722 case lir_unlock: s = "unlock"; break; 1723 // LIR_OpDelay 1724 case lir_delay_slot: s = "delay"; break; 1725 // LIR_OpTypeCheck 1726 case lir_instanceof: s = "instanceof"; break; 1727 case lir_checkcast: s = "checkcast"; break; 1728 case lir_store_check: s = "store_check"; break; 1729 // LIR_OpCompareAndSwap 1730 case lir_cas_long: s = "cas_long"; break; 1731 case lir_cas_obj: s = "cas_obj"; break; 1732 case lir_cas_int: s = "cas_int"; break; 1733 // LIR_OpProfileCall 1734 case lir_profile_call: s = "profile_call"; break; 1735 // LIR_OpProfileType 1736 case lir_profile_type: s = "profile_type"; break; 1737 // LIR_OpAssert 1738 #ifdef ASSERT 1739 case lir_assert: s = "assert"; break; 1740 #endif 1741 case lir_none: ShouldNotReachHere();break; 1742 default: s = "illegal_op"; break; 1743 } 1744 return s; 1745 } 1746 1747 // LIR_OpJavaCall 1748 void LIR_OpJavaCall::print_instr(outputStream* out) const { 1749 out->print("call: "); 1750 out->print("[addr: " INTPTR_FORMAT "]", p2i(address())); 1751 if (receiver()->is_valid()) { 1752 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1753 } 1754 if (result_opr()->is_valid()) { 1755 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1756 } 1757 } 1758 1759 // LIR_OpLabel 1760 void LIR_OpLabel::print_instr(outputStream* out) const { 1761 out->print("[label:" INTPTR_FORMAT "]", p2i(_label)); 1762 } 1763 1764 // LIR_OpArrayCopy 1765 void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1766 src()->print(out); out->print(" "); 1767 src_pos()->print(out); out->print(" "); 1768 dst()->print(out); out->print(" "); 1769 dst_pos()->print(out); out->print(" "); 1770 length()->print(out); out->print(" "); 1771 tmp()->print(out); out->print(" "); 1772 } 1773 1774 // LIR_OpUpdateCRC32 1775 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { 1776 crc()->print(out); out->print(" "); 1777 val()->print(out); out->print(" "); 1778 result_opr()->print(out); out->print(" "); 1779 } 1780 1781 // LIR_OpCompareAndSwap 1782 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1783 addr()->print(out); out->print(" "); 1784 cmp_value()->print(out); out->print(" "); 1785 new_value()->print(out); out->print(" "); 1786 tmp1()->print(out); out->print(" "); 1787 tmp2()->print(out); out->print(" "); 1788 1789 } 1790 1791 // LIR_Op0 1792 void LIR_Op0::print_instr(outputStream* out) const { 1793 result_opr()->print(out); 1794 } 1795 1796 // LIR_Op1 1797 const char * LIR_Op1::name() const { 1798 if (code() == lir_move) { 1799 switch (move_kind()) { 1800 case lir_move_normal: 1801 return "move"; 1802 case lir_move_unaligned: 1803 return "unaligned move"; 1804 case lir_move_volatile: 1805 return "volatile_move"; 1806 case lir_move_wide: 1807 return "wide_move"; 1808 default: 1809 ShouldNotReachHere(); 1810 return "illegal_op"; 1811 } 1812 } else { 1813 return LIR_Op::name(); 1814 } 1815 } 1816 1817 1818 void LIR_Op1::print_instr(outputStream* out) const { 1819 _opr->print(out); out->print(" "); 1820 result_opr()->print(out); out->print(" "); 1821 print_patch_code(out, patch_code()); 1822 } 1823 1824 1825 // LIR_Op1 1826 void LIR_OpRTCall::print_instr(outputStream* out) const { 1827 intx a = (intx)addr(); 1828 out->print("%s", Runtime1::name_for_address(addr())); 1829 out->print(" "); 1830 tmp()->print(out); 1831 } 1832 1833 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1834 switch(code) { 1835 case lir_patch_none: break; 1836 case lir_patch_low: out->print("[patch_low]"); break; 1837 case lir_patch_high: out->print("[patch_high]"); break; 1838 case lir_patch_normal: out->print("[patch_normal]"); break; 1839 default: ShouldNotReachHere(); 1840 } 1841 } 1842 1843 // LIR_OpBranch 1844 void LIR_OpBranch::print_instr(outputStream* out) const { 1845 print_condition(out, cond()); out->print(" "); 1846 if (block() != NULL) { 1847 out->print("[B%d] ", block()->block_id()); 1848 } else if (stub() != NULL) { 1849 out->print("["); 1850 stub()->print_name(out); 1851 out->print(": " INTPTR_FORMAT "]", p2i(stub())); 1852 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); 1853 } else { 1854 out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); 1855 } 1856 if (ublock() != NULL) { 1857 out->print("unordered: [B%d] ", ublock()->block_id()); 1858 } 1859 } 1860 1861 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1862 switch(cond) { 1863 case lir_cond_equal: out->print("[EQ]"); break; 1864 case lir_cond_notEqual: out->print("[NE]"); break; 1865 case lir_cond_less: out->print("[LT]"); break; 1866 case lir_cond_lessEqual: out->print("[LE]"); break; 1867 case lir_cond_greaterEqual: out->print("[GE]"); break; 1868 case lir_cond_greater: out->print("[GT]"); break; 1869 case lir_cond_belowEqual: out->print("[BE]"); break; 1870 case lir_cond_aboveEqual: out->print("[AE]"); break; 1871 case lir_cond_always: out->print("[AL]"); break; 1872 default: out->print("[%d]",cond); break; 1873 } 1874 } 1875 1876 // LIR_OpConvert 1877 void LIR_OpConvert::print_instr(outputStream* out) const { 1878 print_bytecode(out, bytecode()); 1879 in_opr()->print(out); out->print(" "); 1880 result_opr()->print(out); out->print(" "); 1881 #ifdef PPC32 1882 if(tmp1()->is_valid()) { 1883 tmp1()->print(out); out->print(" "); 1884 tmp2()->print(out); out->print(" "); 1885 } 1886 #endif 1887 } 1888 1889 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1890 switch(code) { 1891 case Bytecodes::_d2f: out->print("[d2f] "); break; 1892 case Bytecodes::_d2i: out->print("[d2i] "); break; 1893 case Bytecodes::_d2l: out->print("[d2l] "); break; 1894 case Bytecodes::_f2d: out->print("[f2d] "); break; 1895 case Bytecodes::_f2i: out->print("[f2i] "); break; 1896 case Bytecodes::_f2l: out->print("[f2l] "); break; 1897 case Bytecodes::_i2b: out->print("[i2b] "); break; 1898 case Bytecodes::_i2c: out->print("[i2c] "); break; 1899 case Bytecodes::_i2d: out->print("[i2d] "); break; 1900 case Bytecodes::_i2f: out->print("[i2f] "); break; 1901 case Bytecodes::_i2l: out->print("[i2l] "); break; 1902 case Bytecodes::_i2s: out->print("[i2s] "); break; 1903 case Bytecodes::_l2i: out->print("[l2i] "); break; 1904 case Bytecodes::_l2f: out->print("[l2f] "); break; 1905 case Bytecodes::_l2d: out->print("[l2d] "); break; 1906 default: 1907 out->print("[?%d]",code); 1908 break; 1909 } 1910 } 1911 1912 void LIR_OpAllocObj::print_instr(outputStream* out) const { 1913 klass()->print(out); out->print(" "); 1914 obj()->print(out); out->print(" "); 1915 tmp1()->print(out); out->print(" "); 1916 tmp2()->print(out); out->print(" "); 1917 tmp3()->print(out); out->print(" "); 1918 tmp4()->print(out); out->print(" "); 1919 out->print("[hdr:%d]", header_size()); out->print(" "); 1920 out->print("[obj:%d]", object_size()); out->print(" "); 1921 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1922 } 1923 1924 void LIR_OpRoundFP::print_instr(outputStream* out) const { 1925 _opr->print(out); out->print(" "); 1926 tmp()->print(out); out->print(" "); 1927 result_opr()->print(out); out->print(" "); 1928 } 1929 1930 // LIR_Op2 1931 void LIR_Op2::print_instr(outputStream* out) const { 1932 if (code() == lir_cmove || code() == lir_cmp) { 1933 print_condition(out, condition()); out->print(" "); 1934 } 1935 in_opr1()->print(out); out->print(" "); 1936 in_opr2()->print(out); out->print(" "); 1937 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } 1938 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } 1939 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } 1940 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } 1941 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } 1942 result_opr()->print(out); 1943 } 1944 1945 void LIR_OpAllocArray::print_instr(outputStream* out) const { 1946 klass()->print(out); out->print(" "); 1947 len()->print(out); out->print(" "); 1948 obj()->print(out); out->print(" "); 1949 tmp1()->print(out); out->print(" "); 1950 tmp2()->print(out); out->print(" "); 1951 tmp3()->print(out); out->print(" "); 1952 tmp4()->print(out); out->print(" "); 1953 out->print("[type:0x%x]", type()); out->print(" "); 1954 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1955 } 1956 1957 1958 void LIR_OpTypeCheck::print_instr(outputStream* out) const { 1959 object()->print(out); out->print(" "); 1960 if (code() == lir_store_check) { 1961 array()->print(out); out->print(" "); 1962 } 1963 if (code() != lir_store_check) { 1964 klass()->print_name_on(out); out->print(" "); 1965 if (fast_check()) out->print("fast_check "); 1966 } 1967 tmp1()->print(out); out->print(" "); 1968 tmp2()->print(out); out->print(" "); 1969 tmp3()->print(out); out->print(" "); 1970 result_opr()->print(out); out->print(" "); 1971 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 1972 } 1973 1974 1975 // LIR_Op3 1976 void LIR_Op3::print_instr(outputStream* out) const { 1977 in_opr1()->print(out); out->print(" "); 1978 in_opr2()->print(out); out->print(" "); 1979 in_opr3()->print(out); out->print(" "); 1980 result_opr()->print(out); 1981 } 1982 1983 1984 void LIR_OpLock::print_instr(outputStream* out) const { 1985 hdr_opr()->print(out); out->print(" "); 1986 obj_opr()->print(out); out->print(" "); 1987 lock_opr()->print(out); out->print(" "); 1988 if (_scratch->is_valid()) { 1989 _scratch->print(out); out->print(" "); 1990 } 1991 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1992 } 1993 1994 #ifdef ASSERT 1995 void LIR_OpAssert::print_instr(outputStream* out) const { 1996 print_condition(out, condition()); out->print(" "); 1997 in_opr1()->print(out); out->print(" "); 1998 in_opr2()->print(out); out->print(", \""); 1999 out->print("%s", msg()); out->print("\""); 2000 } 2001 #endif 2002 2003 2004 void LIR_OpDelay::print_instr(outputStream* out) const { 2005 _op->print_on(out); 2006 } 2007 2008 2009 // LIR_OpProfileCall 2010 void LIR_OpProfileCall::print_instr(outputStream* out) const { 2011 profiled_method()->name()->print_symbol_on(out); 2012 out->print("."); 2013 profiled_method()->holder()->name()->print_symbol_on(out); 2014 out->print(" @ %d ", profiled_bci()); 2015 mdo()->print(out); out->print(" "); 2016 recv()->print(out); out->print(" "); 2017 tmp1()->print(out); out->print(" "); 2018 } 2019 2020 // LIR_OpProfileType 2021 void LIR_OpProfileType::print_instr(outputStream* out) const { 2022 out->print("exact = "); 2023 if (exact_klass() == NULL) { 2024 out->print("unknown"); 2025 } else { 2026 exact_klass()->print_name_on(out); 2027 } 2028 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass()); 2029 out->print(" "); 2030 mdp()->print(out); out->print(" "); 2031 obj()->print(out); out->print(" "); 2032 tmp()->print(out); out->print(" "); 2033 } 2034 2035 #endif // PRODUCT 2036 2037 // Implementation of LIR_InsertionBuffer 2038 2039 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 2040 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 2041 2042 int i = number_of_insertion_points() - 1; 2043 if (i < 0 || index_at(i) < index) { 2044 append_new(index, 1); 2045 } else { 2046 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 2047 assert(count_at(i) > 0, "check"); 2048 set_count_at(i, count_at(i) + 1); 2049 } 2050 _ops.push(op); 2051 2052 DEBUG_ONLY(verify()); 2053 } 2054 2055 #ifdef ASSERT 2056 void LIR_InsertionBuffer::verify() { 2057 int sum = 0; 2058 int prev_idx = -1; 2059 2060 for (int i = 0; i < number_of_insertion_points(); i++) { 2061 assert(prev_idx < index_at(i), "index must be ordered ascending"); 2062 sum += count_at(i); 2063 } 2064 assert(sum == number_of_ops(), "wrong total sum"); 2065 } 2066 #endif