src/cpu/x86/vm/x86.ad

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rev 9706 : 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
Contributed-by: ikrylov, ygaevsky
Reviewed-by: iveresov, vlivanov


1694     case Op_MulReductionVF:
1695     case Op_MulReductionVD:
1696       if (UseSSE < 1) // requires at least SSE
1697         ret_value = false;
1698       break;
1699     case Op_SqrtVD:
1700       if (UseAVX < 1) // enabled for AVX only
1701         ret_value = false;
1702       break;
1703     case Op_CompareAndSwapL:
1704 #ifdef _LP64
1705     case Op_CompareAndSwapP:
1706 #endif
1707       if (!VM_Version::supports_cx8())
1708         ret_value = false;
1709       break;
1710     case Op_CMoveVD:
1711       if (UseAVX < 1 || UseAVX > 2)
1712         ret_value = false;
1713       break;




1714   }
1715 
1716   return ret_value;  // Per default match rules are supported.
1717 }
1718 
1719 const bool Matcher::match_rule_supported_vector(int opcode, int vlen) {
1720   // identify extra cases that we might want to provide match rules for
1721   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
1722   bool ret_value = match_rule_supported(opcode);
1723   if (ret_value) {
1724     switch (opcode) {
1725       case Op_AddVB:
1726       case Op_SubVB:
1727         if ((vlen == 64) && (VM_Version::supports_avx512bw() == false))
1728           ret_value = false;
1729         break;
1730       case Op_URShiftVS:
1731       case Op_RShiftVS:
1732       case Op_LShiftVS:
1733       case Op_MulVS:




1694     case Op_MulReductionVF:
1695     case Op_MulReductionVD:
1696       if (UseSSE < 1) // requires at least SSE
1697         ret_value = false;
1698       break;
1699     case Op_SqrtVD:
1700       if (UseAVX < 1) // enabled for AVX only
1701         ret_value = false;
1702       break;
1703     case Op_CompareAndSwapL:
1704 #ifdef _LP64
1705     case Op_CompareAndSwapP:
1706 #endif
1707       if (!VM_Version::supports_cx8())
1708         ret_value = false;
1709       break;
1710     case Op_CMoveVD:
1711       if (UseAVX < 1 || UseAVX > 2)
1712         ret_value = false;
1713       break;
1714     case Op_OnSpinWait:
1715       if (UseSSE < 2) // requires at least SSE4
1716         ret_value = false;
1717       break;
1718   }
1719 
1720   return ret_value;  // Per default match rules are supported.
1721 }
1722 
1723 const bool Matcher::match_rule_supported_vector(int opcode, int vlen) {
1724   // identify extra cases that we might want to provide match rules for
1725   // e.g. Op_ vector nodes and other intrinsics while guarding with vlen
1726   bool ret_value = match_rule_supported(opcode);
1727   if (ret_value) {
1728     switch (opcode) {
1729       case Op_AddVB:
1730       case Op_SubVB:
1731         if ((vlen == 64) && (VM_Version::supports_avx512bw() == false))
1732           ret_value = false;
1733         break;
1734       case Op_URShiftVS:
1735       case Op_RShiftVS:
1736       case Op_LShiftVS:
1737       case Op_MulVS: