src/cpu/x86/vm/c1_LIRAssembler_x86.cpp

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rev 10065 : 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
Summary: adds c1 & c2 x86 intrinsics for j.l.Runtime.onSpinWait() that utilize the 'pause' instruction
Contributed-by: ikrylov, ygaevsky
Reviewed-by: iveresov, vlivanov, kvn


3869 
3870 void LIR_Assembler::membar_loadload() {
3871   // no-op
3872   //__ membar(Assembler::Membar_mask_bits(Assembler::loadload));
3873 }
3874 
3875 void LIR_Assembler::membar_storestore() {
3876   // no-op
3877   //__ membar(Assembler::Membar_mask_bits(Assembler::storestore));
3878 }
3879 
3880 void LIR_Assembler::membar_loadstore() {
3881   // no-op
3882   //__ membar(Assembler::Membar_mask_bits(Assembler::loadstore));
3883 }
3884 
3885 void LIR_Assembler::membar_storeload() {
3886   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
3887 }
3888 




3889 void LIR_Assembler::get_thread(LIR_Opr result_reg) {
3890   assert(result_reg->is_register(), "check");
3891 #ifdef _LP64
3892   // __ get_thread(result_reg->as_register_lo());
3893   __ mov(result_reg->as_register(), r15_thread);
3894 #else
3895   __ get_thread(result_reg->as_register());
3896 #endif // _LP64
3897 }
3898 
3899 
3900 void LIR_Assembler::peephole(LIR_List*) {
3901   // do nothing for now
3902 }
3903 
3904 void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp) {
3905   assert(data == dest, "xchg/xadd uses only 2 operands");
3906 
3907   if (data->type() == T_INT) {
3908     if (code == lir_xadd) {




3869 
3870 void LIR_Assembler::membar_loadload() {
3871   // no-op
3872   //__ membar(Assembler::Membar_mask_bits(Assembler::loadload));
3873 }
3874 
3875 void LIR_Assembler::membar_storestore() {
3876   // no-op
3877   //__ membar(Assembler::Membar_mask_bits(Assembler::storestore));
3878 }
3879 
3880 void LIR_Assembler::membar_loadstore() {
3881   // no-op
3882   //__ membar(Assembler::Membar_mask_bits(Assembler::loadstore));
3883 }
3884 
3885 void LIR_Assembler::membar_storeload() {
3886   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
3887 }
3888 
3889 void LIR_Assembler::on_spin_wait() {
3890   __ pause ();
3891 }
3892 
3893 void LIR_Assembler::get_thread(LIR_Opr result_reg) {
3894   assert(result_reg->is_register(), "check");
3895 #ifdef _LP64
3896   // __ get_thread(result_reg->as_register_lo());
3897   __ mov(result_reg->as_register(), r15_thread);
3898 #else
3899   __ get_thread(result_reg->as_register());
3900 #endif // _LP64
3901 }
3902 
3903 
3904 void LIR_Assembler::peephole(LIR_List*) {
3905   // do nothing for now
3906 }
3907 
3908 void LIR_Assembler::atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp) {
3909   assert(data == dest, "xchg/xadd uses only 2 operands");
3910 
3911   if (data->type() == T_INT) {
3912     if (code == lir_xadd) {