src/share/vm/c1/c1_LIRAssembler.hpp

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rev 10065 : 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
Summary: adds c1 & c2 x86 intrinsics for j.l.Runtime.onSpinWait() that utilize the 'pause' instruction
Contributed-by: ikrylov, ygaevsky
Reviewed-by: iveresov, vlivanov, kvn


 234 
 235   void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
 236   void unwind_op(LIR_Opr exceptionOop);
 237   void monitor_address(int monitor_ix, LIR_Opr dst);
 238 
 239   void align_backward_branch_target();
 240   void align_call(LIR_Code code);
 241 
 242   void negate(LIR_Opr left, LIR_Opr dest);
 243   void leal(LIR_Opr left, LIR_Opr dest);
 244 
 245   void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
 246 
 247   void membar();
 248   void membar_acquire();
 249   void membar_release();
 250   void membar_loadload();
 251   void membar_storestore();
 252   void membar_loadstore();
 253   void membar_storeload();

 254   void get_thread(LIR_Opr result);
 255 
 256   void verify_oop_map(CodeEmitInfo* info);
 257 
 258   void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
 259 
 260 #ifdef TARGET_ARCH_x86
 261 # include "c1_LIRAssembler_x86.hpp"
 262 #endif
 263 #ifdef TARGET_ARCH_sparc
 264 # include "c1_LIRAssembler_sparc.hpp"
 265 #endif
 266 #ifdef TARGET_ARCH_arm
 267 # include "c1_LIRAssembler_arm.hpp"
 268 #endif
 269 #ifdef TARGET_ARCH_ppc
 270 # include "c1_LIRAssembler_ppc.hpp"
 271 #endif
 272 #ifdef TARGET_ARCH_aarch64
 273 # include "c1_LIRAssembler_aarch64.hpp"


 234 
 235   void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
 236   void unwind_op(LIR_Opr exceptionOop);
 237   void monitor_address(int monitor_ix, LIR_Opr dst);
 238 
 239   void align_backward_branch_target();
 240   void align_call(LIR_Code code);
 241 
 242   void negate(LIR_Opr left, LIR_Opr dest);
 243   void leal(LIR_Opr left, LIR_Opr dest);
 244 
 245   void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
 246 
 247   void membar();
 248   void membar_acquire();
 249   void membar_release();
 250   void membar_loadload();
 251   void membar_storestore();
 252   void membar_loadstore();
 253   void membar_storeload();
 254   void on_spin_wait();
 255   void get_thread(LIR_Opr result);
 256 
 257   void verify_oop_map(CodeEmitInfo* info);
 258 
 259   void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
 260 
 261 #ifdef TARGET_ARCH_x86
 262 # include "c1_LIRAssembler_x86.hpp"
 263 #endif
 264 #ifdef TARGET_ARCH_sparc
 265 # include "c1_LIRAssembler_sparc.hpp"
 266 #endif
 267 #ifdef TARGET_ARCH_arm
 268 # include "c1_LIRAssembler_arm.hpp"
 269 #endif
 270 #ifdef TARGET_ARCH_ppc
 271 # include "c1_LIRAssembler_ppc.hpp"
 272 #endif
 273 #ifdef TARGET_ARCH_aarch64
 274 # include "c1_LIRAssembler_aarch64.hpp"