src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp

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rev 10271 : 8147844: new method j.l.Runtime.onSpinWait() and the corresponding x86 hotspot instrinsic
Summary: adds c1 & c2 x86 intrinsics for j.l.Runtime.onSpinWait() that utilize the PAUSE instruction
Reviewed-by: iveresov, kvn, vlivanov
Contributed-by: Ivan Krylov <ivan@azul.com>, Yuri Gaevsky <ygaevsky@azul.com>


2828 void LIR_Assembler::membar_release() {
2829   __ release();
2830 }
2831 
2832 void LIR_Assembler::membar_loadload() {
2833   __ membar(Assembler::LoadLoad);
2834 }
2835 
2836 void LIR_Assembler::membar_storestore() {
2837   __ membar(Assembler::StoreStore);
2838 }
2839 
2840 void LIR_Assembler::membar_loadstore() {
2841   __ membar(Assembler::LoadStore);
2842 }
2843 
2844 void LIR_Assembler::membar_storeload() {
2845   __ membar(Assembler::StoreLoad);
2846 }
2847 



2848 
2849 void LIR_Assembler::leal(LIR_Opr addr_opr, LIR_Opr dest) {
2850   LIR_Address* addr = addr_opr->as_address_ptr();
2851   assert(addr->scale() == LIR_Address::times_1, "no scaling on this platform");
2852   if (addr->index()->is_illegal()) {
2853     __ add_const_optimized(dest->as_pointer_register(), addr->base()->as_pointer_register(), addr->disp());
2854   } else {
2855     assert(addr->disp() == 0, "can't have both: index and disp");
2856     __ add(dest->as_pointer_register(), addr->index()->as_pointer_register(), addr->base()->as_pointer_register());
2857   }
2858 }
2859 
2860 
2861 void LIR_Assembler::get_thread(LIR_Opr result_reg) {
2862   ShouldNotReachHere();
2863 }
2864 
2865 
2866 #ifdef ASSERT
2867 // Emit run-time assertion.




2828 void LIR_Assembler::membar_release() {
2829   __ release();
2830 }
2831 
2832 void LIR_Assembler::membar_loadload() {
2833   __ membar(Assembler::LoadLoad);
2834 }
2835 
2836 void LIR_Assembler::membar_storestore() {
2837   __ membar(Assembler::StoreStore);
2838 }
2839 
2840 void LIR_Assembler::membar_loadstore() {
2841   __ membar(Assembler::LoadStore);
2842 }
2843 
2844 void LIR_Assembler::membar_storeload() {
2845   __ membar(Assembler::StoreLoad);
2846 }
2847 
2848 void LIR_Assembler::on_spin_wait() {
2849   Unimplemented();
2850 }
2851 
2852 void LIR_Assembler::leal(LIR_Opr addr_opr, LIR_Opr dest) {
2853   LIR_Address* addr = addr_opr->as_address_ptr();
2854   assert(addr->scale() == LIR_Address::times_1, "no scaling on this platform");
2855   if (addr->index()->is_illegal()) {
2856     __ add_const_optimized(dest->as_pointer_register(), addr->base()->as_pointer_register(), addr->disp());
2857   } else {
2858     assert(addr->disp() == 0, "can't have both: index and disp");
2859     __ add(dest->as_pointer_register(), addr->index()->as_pointer_register(), addr->base()->as_pointer_register());
2860   }
2861 }
2862 
2863 
2864 void LIR_Assembler::get_thread(LIR_Opr result_reg) {
2865   ShouldNotReachHere();
2866 }
2867 
2868 
2869 #ifdef ASSERT
2870 // Emit run-time assertion.