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--- old/src/cpu/x86/vm/stubGenerator_x86_64.cpp
+++ new/src/cpu/x86/vm/stubGenerator_x86_64.cpp
1 1 /*
2 2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
3 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 4 *
5 5 * This code is free software; you can redistribute it and/or modify it
6 6 * under the terms of the GNU General Public License version 2 only, as
7 7 * published by the Free Software Foundation.
8 8 *
9 9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 12 * version 2 for more details (a copy is included in the LICENSE file that
13 13 * accompanied this code).
14 14 *
15 15 * You should have received a copy of the GNU General Public License version
16 16 * 2 along with this work; if not, write to the Free Software Foundation,
17 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 18 *
19 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 20 * or visit www.oracle.com if you need additional information or have any
21 21 * questions.
22 22 *
23 23 */
24 24
25 25 #include "precompiled.hpp"
26 26 #include "asm/assembler.hpp"
27 27 #include "assembler_x86.inline.hpp"
28 28 #include "interpreter/interpreter.hpp"
29 29 #include "nativeInst_x86.hpp"
30 30 #include "oops/instanceOop.hpp"
31 31 #include "oops/methodOop.hpp"
32 32 #include "oops/objArrayKlass.hpp"
33 33 #include "oops/oop.inline.hpp"
34 34 #include "prims/methodHandles.hpp"
35 35 #include "runtime/frame.inline.hpp"
36 36 #include "runtime/handles.inline.hpp"
37 37 #include "runtime/sharedRuntime.hpp"
38 38 #include "runtime/stubCodeGenerator.hpp"
39 39 #include "runtime/stubRoutines.hpp"
40 40 #include "utilities/top.hpp"
41 41 #ifdef TARGET_OS_FAMILY_linux
42 42 # include "thread_linux.inline.hpp"
43 43 #endif
44 44 #ifdef TARGET_OS_FAMILY_solaris
45 45 # include "thread_solaris.inline.hpp"
46 46 #endif
47 47 #ifdef TARGET_OS_FAMILY_windows
48 48 # include "thread_windows.inline.hpp"
49 49 #endif
50 50 #ifdef COMPILER2
51 51 #include "opto/runtime.hpp"
52 52 #endif
53 53
54 54 // Declaration and definition of StubGenerator (no .hpp file).
55 55 // For a more detailed description of the stub routine structure
56 56 // see the comment in stubRoutines.hpp
57 57
58 58 #define __ _masm->
59 59 #define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
60 60 #define a__ ((Assembler*)_masm)->
61 61
62 62 #ifdef PRODUCT
63 63 #define BLOCK_COMMENT(str) /* nothing */
64 64 #else
65 65 #define BLOCK_COMMENT(str) __ block_comment(str)
66 66 #endif
67 67
68 68 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
69 69 const int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
70 70
71 71 // Stub Code definitions
72 72
73 73 static address handle_unsafe_access() {
74 74 JavaThread* thread = JavaThread::current();
75 75 address pc = thread->saved_exception_pc();
76 76 // pc is the instruction which we must emulate
77 77 // doing a no-op is fine: return garbage from the load
78 78 // therefore, compute npc
79 79 address npc = Assembler::locate_next_instruction(pc);
80 80
81 81 // request an async exception
82 82 thread->set_pending_unsafe_access_error();
83 83
84 84 // return address of next instruction to execute
85 85 return npc;
86 86 }
87 87
88 88 class StubGenerator: public StubCodeGenerator {
89 89 private:
90 90
91 91 #ifdef PRODUCT
92 92 #define inc_counter_np(counter) (0)
93 93 #else
94 94 void inc_counter_np_(int& counter) {
95 95 __ incrementl(ExternalAddress((address)&counter));
96 96 }
97 97 #define inc_counter_np(counter) \
98 98 BLOCK_COMMENT("inc_counter " #counter); \
99 99 inc_counter_np_(counter);
100 100 #endif
101 101
102 102 // Call stubs are used to call Java from C
103 103 //
104 104 // Linux Arguments:
105 105 // c_rarg0: call wrapper address address
106 106 // c_rarg1: result address
107 107 // c_rarg2: result type BasicType
108 108 // c_rarg3: method methodOop
109 109 // c_rarg4: (interpreter) entry point address
110 110 // c_rarg5: parameters intptr_t*
111 111 // 16(rbp): parameter size (in words) int
112 112 // 24(rbp): thread Thread*
113 113 //
114 114 // [ return_from_Java ] <--- rsp
115 115 // [ argument word n ]
116 116 // ...
117 117 // -12 [ argument word 1 ]
118 118 // -11 [ saved r15 ] <--- rsp_after_call
119 119 // -10 [ saved r14 ]
120 120 // -9 [ saved r13 ]
121 121 // -8 [ saved r12 ]
122 122 // -7 [ saved rbx ]
123 123 // -6 [ call wrapper ]
124 124 // -5 [ result ]
125 125 // -4 [ result type ]
126 126 // -3 [ method ]
127 127 // -2 [ entry point ]
128 128 // -1 [ parameters ]
129 129 // 0 [ saved rbp ] <--- rbp
130 130 // 1 [ return address ]
131 131 // 2 [ parameter size ]
132 132 // 3 [ thread ]
133 133 //
134 134 // Windows Arguments:
135 135 // c_rarg0: call wrapper address address
136 136 // c_rarg1: result address
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137 137 // c_rarg2: result type BasicType
138 138 // c_rarg3: method methodOop
139 139 // 48(rbp): (interpreter) entry point address
140 140 // 56(rbp): parameters intptr_t*
141 141 // 64(rbp): parameter size (in words) int
142 142 // 72(rbp): thread Thread*
143 143 //
144 144 // [ return_from_Java ] <--- rsp
145 145 // [ argument word n ]
146 146 // ...
147 - // -8 [ argument word 1 ]
148 - // -7 [ saved r15 ] <--- rsp_after_call
147 + // -28 [ argument word 1 ]
148 + // -27 [ saved xmm15 ] <--- rsp_after_call
149 + // [ saved xmm7-xmm14 ]
150 + // -9 [ saved xmm6 ] (each xmm register takes 2 slots)
151 + // -7 [ saved r15 ]
149 152 // -6 [ saved r14 ]
150 153 // -5 [ saved r13 ]
151 154 // -4 [ saved r12 ]
152 155 // -3 [ saved rdi ]
153 156 // -2 [ saved rsi ]
154 157 // -1 [ saved rbx ]
155 158 // 0 [ saved rbp ] <--- rbp
156 159 // 1 [ return address ]
157 160 // 2 [ call wrapper ]
158 161 // 3 [ result ]
159 162 // 4 [ result type ]
160 163 // 5 [ method ]
161 164 // 6 [ entry point ]
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162 165 // 7 [ parameters ]
163 166 // 8 [ parameter size ]
164 167 // 9 [ thread ]
165 168 //
166 169 // Windows reserves the callers stack space for arguments 1-4.
167 170 // We spill c_rarg0-c_rarg3 to this space.
168 171
169 172 // Call stub stack layout word offsets from rbp
170 173 enum call_stub_layout {
171 174 #ifdef _WIN64
172 - rsp_after_call_off = -7,
173 - r15_off = rsp_after_call_off,
175 + xmm_save_first = 6, // save from xmm6
176 + xmm_save_last = 15, // to xmm15
177 + xmm_save_base = -9,
178 + rsp_after_call_off = xmm_save_base - 2 * (xmm_save_last - xmm_save_first), // -27
179 + r15_off = -7,
174 180 r14_off = -6,
175 181 r13_off = -5,
176 182 r12_off = -4,
177 183 rdi_off = -3,
178 184 rsi_off = -2,
179 185 rbx_off = -1,
180 186 rbp_off = 0,
181 187 retaddr_off = 1,
182 188 call_wrapper_off = 2,
183 189 result_off = 3,
184 190 result_type_off = 4,
185 191 method_off = 5,
186 192 entry_point_off = 6,
187 193 parameters_off = 7,
188 194 parameter_size_off = 8,
189 195 thread_off = 9
190 196 #else
191 197 rsp_after_call_off = -12,
192 198 mxcsr_off = rsp_after_call_off,
193 199 r15_off = -11,
194 200 r14_off = -10,
195 201 r13_off = -9,
196 202 r12_off = -8,
197 203 rbx_off = -7,
198 204 call_wrapper_off = -6,
199 205 result_off = -5,
200 206 result_type_off = -4,
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201 207 method_off = -3,
202 208 entry_point_off = -2,
203 209 parameters_off = -1,
204 210 rbp_off = 0,
205 211 retaddr_off = 1,
206 212 parameter_size_off = 2,
207 213 thread_off = 3
208 214 #endif
209 215 };
210 216
217 +#ifdef _WIN64
218 + Address xmm_save(int reg) {
219 + assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
220 + return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
221 + }
222 +#endif
223 +
211 224 address generate_call_stub(address& return_address) {
212 225 assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
213 226 (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
214 227 "adjust this code");
215 228 StubCodeMark mark(this, "StubRoutines", "call_stub");
216 229 address start = __ pc();
217 230
218 231 // same as in generate_catch_exception()!
219 232 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
220 233
221 234 const Address call_wrapper (rbp, call_wrapper_off * wordSize);
222 235 const Address result (rbp, result_off * wordSize);
223 236 const Address result_type (rbp, result_type_off * wordSize);
224 237 const Address method (rbp, method_off * wordSize);
225 238 const Address entry_point (rbp, entry_point_off * wordSize);
226 239 const Address parameters (rbp, parameters_off * wordSize);
227 240 const Address parameter_size(rbp, parameter_size_off * wordSize);
228 241
229 242 // same as in generate_catch_exception()!
230 243 const Address thread (rbp, thread_off * wordSize);
231 244
232 245 const Address r15_save(rbp, r15_off * wordSize);
233 246 const Address r14_save(rbp, r14_off * wordSize);
234 247 const Address r13_save(rbp, r13_off * wordSize);
235 248 const Address r12_save(rbp, r12_off * wordSize);
236 249 const Address rbx_save(rbp, rbx_off * wordSize);
237 250
238 251 // stub code
239 252 __ enter();
240 253 __ subptr(rsp, -rsp_after_call_off * wordSize);
241 254
242 255 // save register parameters
243 256 #ifndef _WIN64
244 257 __ movptr(parameters, c_rarg5); // parameters
245 258 __ movptr(entry_point, c_rarg4); // entry_point
246 259 #endif
247 260
248 261 __ movptr(method, c_rarg3); // method
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249 262 __ movl(result_type, c_rarg2); // result type
250 263 __ movptr(result, c_rarg1); // result
251 264 __ movptr(call_wrapper, c_rarg0); // call wrapper
252 265
253 266 // save regs belonging to calling function
254 267 __ movptr(rbx_save, rbx);
255 268 __ movptr(r12_save, r12);
256 269 __ movptr(r13_save, r13);
257 270 __ movptr(r14_save, r14);
258 271 __ movptr(r15_save, r15);
259 -
260 272 #ifdef _WIN64
273 + for (int i = 6; i <= 15; i++) {
274 + __ movdqu(xmm_save(i), as_XMMRegister(i));
275 + }
276 +
261 277 const Address rdi_save(rbp, rdi_off * wordSize);
262 278 const Address rsi_save(rbp, rsi_off * wordSize);
263 279
264 280 __ movptr(rsi_save, rsi);
265 281 __ movptr(rdi_save, rdi);
266 282 #else
267 283 const Address mxcsr_save(rbp, mxcsr_off * wordSize);
268 284 {
269 285 Label skip_ldmx;
270 286 __ stmxcsr(mxcsr_save);
271 287 __ movl(rax, mxcsr_save);
272 288 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
273 289 ExternalAddress mxcsr_std(StubRoutines::x86::mxcsr_std());
274 290 __ cmp32(rax, mxcsr_std);
275 291 __ jcc(Assembler::equal, skip_ldmx);
276 292 __ ldmxcsr(mxcsr_std);
277 293 __ bind(skip_ldmx);
278 294 }
279 295 #endif
280 296
281 297 // Load up thread register
282 298 __ movptr(r15_thread, thread);
283 299 __ reinit_heapbase();
284 300
285 301 #ifdef ASSERT
286 302 // make sure we have no pending exceptions
287 303 {
288 304 Label L;
289 305 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
290 306 __ jcc(Assembler::equal, L);
291 307 __ stop("StubRoutines::call_stub: entered with pending exception");
292 308 __ bind(L);
293 309 }
294 310 #endif
295 311
296 312 // pass parameters if any
297 313 BLOCK_COMMENT("pass parameters if any");
298 314 Label parameters_done;
299 315 __ movl(c_rarg3, parameter_size);
300 316 __ testl(c_rarg3, c_rarg3);
301 317 __ jcc(Assembler::zero, parameters_done);
302 318
303 319 Label loop;
304 320 __ movptr(c_rarg2, parameters); // parameter pointer
305 321 __ movl(c_rarg1, c_rarg3); // parameter counter is in c_rarg1
306 322 __ BIND(loop);
307 323 __ movptr(rax, Address(c_rarg2, 0));// get parameter
308 324 __ addptr(c_rarg2, wordSize); // advance to next parameter
309 325 __ decrementl(c_rarg1); // decrement counter
310 326 __ push(rax); // pass parameter
311 327 __ jcc(Assembler::notZero, loop);
312 328
313 329 // call Java function
314 330 __ BIND(parameters_done);
315 331 __ movptr(rbx, method); // get methodOop
316 332 __ movptr(c_rarg1, entry_point); // get entry_point
317 333 __ mov(r13, rsp); // set sender sp
318 334 BLOCK_COMMENT("call Java function");
319 335 __ call(c_rarg1);
320 336
321 337 BLOCK_COMMENT("call_stub_return_address:");
322 338 return_address = __ pc();
323 339
324 340 // store result depending on type (everything that is not
325 341 // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
326 342 __ movptr(c_rarg0, result);
327 343 Label is_long, is_float, is_double, exit;
328 344 __ movl(c_rarg1, result_type);
329 345 __ cmpl(c_rarg1, T_OBJECT);
330 346 __ jcc(Assembler::equal, is_long);
331 347 __ cmpl(c_rarg1, T_LONG);
332 348 __ jcc(Assembler::equal, is_long);
333 349 __ cmpl(c_rarg1, T_FLOAT);
334 350 __ jcc(Assembler::equal, is_float);
335 351 __ cmpl(c_rarg1, T_DOUBLE);
336 352 __ jcc(Assembler::equal, is_double);
337 353
338 354 // handle T_INT case
339 355 __ movl(Address(c_rarg0, 0), rax);
340 356
341 357 __ BIND(exit);
342 358
343 359 // pop parameters
344 360 __ lea(rsp, rsp_after_call);
345 361
346 362 #ifdef ASSERT
347 363 // verify that threads correspond
348 364 {
349 365 Label L, S;
350 366 __ cmpptr(r15_thread, thread);
351 367 __ jcc(Assembler::notEqual, S);
352 368 __ get_thread(rbx);
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353 369 __ cmpptr(r15_thread, rbx);
354 370 __ jcc(Assembler::equal, L);
355 371 __ bind(S);
356 372 __ jcc(Assembler::equal, L);
357 373 __ stop("StubRoutines::call_stub: threads must correspond");
358 374 __ bind(L);
359 375 }
360 376 #endif
361 377
362 378 // restore regs belonging to calling function
379 +#ifdef _WIN64
380 + for (int i = 15; i >= 6; i--) {
381 + __ movdqu(as_XMMRegister(i), xmm_save(i));
382 + }
383 +#endif
363 384 __ movptr(r15, r15_save);
364 385 __ movptr(r14, r14_save);
365 386 __ movptr(r13, r13_save);
366 387 __ movptr(r12, r12_save);
367 388 __ movptr(rbx, rbx_save);
368 389
369 390 #ifdef _WIN64
370 391 __ movptr(rdi, rdi_save);
371 392 __ movptr(rsi, rsi_save);
372 393 #else
373 394 __ ldmxcsr(mxcsr_save);
374 395 #endif
375 396
376 397 // restore rsp
377 398 __ addptr(rsp, -rsp_after_call_off * wordSize);
378 399
379 400 // return
380 401 __ pop(rbp);
381 402 __ ret(0);
382 403
383 404 // handle return types different from T_INT
384 405 __ BIND(is_long);
385 406 __ movq(Address(c_rarg0, 0), rax);
386 407 __ jmp(exit);
387 408
388 409 __ BIND(is_float);
389 410 __ movflt(Address(c_rarg0, 0), xmm0);
390 411 __ jmp(exit);
391 412
392 413 __ BIND(is_double);
393 414 __ movdbl(Address(c_rarg0, 0), xmm0);
394 415 __ jmp(exit);
395 416
396 417 return start;
397 418 }
398 419
399 420 // Return point for a Java call if there's an exception thrown in
400 421 // Java code. The exception is caught and transformed into a
401 422 // pending exception stored in JavaThread that can be tested from
402 423 // within the VM.
403 424 //
404 425 // Note: Usually the parameters are removed by the callee. In case
405 426 // of an exception crossing an activation frame boundary, that is
406 427 // not the case if the callee is compiled code => need to setup the
407 428 // rsp.
408 429 //
409 430 // rax: exception oop
410 431
411 432 address generate_catch_exception() {
412 433 StubCodeMark mark(this, "StubRoutines", "catch_exception");
413 434 address start = __ pc();
414 435
415 436 // same as in generate_call_stub():
416 437 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
417 438 const Address thread (rbp, thread_off * wordSize);
418 439
419 440 #ifdef ASSERT
420 441 // verify that threads correspond
421 442 {
422 443 Label L, S;
423 444 __ cmpptr(r15_thread, thread);
424 445 __ jcc(Assembler::notEqual, S);
425 446 __ get_thread(rbx);
426 447 __ cmpptr(r15_thread, rbx);
427 448 __ jcc(Assembler::equal, L);
428 449 __ bind(S);
429 450 __ stop("StubRoutines::catch_exception: threads must correspond");
430 451 __ bind(L);
431 452 }
432 453 #endif
433 454
434 455 // set pending exception
435 456 __ verify_oop(rax);
436 457
437 458 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), rax);
438 459 __ lea(rscratch1, ExternalAddress((address)__FILE__));
439 460 __ movptr(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
440 461 __ movl(Address(r15_thread, Thread::exception_line_offset()), (int) __LINE__);
441 462
442 463 // complete return to VM
443 464 assert(StubRoutines::_call_stub_return_address != NULL,
444 465 "_call_stub_return_address must have been generated before");
445 466 __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
446 467
447 468 return start;
448 469 }
449 470
450 471 // Continuation point for runtime calls returning with a pending
451 472 // exception. The pending exception check happened in the runtime
452 473 // or native call stub. The pending exception in Thread is
453 474 // converted into a Java-level exception.
454 475 //
455 476 // Contract with Java-level exception handlers:
456 477 // rax: exception
457 478 // rdx: throwing pc
458 479 //
459 480 // NOTE: At entry of this stub, exception-pc must be on stack !!
460 481
461 482 address generate_forward_exception() {
462 483 StubCodeMark mark(this, "StubRoutines", "forward exception");
463 484 address start = __ pc();
464 485
465 486 // Upon entry, the sp points to the return address returning into
466 487 // Java (interpreted or compiled) code; i.e., the return address
467 488 // becomes the throwing pc.
468 489 //
469 490 // Arguments pushed before the runtime call are still on the stack
470 491 // but the exception handler will reset the stack pointer ->
471 492 // ignore them. A potential result in registers can be ignored as
472 493 // well.
473 494
474 495 #ifdef ASSERT
475 496 // make sure this code is only executed if there is a pending exception
476 497 {
477 498 Label L;
478 499 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t) NULL);
479 500 __ jcc(Assembler::notEqual, L);
480 501 __ stop("StubRoutines::forward exception: no pending exception (1)");
481 502 __ bind(L);
482 503 }
483 504 #endif
484 505
485 506 // compute exception handler into rbx
486 507 __ movptr(c_rarg0, Address(rsp, 0));
487 508 BLOCK_COMMENT("call exception_handler_for_return_address");
488 509 __ call_VM_leaf(CAST_FROM_FN_PTR(address,
489 510 SharedRuntime::exception_handler_for_return_address),
490 511 r15_thread, c_rarg0);
491 512 __ mov(rbx, rax);
492 513
493 514 // setup rax & rdx, remove return address & clear pending exception
494 515 __ pop(rdx);
495 516 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
496 517 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
497 518
498 519 #ifdef ASSERT
499 520 // make sure exception is set
500 521 {
501 522 Label L;
502 523 __ testptr(rax, rax);
503 524 __ jcc(Assembler::notEqual, L);
504 525 __ stop("StubRoutines::forward exception: no pending exception (2)");
505 526 __ bind(L);
506 527 }
507 528 #endif
508 529
509 530 // continue at exception handler (return address removed)
510 531 // rax: exception
511 532 // rbx: exception handler
512 533 // rdx: throwing pc
513 534 __ verify_oop(rax);
514 535 __ jmp(rbx);
515 536
516 537 return start;
517 538 }
518 539
519 540 // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
520 541 //
521 542 // Arguments :
522 543 // c_rarg0: exchange_value
523 544 // c_rarg0: dest
524 545 //
525 546 // Result:
526 547 // *dest <- ex, return (orig *dest)
527 548 address generate_atomic_xchg() {
528 549 StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
529 550 address start = __ pc();
530 551
531 552 __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
532 553 __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
533 554 __ ret(0);
534 555
535 556 return start;
536 557 }
537 558
538 559 // Support for intptr_t atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest)
539 560 //
540 561 // Arguments :
541 562 // c_rarg0: exchange_value
542 563 // c_rarg1: dest
543 564 //
544 565 // Result:
545 566 // *dest <- ex, return (orig *dest)
546 567 address generate_atomic_xchg_ptr() {
547 568 StubCodeMark mark(this, "StubRoutines", "atomic_xchg_ptr");
548 569 address start = __ pc();
549 570
550 571 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
551 572 __ xchgptr(rax, Address(c_rarg1, 0)); // automatic LOCK
552 573 __ ret(0);
553 574
554 575 return start;
555 576 }
556 577
557 578 // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
558 579 // jint compare_value)
559 580 //
560 581 // Arguments :
561 582 // c_rarg0: exchange_value
562 583 // c_rarg1: dest
563 584 // c_rarg2: compare_value
564 585 //
565 586 // Result:
566 587 // if ( compare_value == *dest ) {
567 588 // *dest = exchange_value
568 589 // return compare_value;
569 590 // else
570 591 // return *dest;
571 592 address generate_atomic_cmpxchg() {
572 593 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
573 594 address start = __ pc();
574 595
575 596 __ movl(rax, c_rarg2);
576 597 if ( os::is_MP() ) __ lock();
577 598 __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
578 599 __ ret(0);
579 600
580 601 return start;
581 602 }
582 603
583 604 // Support for jint atomic::atomic_cmpxchg_long(jlong exchange_value,
584 605 // volatile jlong* dest,
585 606 // jlong compare_value)
586 607 // Arguments :
587 608 // c_rarg0: exchange_value
588 609 // c_rarg1: dest
589 610 // c_rarg2: compare_value
590 611 //
591 612 // Result:
592 613 // if ( compare_value == *dest ) {
593 614 // *dest = exchange_value
594 615 // return compare_value;
595 616 // else
596 617 // return *dest;
597 618 address generate_atomic_cmpxchg_long() {
598 619 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
599 620 address start = __ pc();
600 621
601 622 __ movq(rax, c_rarg2);
602 623 if ( os::is_MP() ) __ lock();
603 624 __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
604 625 __ ret(0);
605 626
606 627 return start;
607 628 }
608 629
609 630 // Support for jint atomic::add(jint add_value, volatile jint* dest)
610 631 //
611 632 // Arguments :
612 633 // c_rarg0: add_value
613 634 // c_rarg1: dest
614 635 //
615 636 // Result:
616 637 // *dest += add_value
617 638 // return *dest;
618 639 address generate_atomic_add() {
619 640 StubCodeMark mark(this, "StubRoutines", "atomic_add");
620 641 address start = __ pc();
621 642
622 643 __ movl(rax, c_rarg0);
623 644 if ( os::is_MP() ) __ lock();
624 645 __ xaddl(Address(c_rarg1, 0), c_rarg0);
625 646 __ addl(rax, c_rarg0);
626 647 __ ret(0);
627 648
628 649 return start;
629 650 }
630 651
631 652 // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
632 653 //
633 654 // Arguments :
634 655 // c_rarg0: add_value
635 656 // c_rarg1: dest
636 657 //
637 658 // Result:
638 659 // *dest += add_value
639 660 // return *dest;
640 661 address generate_atomic_add_ptr() {
641 662 StubCodeMark mark(this, "StubRoutines", "atomic_add_ptr");
642 663 address start = __ pc();
643 664
644 665 __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
645 666 if ( os::is_MP() ) __ lock();
646 667 __ xaddptr(Address(c_rarg1, 0), c_rarg0);
647 668 __ addptr(rax, c_rarg0);
648 669 __ ret(0);
649 670
650 671 return start;
651 672 }
652 673
653 674 // Support for intptr_t OrderAccess::fence()
654 675 //
655 676 // Arguments :
656 677 //
657 678 // Result:
658 679 address generate_orderaccess_fence() {
659 680 StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
660 681 address start = __ pc();
661 682 __ membar(Assembler::StoreLoad);
662 683 __ ret(0);
663 684
664 685 return start;
665 686 }
666 687
667 688 // Support for intptr_t get_previous_fp()
668 689 //
669 690 // This routine is used to find the previous frame pointer for the
670 691 // caller (current_frame_guess). This is used as part of debugging
671 692 // ps() is seemingly lost trying to find frames.
672 693 // This code assumes that caller current_frame_guess) has a frame.
673 694 address generate_get_previous_fp() {
674 695 StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
675 696 const Address old_fp(rbp, 0);
676 697 const Address older_fp(rax, 0);
677 698 address start = __ pc();
678 699
679 700 __ enter();
680 701 __ movptr(rax, old_fp); // callers fp
681 702 __ movptr(rax, older_fp); // the frame for ps()
682 703 __ pop(rbp);
683 704 __ ret(0);
684 705
685 706 return start;
686 707 }
687 708
688 709 //----------------------------------------------------------------------------------------------------
689 710 // Support for void verify_mxcsr()
690 711 //
691 712 // This routine is used with -Xcheck:jni to verify that native
692 713 // JNI code does not return to Java code without restoring the
693 714 // MXCSR register to our expected state.
694 715
695 716 address generate_verify_mxcsr() {
696 717 StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
697 718 address start = __ pc();
698 719
699 720 const Address mxcsr_save(rsp, 0);
700 721
701 722 if (CheckJNICalls) {
702 723 Label ok_ret;
703 724 __ push(rax);
704 725 __ subptr(rsp, wordSize); // allocate a temp location
705 726 __ stmxcsr(mxcsr_save);
706 727 __ movl(rax, mxcsr_save);
707 728 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
708 729 __ cmpl(rax, *(int *)(StubRoutines::x86::mxcsr_std()));
709 730 __ jcc(Assembler::equal, ok_ret);
710 731
711 732 __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
712 733
713 734 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
714 735
715 736 __ bind(ok_ret);
716 737 __ addptr(rsp, wordSize);
717 738 __ pop(rax);
718 739 }
719 740
720 741 __ ret(0);
721 742
722 743 return start;
723 744 }
724 745
725 746 address generate_f2i_fixup() {
726 747 StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
727 748 Address inout(rsp, 5 * wordSize); // return address + 4 saves
728 749
729 750 address start = __ pc();
730 751
731 752 Label L;
732 753
733 754 __ push(rax);
734 755 __ push(c_rarg3);
735 756 __ push(c_rarg2);
736 757 __ push(c_rarg1);
737 758
738 759 __ movl(rax, 0x7f800000);
739 760 __ xorl(c_rarg3, c_rarg3);
740 761 __ movl(c_rarg2, inout);
741 762 __ movl(c_rarg1, c_rarg2);
742 763 __ andl(c_rarg1, 0x7fffffff);
743 764 __ cmpl(rax, c_rarg1); // NaN? -> 0
744 765 __ jcc(Assembler::negative, L);
745 766 __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
746 767 __ movl(c_rarg3, 0x80000000);
747 768 __ movl(rax, 0x7fffffff);
748 769 __ cmovl(Assembler::positive, c_rarg3, rax);
749 770
750 771 __ bind(L);
751 772 __ movptr(inout, c_rarg3);
752 773
753 774 __ pop(c_rarg1);
754 775 __ pop(c_rarg2);
755 776 __ pop(c_rarg3);
756 777 __ pop(rax);
757 778
758 779 __ ret(0);
759 780
760 781 return start;
761 782 }
762 783
763 784 address generate_f2l_fixup() {
764 785 StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
765 786 Address inout(rsp, 5 * wordSize); // return address + 4 saves
766 787 address start = __ pc();
767 788
768 789 Label L;
769 790
770 791 __ push(rax);
771 792 __ push(c_rarg3);
772 793 __ push(c_rarg2);
773 794 __ push(c_rarg1);
774 795
775 796 __ movl(rax, 0x7f800000);
776 797 __ xorl(c_rarg3, c_rarg3);
777 798 __ movl(c_rarg2, inout);
778 799 __ movl(c_rarg1, c_rarg2);
779 800 __ andl(c_rarg1, 0x7fffffff);
780 801 __ cmpl(rax, c_rarg1); // NaN? -> 0
781 802 __ jcc(Assembler::negative, L);
782 803 __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
783 804 __ mov64(c_rarg3, 0x8000000000000000);
784 805 __ mov64(rax, 0x7fffffffffffffff);
785 806 __ cmov(Assembler::positive, c_rarg3, rax);
786 807
787 808 __ bind(L);
788 809 __ movptr(inout, c_rarg3);
789 810
790 811 __ pop(c_rarg1);
791 812 __ pop(c_rarg2);
792 813 __ pop(c_rarg3);
793 814 __ pop(rax);
794 815
795 816 __ ret(0);
796 817
797 818 return start;
798 819 }
799 820
800 821 address generate_d2i_fixup() {
801 822 StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
802 823 Address inout(rsp, 6 * wordSize); // return address + 5 saves
803 824
804 825 address start = __ pc();
805 826
806 827 Label L;
807 828
808 829 __ push(rax);
809 830 __ push(c_rarg3);
810 831 __ push(c_rarg2);
811 832 __ push(c_rarg1);
812 833 __ push(c_rarg0);
813 834
814 835 __ movl(rax, 0x7ff00000);
815 836 __ movq(c_rarg2, inout);
816 837 __ movl(c_rarg3, c_rarg2);
817 838 __ mov(c_rarg1, c_rarg2);
818 839 __ mov(c_rarg0, c_rarg2);
819 840 __ negl(c_rarg3);
820 841 __ shrptr(c_rarg1, 0x20);
821 842 __ orl(c_rarg3, c_rarg2);
822 843 __ andl(c_rarg1, 0x7fffffff);
823 844 __ xorl(c_rarg2, c_rarg2);
824 845 __ shrl(c_rarg3, 0x1f);
825 846 __ orl(c_rarg1, c_rarg3);
826 847 __ cmpl(rax, c_rarg1);
827 848 __ jcc(Assembler::negative, L); // NaN -> 0
828 849 __ testptr(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
829 850 __ movl(c_rarg2, 0x80000000);
830 851 __ movl(rax, 0x7fffffff);
831 852 __ cmov(Assembler::positive, c_rarg2, rax);
832 853
833 854 __ bind(L);
834 855 __ movptr(inout, c_rarg2);
835 856
836 857 __ pop(c_rarg0);
837 858 __ pop(c_rarg1);
838 859 __ pop(c_rarg2);
839 860 __ pop(c_rarg3);
840 861 __ pop(rax);
841 862
842 863 __ ret(0);
843 864
844 865 return start;
845 866 }
846 867
847 868 address generate_d2l_fixup() {
848 869 StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
849 870 Address inout(rsp, 6 * wordSize); // return address + 5 saves
850 871
851 872 address start = __ pc();
852 873
853 874 Label L;
854 875
855 876 __ push(rax);
856 877 __ push(c_rarg3);
857 878 __ push(c_rarg2);
858 879 __ push(c_rarg1);
859 880 __ push(c_rarg0);
860 881
861 882 __ movl(rax, 0x7ff00000);
862 883 __ movq(c_rarg2, inout);
863 884 __ movl(c_rarg3, c_rarg2);
864 885 __ mov(c_rarg1, c_rarg2);
865 886 __ mov(c_rarg0, c_rarg2);
866 887 __ negl(c_rarg3);
867 888 __ shrptr(c_rarg1, 0x20);
868 889 __ orl(c_rarg3, c_rarg2);
869 890 __ andl(c_rarg1, 0x7fffffff);
870 891 __ xorl(c_rarg2, c_rarg2);
871 892 __ shrl(c_rarg3, 0x1f);
872 893 __ orl(c_rarg1, c_rarg3);
873 894 __ cmpl(rax, c_rarg1);
874 895 __ jcc(Assembler::negative, L); // NaN -> 0
875 896 __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
876 897 __ mov64(c_rarg2, 0x8000000000000000);
877 898 __ mov64(rax, 0x7fffffffffffffff);
878 899 __ cmovq(Assembler::positive, c_rarg2, rax);
879 900
880 901 __ bind(L);
881 902 __ movq(inout, c_rarg2);
882 903
883 904 __ pop(c_rarg0);
884 905 __ pop(c_rarg1);
885 906 __ pop(c_rarg2);
886 907 __ pop(c_rarg3);
887 908 __ pop(rax);
888 909
889 910 __ ret(0);
890 911
891 912 return start;
892 913 }
893 914
894 915 address generate_fp_mask(const char *stub_name, int64_t mask) {
895 916 __ align(CodeEntryAlignment);
896 917 StubCodeMark mark(this, "StubRoutines", stub_name);
897 918 address start = __ pc();
898 919
899 920 __ emit_data64( mask, relocInfo::none );
900 921 __ emit_data64( mask, relocInfo::none );
901 922
902 923 return start;
903 924 }
904 925
905 926 // The following routine generates a subroutine to throw an
906 927 // asynchronous UnknownError when an unsafe access gets a fault that
907 928 // could not be reasonably prevented by the programmer. (Example:
908 929 // SIGBUS/OBJERR.)
909 930 address generate_handler_for_unsafe_access() {
910 931 StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
911 932 address start = __ pc();
912 933
913 934 __ push(0); // hole for return address-to-be
914 935 __ pusha(); // push registers
915 936 Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
916 937
917 938 __ subptr(rsp, frame::arg_reg_save_area_bytes);
918 939 BLOCK_COMMENT("call handle_unsafe_access");
919 940 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
920 941 __ addptr(rsp, frame::arg_reg_save_area_bytes);
921 942
922 943 __ movptr(next_pc, rax); // stuff next address
923 944 __ popa();
924 945 __ ret(0); // jump to next address
925 946
926 947 return start;
927 948 }
928 949
929 950 // Non-destructive plausibility checks for oops
930 951 //
931 952 // Arguments:
932 953 // all args on stack!
933 954 //
934 955 // Stack after saving c_rarg3:
935 956 // [tos + 0]: saved c_rarg3
936 957 // [tos + 1]: saved c_rarg2
937 958 // [tos + 2]: saved r12 (several TemplateTable methods use it)
938 959 // [tos + 3]: saved flags
939 960 // [tos + 4]: return address
940 961 // * [tos + 5]: error message (char*)
941 962 // * [tos + 6]: object to verify (oop)
942 963 // * [tos + 7]: saved rax - saved by caller and bashed
943 964 // * [tos + 8]: saved r10 (rscratch1) - saved by caller
944 965 // * = popped on exit
945 966 address generate_verify_oop() {
946 967 StubCodeMark mark(this, "StubRoutines", "verify_oop");
947 968 address start = __ pc();
948 969
949 970 Label exit, error;
950 971
951 972 __ pushf();
952 973 __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
953 974
954 975 __ push(r12);
955 976
956 977 // save c_rarg2 and c_rarg3
957 978 __ push(c_rarg2);
958 979 __ push(c_rarg3);
959 980
960 981 enum {
961 982 // After previous pushes.
962 983 oop_to_verify = 6 * wordSize,
963 984 saved_rax = 7 * wordSize,
964 985 saved_r10 = 8 * wordSize,
965 986
966 987 // Before the call to MacroAssembler::debug(), see below.
967 988 return_addr = 16 * wordSize,
968 989 error_msg = 17 * wordSize
969 990 };
970 991
971 992 // get object
972 993 __ movptr(rax, Address(rsp, oop_to_verify));
973 994
974 995 // make sure object is 'reasonable'
975 996 __ testptr(rax, rax);
976 997 __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
977 998 // Check if the oop is in the right area of memory
978 999 __ movptr(c_rarg2, rax);
979 1000 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_mask());
980 1001 __ andptr(c_rarg2, c_rarg3);
981 1002 __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_bits());
982 1003 __ cmpptr(c_rarg2, c_rarg3);
983 1004 __ jcc(Assembler::notZero, error);
984 1005
985 1006 // set r12 to heapbase for load_klass()
986 1007 __ reinit_heapbase();
987 1008
988 1009 // make sure klass is 'reasonable'
989 1010 __ load_klass(rax, rax); // get klass
990 1011 __ testptr(rax, rax);
991 1012 __ jcc(Assembler::zero, error); // if klass is NULL it is broken
992 1013 // Check if the klass is in the right area of memory
993 1014 __ mov(c_rarg2, rax);
994 1015 __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_mask());
995 1016 __ andptr(c_rarg2, c_rarg3);
996 1017 __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_bits());
997 1018 __ cmpptr(c_rarg2, c_rarg3);
998 1019 __ jcc(Assembler::notZero, error);
999 1020
1000 1021 // make sure klass' klass is 'reasonable'
1001 1022 __ load_klass(rax, rax);
1002 1023 __ testptr(rax, rax);
1003 1024 __ jcc(Assembler::zero, error); // if klass' klass is NULL it is broken
1004 1025 // Check if the klass' klass is in the right area of memory
1005 1026 __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_mask());
1006 1027 __ andptr(rax, c_rarg3);
1007 1028 __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_bits());
1008 1029 __ cmpptr(rax, c_rarg3);
1009 1030 __ jcc(Assembler::notZero, error);
1010 1031
1011 1032 // return if everything seems ok
1012 1033 __ bind(exit);
1013 1034 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1014 1035 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1015 1036 __ pop(c_rarg3); // restore c_rarg3
1016 1037 __ pop(c_rarg2); // restore c_rarg2
1017 1038 __ pop(r12); // restore r12
1018 1039 __ popf(); // restore flags
1019 1040 __ ret(4 * wordSize); // pop caller saved stuff
1020 1041
1021 1042 // handle errors
1022 1043 __ bind(error);
1023 1044 __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1024 1045 __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1025 1046 __ pop(c_rarg3); // get saved c_rarg3 back
1026 1047 __ pop(c_rarg2); // get saved c_rarg2 back
1027 1048 __ pop(r12); // get saved r12 back
1028 1049 __ popf(); // get saved flags off stack --
1029 1050 // will be ignored
1030 1051
1031 1052 __ pusha(); // push registers
1032 1053 // (rip is already
1033 1054 // already pushed)
1034 1055 // debug(char* msg, int64_t pc, int64_t regs[])
1035 1056 // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
1036 1057 // pushed all the registers, so now the stack looks like:
1037 1058 // [tos + 0] 16 saved registers
1038 1059 // [tos + 16] return address
1039 1060 // * [tos + 17] error message (char*)
1040 1061 // * [tos + 18] object to verify (oop)
1041 1062 // * [tos + 19] saved rax - saved by caller and bashed
1042 1063 // * [tos + 20] saved r10 (rscratch1) - saved by caller
1043 1064 // * = popped on exit
1044 1065
1045 1066 __ movptr(c_rarg0, Address(rsp, error_msg)); // pass address of error message
1046 1067 __ movptr(c_rarg1, Address(rsp, return_addr)); // pass return address
1047 1068 __ movq(c_rarg2, rsp); // pass address of regs on stack
1048 1069 __ mov(r12, rsp); // remember rsp
1049 1070 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1050 1071 __ andptr(rsp, -16); // align stack as required by ABI
1051 1072 BLOCK_COMMENT("call MacroAssembler::debug");
1052 1073 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)));
1053 1074 __ mov(rsp, r12); // restore rsp
1054 1075 __ popa(); // pop registers (includes r12)
1055 1076 __ ret(4 * wordSize); // pop caller saved stuff
1056 1077
1057 1078 return start;
1058 1079 }
1059 1080
1060 1081 //
1061 1082 // Verify that a register contains clean 32-bits positive value
1062 1083 // (high 32-bits are 0) so it could be used in 64-bits shifts.
1063 1084 //
1064 1085 // Input:
1065 1086 // Rint - 32-bits value
1066 1087 // Rtmp - scratch
1067 1088 //
1068 1089 void assert_clean_int(Register Rint, Register Rtmp) {
1069 1090 #ifdef ASSERT
1070 1091 Label L;
1071 1092 assert_different_registers(Rtmp, Rint);
1072 1093 __ movslq(Rtmp, Rint);
1073 1094 __ cmpq(Rtmp, Rint);
1074 1095 __ jcc(Assembler::equal, L);
1075 1096 __ stop("high 32-bits of int value are not 0");
1076 1097 __ bind(L);
1077 1098 #endif
1078 1099 }
1079 1100
1080 1101 // Generate overlap test for array copy stubs
1081 1102 //
1082 1103 // Input:
1083 1104 // c_rarg0 - from
1084 1105 // c_rarg1 - to
1085 1106 // c_rarg2 - element count
1086 1107 //
1087 1108 // Output:
1088 1109 // rax - &from[element count - 1]
1089 1110 //
1090 1111 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
1091 1112 assert(no_overlap_target != NULL, "must be generated");
1092 1113 array_overlap_test(no_overlap_target, NULL, sf);
1093 1114 }
1094 1115 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
1095 1116 array_overlap_test(NULL, &L_no_overlap, sf);
1096 1117 }
1097 1118 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
1098 1119 const Register from = c_rarg0;
1099 1120 const Register to = c_rarg1;
1100 1121 const Register count = c_rarg2;
1101 1122 const Register end_from = rax;
1102 1123
1103 1124 __ cmpptr(to, from);
1104 1125 __ lea(end_from, Address(from, count, sf, 0));
1105 1126 if (NOLp == NULL) {
1106 1127 ExternalAddress no_overlap(no_overlap_target);
1107 1128 __ jump_cc(Assembler::belowEqual, no_overlap);
1108 1129 __ cmpptr(to, end_from);
1109 1130 __ jump_cc(Assembler::aboveEqual, no_overlap);
1110 1131 } else {
1111 1132 __ jcc(Assembler::belowEqual, (*NOLp));
1112 1133 __ cmpptr(to, end_from);
1113 1134 __ jcc(Assembler::aboveEqual, (*NOLp));
1114 1135 }
1115 1136 }
1116 1137
1117 1138 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
1118 1139 //
1119 1140 // Outputs:
1120 1141 // rdi - rcx
1121 1142 // rsi - rdx
1122 1143 // rdx - r8
1123 1144 // rcx - r9
1124 1145 //
1125 1146 // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
1126 1147 // are non-volatile. r9 and r10 should not be used by the caller.
1127 1148 //
1128 1149 void setup_arg_regs(int nargs = 3) {
1129 1150 const Register saved_rdi = r9;
1130 1151 const Register saved_rsi = r10;
1131 1152 assert(nargs == 3 || nargs == 4, "else fix");
1132 1153 #ifdef _WIN64
1133 1154 assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
1134 1155 "unexpected argument registers");
1135 1156 if (nargs >= 4)
1136 1157 __ mov(rax, r9); // r9 is also saved_rdi
1137 1158 __ movptr(saved_rdi, rdi);
1138 1159 __ movptr(saved_rsi, rsi);
1139 1160 __ mov(rdi, rcx); // c_rarg0
1140 1161 __ mov(rsi, rdx); // c_rarg1
1141 1162 __ mov(rdx, r8); // c_rarg2
1142 1163 if (nargs >= 4)
1143 1164 __ mov(rcx, rax); // c_rarg3 (via rax)
1144 1165 #else
1145 1166 assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
1146 1167 "unexpected argument registers");
1147 1168 #endif
1148 1169 }
1149 1170
1150 1171 void restore_arg_regs() {
1151 1172 const Register saved_rdi = r9;
1152 1173 const Register saved_rsi = r10;
1153 1174 #ifdef _WIN64
1154 1175 __ movptr(rdi, saved_rdi);
1155 1176 __ movptr(rsi, saved_rsi);
1156 1177 #endif
1157 1178 }
1158 1179
1159 1180 // Generate code for an array write pre barrier
1160 1181 //
1161 1182 // addr - starting address
1162 1183 // count - element count
1163 1184 // tmp - scratch register
1164 1185 //
1165 1186 // Destroy no registers!
1166 1187 //
1167 1188 void gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) {
1168 1189 BarrierSet* bs = Universe::heap()->barrier_set();
1169 1190 switch (bs->kind()) {
1170 1191 case BarrierSet::G1SATBCT:
1171 1192 case BarrierSet::G1SATBCTLogging:
1172 1193 // With G1, don't generate the call if we statically know that the target in uninitialized
1173 1194 if (!dest_uninitialized) {
1174 1195 __ pusha(); // push registers
1175 1196 if (count == c_rarg0) {
1176 1197 if (addr == c_rarg1) {
1177 1198 // exactly backwards!!
1178 1199 __ xchgptr(c_rarg1, c_rarg0);
1179 1200 } else {
1180 1201 __ movptr(c_rarg1, count);
1181 1202 __ movptr(c_rarg0, addr);
1182 1203 }
1183 1204 } else {
1184 1205 __ movptr(c_rarg0, addr);
1185 1206 __ movptr(c_rarg1, count);
1186 1207 }
1187 1208 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre), 2);
1188 1209 __ popa();
1189 1210 }
1190 1211 break;
1191 1212 case BarrierSet::CardTableModRef:
1192 1213 case BarrierSet::CardTableExtension:
1193 1214 case BarrierSet::ModRef:
1194 1215 break;
1195 1216 default:
1196 1217 ShouldNotReachHere();
1197 1218
1198 1219 }
1199 1220 }
1200 1221
1201 1222 //
1202 1223 // Generate code for an array write post barrier
1203 1224 //
1204 1225 // Input:
1205 1226 // start - register containing starting address of destination array
1206 1227 // end - register containing ending address of destination array
1207 1228 // scratch - scratch register
1208 1229 //
1209 1230 // The input registers are overwritten.
1210 1231 // The ending address is inclusive.
1211 1232 void gen_write_ref_array_post_barrier(Register start, Register end, Register scratch) {
1212 1233 assert_different_registers(start, end, scratch);
1213 1234 BarrierSet* bs = Universe::heap()->barrier_set();
1214 1235 switch (bs->kind()) {
1215 1236 case BarrierSet::G1SATBCT:
1216 1237 case BarrierSet::G1SATBCTLogging:
1217 1238
1218 1239 {
1219 1240 __ pusha(); // push registers (overkill)
1220 1241 // must compute element count unless barrier set interface is changed (other platforms supply count)
1221 1242 assert_different_registers(start, end, scratch);
1222 1243 __ lea(scratch, Address(end, BytesPerHeapOop));
1223 1244 __ subptr(scratch, start); // subtract start to get #bytes
1224 1245 __ shrptr(scratch, LogBytesPerHeapOop); // convert to element count
1225 1246 __ mov(c_rarg0, start);
1226 1247 __ mov(c_rarg1, scratch);
1227 1248 __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post), 2);
1228 1249 __ popa();
1229 1250 }
1230 1251 break;
1231 1252 case BarrierSet::CardTableModRef:
1232 1253 case BarrierSet::CardTableExtension:
1233 1254 {
1234 1255 CardTableModRefBS* ct = (CardTableModRefBS*)bs;
1235 1256 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
1236 1257
1237 1258 Label L_loop;
1238 1259
1239 1260 __ shrptr(start, CardTableModRefBS::card_shift);
1240 1261 __ addptr(end, BytesPerHeapOop);
1241 1262 __ shrptr(end, CardTableModRefBS::card_shift);
1242 1263 __ subptr(end, start); // number of bytes to copy
1243 1264
1244 1265 intptr_t disp = (intptr_t) ct->byte_map_base;
1245 1266 if (__ is_simm32(disp)) {
1246 1267 Address cardtable(noreg, noreg, Address::no_scale, disp);
1247 1268 __ lea(scratch, cardtable);
1248 1269 } else {
1249 1270 ExternalAddress cardtable((address)disp);
1250 1271 __ lea(scratch, cardtable);
1251 1272 }
1252 1273
1253 1274 const Register count = end; // 'end' register contains bytes count now
1254 1275 __ addptr(start, scratch);
1255 1276 __ BIND(L_loop);
1256 1277 __ movb(Address(start, count, Address::times_1), 0);
1257 1278 __ decrement(count);
1258 1279 __ jcc(Assembler::greaterEqual, L_loop);
1259 1280 }
1260 1281 break;
1261 1282 default:
1262 1283 ShouldNotReachHere();
1263 1284
1264 1285 }
1265 1286 }
1266 1287
1267 1288
1268 1289 // Copy big chunks forward
1269 1290 //
1270 1291 // Inputs:
1271 1292 // end_from - source arrays end address
1272 1293 // end_to - destination array end address
1273 1294 // qword_count - 64-bits element count, negative
1274 1295 // to - scratch
1275 1296 // L_copy_32_bytes - entry label
1276 1297 // L_copy_8_bytes - exit label
1277 1298 //
1278 1299 void copy_32_bytes_forward(Register end_from, Register end_to,
1279 1300 Register qword_count, Register to,
1280 1301 Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
1281 1302 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1282 1303 Label L_loop;
1283 1304 __ align(OptoLoopAlignment);
1284 1305 __ BIND(L_loop);
1285 1306 if(UseUnalignedLoadStores) {
1286 1307 __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
1287 1308 __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
1288 1309 __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, - 8));
1289 1310 __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm1);
1290 1311
1291 1312 } else {
1292 1313 __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
1293 1314 __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
1294 1315 __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
1295 1316 __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
1296 1317 __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
1297 1318 __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
1298 1319 __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
1299 1320 __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
1300 1321 }
1301 1322 __ BIND(L_copy_32_bytes);
1302 1323 __ addptr(qword_count, 4);
1303 1324 __ jcc(Assembler::lessEqual, L_loop);
1304 1325 __ subptr(qword_count, 4);
1305 1326 __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
1306 1327 }
1307 1328
1308 1329
1309 1330 // Copy big chunks backward
1310 1331 //
1311 1332 // Inputs:
1312 1333 // from - source arrays address
1313 1334 // dest - destination array address
1314 1335 // qword_count - 64-bits element count
1315 1336 // to - scratch
1316 1337 // L_copy_32_bytes - entry label
1317 1338 // L_copy_8_bytes - exit label
1318 1339 //
1319 1340 void copy_32_bytes_backward(Register from, Register dest,
1320 1341 Register qword_count, Register to,
1321 1342 Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
1322 1343 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1323 1344 Label L_loop;
1324 1345 __ align(OptoLoopAlignment);
1325 1346 __ BIND(L_loop);
1326 1347 if(UseUnalignedLoadStores) {
1327 1348 __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 16));
1328 1349 __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm0);
1329 1350 __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
1330 1351 __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
1331 1352
1332 1353 } else {
1333 1354 __ movq(to, Address(from, qword_count, Address::times_8, 24));
1334 1355 __ movq(Address(dest, qword_count, Address::times_8, 24), to);
1335 1356 __ movq(to, Address(from, qword_count, Address::times_8, 16));
1336 1357 __ movq(Address(dest, qword_count, Address::times_8, 16), to);
1337 1358 __ movq(to, Address(from, qword_count, Address::times_8, 8));
1338 1359 __ movq(Address(dest, qword_count, Address::times_8, 8), to);
1339 1360 __ movq(to, Address(from, qword_count, Address::times_8, 0));
1340 1361 __ movq(Address(dest, qword_count, Address::times_8, 0), to);
1341 1362 }
1342 1363 __ BIND(L_copy_32_bytes);
1343 1364 __ subptr(qword_count, 4);
1344 1365 __ jcc(Assembler::greaterEqual, L_loop);
1345 1366 __ addptr(qword_count, 4);
1346 1367 __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
1347 1368 }
1348 1369
1349 1370
1350 1371 // Arguments:
1351 1372 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1352 1373 // ignored
1353 1374 // name - stub name string
1354 1375 //
1355 1376 // Inputs:
1356 1377 // c_rarg0 - source array address
1357 1378 // c_rarg1 - destination array address
1358 1379 // c_rarg2 - element count, treated as ssize_t, can be zero
1359 1380 //
1360 1381 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1361 1382 // we let the hardware handle it. The one to eight bytes within words,
1362 1383 // dwords or qwords that span cache line boundaries will still be loaded
1363 1384 // and stored atomically.
1364 1385 //
1365 1386 // Side Effects:
1366 1387 // disjoint_byte_copy_entry is set to the no-overlap entry point
1367 1388 // used by generate_conjoint_byte_copy().
1368 1389 //
1369 1390 address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name) {
1370 1391 __ align(CodeEntryAlignment);
1371 1392 StubCodeMark mark(this, "StubRoutines", name);
1372 1393 address start = __ pc();
1373 1394
1374 1395 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1375 1396 Label L_copy_byte, L_exit;
1376 1397 const Register from = rdi; // source array address
1377 1398 const Register to = rsi; // destination array address
1378 1399 const Register count = rdx; // elements count
1379 1400 const Register byte_count = rcx;
1380 1401 const Register qword_count = count;
1381 1402 const Register end_from = from; // source array end address
1382 1403 const Register end_to = to; // destination array end address
1383 1404 // End pointers are inclusive, and if count is not zero they point
1384 1405 // to the last unit copied: end_to[0] := end_from[0]
1385 1406
1386 1407 __ enter(); // required for proper stackwalking of RuntimeStub frame
1387 1408 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1388 1409
1389 1410 if (entry != NULL) {
1390 1411 *entry = __ pc();
1391 1412 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1392 1413 BLOCK_COMMENT("Entry:");
1393 1414 }
1394 1415
1395 1416 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1396 1417 // r9 and r10 may be used to save non-volatile registers
1397 1418
1398 1419 // 'from', 'to' and 'count' are now valid
1399 1420 __ movptr(byte_count, count);
1400 1421 __ shrptr(count, 3); // count => qword_count
1401 1422
1402 1423 // Copy from low to high addresses. Use 'to' as scratch.
1403 1424 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1404 1425 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1405 1426 __ negptr(qword_count); // make the count negative
1406 1427 __ jmp(L_copy_32_bytes);
1407 1428
1408 1429 // Copy trailing qwords
1409 1430 __ BIND(L_copy_8_bytes);
1410 1431 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1411 1432 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1412 1433 __ increment(qword_count);
1413 1434 __ jcc(Assembler::notZero, L_copy_8_bytes);
1414 1435
1415 1436 // Check for and copy trailing dword
1416 1437 __ BIND(L_copy_4_bytes);
1417 1438 __ testl(byte_count, 4);
1418 1439 __ jccb(Assembler::zero, L_copy_2_bytes);
1419 1440 __ movl(rax, Address(end_from, 8));
1420 1441 __ movl(Address(end_to, 8), rax);
1421 1442
1422 1443 __ addptr(end_from, 4);
1423 1444 __ addptr(end_to, 4);
1424 1445
1425 1446 // Check for and copy trailing word
1426 1447 __ BIND(L_copy_2_bytes);
1427 1448 __ testl(byte_count, 2);
1428 1449 __ jccb(Assembler::zero, L_copy_byte);
1429 1450 __ movw(rax, Address(end_from, 8));
1430 1451 __ movw(Address(end_to, 8), rax);
1431 1452
1432 1453 __ addptr(end_from, 2);
1433 1454 __ addptr(end_to, 2);
1434 1455
1435 1456 // Check for and copy trailing byte
1436 1457 __ BIND(L_copy_byte);
1437 1458 __ testl(byte_count, 1);
1438 1459 __ jccb(Assembler::zero, L_exit);
1439 1460 __ movb(rax, Address(end_from, 8));
1440 1461 __ movb(Address(end_to, 8), rax);
1441 1462
1442 1463 __ BIND(L_exit);
1443 1464 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr);
1444 1465 restore_arg_regs();
1445 1466 __ xorptr(rax, rax); // return 0
1446 1467 __ leave(); // required for proper stackwalking of RuntimeStub frame
1447 1468 __ ret(0);
1448 1469
1449 1470 // Copy in 32-bytes chunks
1450 1471 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1451 1472 __ jmp(L_copy_4_bytes);
1452 1473
1453 1474 return start;
1454 1475 }
1455 1476
1456 1477 // Arguments:
1457 1478 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1458 1479 // ignored
1459 1480 // name - stub name string
1460 1481 //
1461 1482 // Inputs:
1462 1483 // c_rarg0 - source array address
1463 1484 // c_rarg1 - destination array address
1464 1485 // c_rarg2 - element count, treated as ssize_t, can be zero
1465 1486 //
1466 1487 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1467 1488 // we let the hardware handle it. The one to eight bytes within words,
1468 1489 // dwords or qwords that span cache line boundaries will still be loaded
1469 1490 // and stored atomically.
1470 1491 //
1471 1492 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
1472 1493 address* entry, const char *name) {
1473 1494 __ align(CodeEntryAlignment);
1474 1495 StubCodeMark mark(this, "StubRoutines", name);
1475 1496 address start = __ pc();
1476 1497
1477 1498 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1478 1499 const Register from = rdi; // source array address
1479 1500 const Register to = rsi; // destination array address
1480 1501 const Register count = rdx; // elements count
1481 1502 const Register byte_count = rcx;
1482 1503 const Register qword_count = count;
1483 1504
1484 1505 __ enter(); // required for proper stackwalking of RuntimeStub frame
1485 1506 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1486 1507
1487 1508 if (entry != NULL) {
1488 1509 *entry = __ pc();
1489 1510 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1490 1511 BLOCK_COMMENT("Entry:");
1491 1512 }
1492 1513
1493 1514 array_overlap_test(nooverlap_target, Address::times_1);
1494 1515 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1495 1516 // r9 and r10 may be used to save non-volatile registers
1496 1517
1497 1518 // 'from', 'to' and 'count' are now valid
1498 1519 __ movptr(byte_count, count);
1499 1520 __ shrptr(count, 3); // count => qword_count
1500 1521
1501 1522 // Copy from high to low addresses.
1502 1523
1503 1524 // Check for and copy trailing byte
1504 1525 __ testl(byte_count, 1);
1505 1526 __ jcc(Assembler::zero, L_copy_2_bytes);
1506 1527 __ movb(rax, Address(from, byte_count, Address::times_1, -1));
1507 1528 __ movb(Address(to, byte_count, Address::times_1, -1), rax);
1508 1529 __ decrement(byte_count); // Adjust for possible trailing word
1509 1530
1510 1531 // Check for and copy trailing word
1511 1532 __ BIND(L_copy_2_bytes);
1512 1533 __ testl(byte_count, 2);
1513 1534 __ jcc(Assembler::zero, L_copy_4_bytes);
1514 1535 __ movw(rax, Address(from, byte_count, Address::times_1, -2));
1515 1536 __ movw(Address(to, byte_count, Address::times_1, -2), rax);
1516 1537
1517 1538 // Check for and copy trailing dword
1518 1539 __ BIND(L_copy_4_bytes);
1519 1540 __ testl(byte_count, 4);
1520 1541 __ jcc(Assembler::zero, L_copy_32_bytes);
1521 1542 __ movl(rax, Address(from, qword_count, Address::times_8));
1522 1543 __ movl(Address(to, qword_count, Address::times_8), rax);
1523 1544 __ jmp(L_copy_32_bytes);
1524 1545
1525 1546 // Copy trailing qwords
1526 1547 __ BIND(L_copy_8_bytes);
1527 1548 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1528 1549 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1529 1550 __ decrement(qword_count);
1530 1551 __ jcc(Assembler::notZero, L_copy_8_bytes);
1531 1552
1532 1553 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr);
1533 1554 restore_arg_regs();
1534 1555 __ xorptr(rax, rax); // return 0
1535 1556 __ leave(); // required for proper stackwalking of RuntimeStub frame
1536 1557 __ ret(0);
1537 1558
1538 1559 // Copy in 32-bytes chunks
1539 1560 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1540 1561
1541 1562 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr);
1542 1563 restore_arg_regs();
1543 1564 __ xorptr(rax, rax); // return 0
1544 1565 __ leave(); // required for proper stackwalking of RuntimeStub frame
1545 1566 __ ret(0);
1546 1567
1547 1568 return start;
1548 1569 }
1549 1570
1550 1571 // Arguments:
1551 1572 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1552 1573 // ignored
1553 1574 // name - stub name string
1554 1575 //
1555 1576 // Inputs:
1556 1577 // c_rarg0 - source array address
1557 1578 // c_rarg1 - destination array address
1558 1579 // c_rarg2 - element count, treated as ssize_t, can be zero
1559 1580 //
1560 1581 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1561 1582 // let the hardware handle it. The two or four words within dwords
1562 1583 // or qwords that span cache line boundaries will still be loaded
1563 1584 // and stored atomically.
1564 1585 //
1565 1586 // Side Effects:
1566 1587 // disjoint_short_copy_entry is set to the no-overlap entry point
1567 1588 // used by generate_conjoint_short_copy().
1568 1589 //
1569 1590 address generate_disjoint_short_copy(bool aligned, address *entry, const char *name) {
1570 1591 __ align(CodeEntryAlignment);
1571 1592 StubCodeMark mark(this, "StubRoutines", name);
1572 1593 address start = __ pc();
1573 1594
1574 1595 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
1575 1596 const Register from = rdi; // source array address
1576 1597 const Register to = rsi; // destination array address
1577 1598 const Register count = rdx; // elements count
1578 1599 const Register word_count = rcx;
1579 1600 const Register qword_count = count;
1580 1601 const Register end_from = from; // source array end address
1581 1602 const Register end_to = to; // destination array end address
1582 1603 // End pointers are inclusive, and if count is not zero they point
1583 1604 // to the last unit copied: end_to[0] := end_from[0]
1584 1605
1585 1606 __ enter(); // required for proper stackwalking of RuntimeStub frame
1586 1607 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1587 1608
1588 1609 if (entry != NULL) {
1589 1610 *entry = __ pc();
1590 1611 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1591 1612 BLOCK_COMMENT("Entry:");
1592 1613 }
1593 1614
1594 1615 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1595 1616 // r9 and r10 may be used to save non-volatile registers
1596 1617
1597 1618 // 'from', 'to' and 'count' are now valid
1598 1619 __ movptr(word_count, count);
1599 1620 __ shrptr(count, 2); // count => qword_count
1600 1621
1601 1622 // Copy from low to high addresses. Use 'to' as scratch.
1602 1623 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1603 1624 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1604 1625 __ negptr(qword_count);
1605 1626 __ jmp(L_copy_32_bytes);
1606 1627
1607 1628 // Copy trailing qwords
1608 1629 __ BIND(L_copy_8_bytes);
1609 1630 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1610 1631 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1611 1632 __ increment(qword_count);
1612 1633 __ jcc(Assembler::notZero, L_copy_8_bytes);
1613 1634
1614 1635 // Original 'dest' is trashed, so we can't use it as a
1615 1636 // base register for a possible trailing word copy
1616 1637
1617 1638 // Check for and copy trailing dword
1618 1639 __ BIND(L_copy_4_bytes);
1619 1640 __ testl(word_count, 2);
1620 1641 __ jccb(Assembler::zero, L_copy_2_bytes);
1621 1642 __ movl(rax, Address(end_from, 8));
1622 1643 __ movl(Address(end_to, 8), rax);
1623 1644
1624 1645 __ addptr(end_from, 4);
1625 1646 __ addptr(end_to, 4);
1626 1647
1627 1648 // Check for and copy trailing word
1628 1649 __ BIND(L_copy_2_bytes);
1629 1650 __ testl(word_count, 1);
1630 1651 __ jccb(Assembler::zero, L_exit);
1631 1652 __ movw(rax, Address(end_from, 8));
1632 1653 __ movw(Address(end_to, 8), rax);
1633 1654
1634 1655 __ BIND(L_exit);
1635 1656 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr);
1636 1657 restore_arg_regs();
1637 1658 __ xorptr(rax, rax); // return 0
1638 1659 __ leave(); // required for proper stackwalking of RuntimeStub frame
1639 1660 __ ret(0);
1640 1661
1641 1662 // Copy in 32-bytes chunks
1642 1663 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1643 1664 __ jmp(L_copy_4_bytes);
1644 1665
1645 1666 return start;
1646 1667 }
1647 1668
1648 1669 address generate_fill(BasicType t, bool aligned, const char *name) {
1649 1670 __ align(CodeEntryAlignment);
1650 1671 StubCodeMark mark(this, "StubRoutines", name);
1651 1672 address start = __ pc();
1652 1673
1653 1674 BLOCK_COMMENT("Entry:");
1654 1675
1655 1676 const Register to = c_rarg0; // source array address
1656 1677 const Register value = c_rarg1; // value
1657 1678 const Register count = c_rarg2; // elements count
1658 1679
1659 1680 __ enter(); // required for proper stackwalking of RuntimeStub frame
1660 1681
1661 1682 __ generate_fill(t, aligned, to, value, count, rax, xmm0);
1662 1683
1663 1684 __ leave(); // required for proper stackwalking of RuntimeStub frame
1664 1685 __ ret(0);
1665 1686 return start;
1666 1687 }
1667 1688
1668 1689 // Arguments:
1669 1690 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1670 1691 // ignored
1671 1692 // name - stub name string
1672 1693 //
1673 1694 // Inputs:
1674 1695 // c_rarg0 - source array address
1675 1696 // c_rarg1 - destination array address
1676 1697 // c_rarg2 - element count, treated as ssize_t, can be zero
1677 1698 //
1678 1699 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1679 1700 // let the hardware handle it. The two or four words within dwords
1680 1701 // or qwords that span cache line boundaries will still be loaded
1681 1702 // and stored atomically.
1682 1703 //
1683 1704 address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
1684 1705 address *entry, const char *name) {
1685 1706 __ align(CodeEntryAlignment);
1686 1707 StubCodeMark mark(this, "StubRoutines", name);
1687 1708 address start = __ pc();
1688 1709
1689 1710 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes;
1690 1711 const Register from = rdi; // source array address
1691 1712 const Register to = rsi; // destination array address
1692 1713 const Register count = rdx; // elements count
1693 1714 const Register word_count = rcx;
1694 1715 const Register qword_count = count;
1695 1716
1696 1717 __ enter(); // required for proper stackwalking of RuntimeStub frame
1697 1718 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1698 1719
1699 1720 if (entry != NULL) {
1700 1721 *entry = __ pc();
1701 1722 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1702 1723 BLOCK_COMMENT("Entry:");
1703 1724 }
1704 1725
1705 1726 array_overlap_test(nooverlap_target, Address::times_2);
1706 1727 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1707 1728 // r9 and r10 may be used to save non-volatile registers
1708 1729
1709 1730 // 'from', 'to' and 'count' are now valid
1710 1731 __ movptr(word_count, count);
1711 1732 __ shrptr(count, 2); // count => qword_count
1712 1733
1713 1734 // Copy from high to low addresses. Use 'to' as scratch.
1714 1735
1715 1736 // Check for and copy trailing word
1716 1737 __ testl(word_count, 1);
1717 1738 __ jccb(Assembler::zero, L_copy_4_bytes);
1718 1739 __ movw(rax, Address(from, word_count, Address::times_2, -2));
1719 1740 __ movw(Address(to, word_count, Address::times_2, -2), rax);
1720 1741
1721 1742 // Check for and copy trailing dword
1722 1743 __ BIND(L_copy_4_bytes);
1723 1744 __ testl(word_count, 2);
1724 1745 __ jcc(Assembler::zero, L_copy_32_bytes);
1725 1746 __ movl(rax, Address(from, qword_count, Address::times_8));
1726 1747 __ movl(Address(to, qword_count, Address::times_8), rax);
1727 1748 __ jmp(L_copy_32_bytes);
1728 1749
1729 1750 // Copy trailing qwords
1730 1751 __ BIND(L_copy_8_bytes);
1731 1752 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1732 1753 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1733 1754 __ decrement(qword_count);
1734 1755 __ jcc(Assembler::notZero, L_copy_8_bytes);
1735 1756
1736 1757 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr);
1737 1758 restore_arg_regs();
1738 1759 __ xorptr(rax, rax); // return 0
1739 1760 __ leave(); // required for proper stackwalking of RuntimeStub frame
1740 1761 __ ret(0);
1741 1762
1742 1763 // Copy in 32-bytes chunks
1743 1764 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1744 1765
1745 1766 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr);
1746 1767 restore_arg_regs();
1747 1768 __ xorptr(rax, rax); // return 0
1748 1769 __ leave(); // required for proper stackwalking of RuntimeStub frame
1749 1770 __ ret(0);
1750 1771
1751 1772 return start;
1752 1773 }
1753 1774
1754 1775 // Arguments:
1755 1776 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1756 1777 // ignored
1757 1778 // is_oop - true => oop array, so generate store check code
1758 1779 // name - stub name string
1759 1780 //
1760 1781 // Inputs:
1761 1782 // c_rarg0 - source array address
1762 1783 // c_rarg1 - destination array address
1763 1784 // c_rarg2 - element count, treated as ssize_t, can be zero
1764 1785 //
1765 1786 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1766 1787 // the hardware handle it. The two dwords within qwords that span
1767 1788 // cache line boundaries will still be loaded and stored atomicly.
1768 1789 //
1769 1790 // Side Effects:
1770 1791 // disjoint_int_copy_entry is set to the no-overlap entry point
1771 1792 // used by generate_conjoint_int_oop_copy().
1772 1793 //
1773 1794 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
1774 1795 const char *name, bool dest_uninitialized = false) {
1775 1796 __ align(CodeEntryAlignment);
1776 1797 StubCodeMark mark(this, "StubRoutines", name);
1777 1798 address start = __ pc();
1778 1799
1779 1800 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
1780 1801 const Register from = rdi; // source array address
1781 1802 const Register to = rsi; // destination array address
1782 1803 const Register count = rdx; // elements count
1783 1804 const Register dword_count = rcx;
1784 1805 const Register qword_count = count;
1785 1806 const Register end_from = from; // source array end address
1786 1807 const Register end_to = to; // destination array end address
1787 1808 const Register saved_to = r11; // saved destination array address
1788 1809 // End pointers are inclusive, and if count is not zero they point
1789 1810 // to the last unit copied: end_to[0] := end_from[0]
1790 1811
1791 1812 __ enter(); // required for proper stackwalking of RuntimeStub frame
1792 1813 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1793 1814
1794 1815 if (entry != NULL) {
1795 1816 *entry = __ pc();
1796 1817 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1797 1818 BLOCK_COMMENT("Entry:");
1798 1819 }
1799 1820
1800 1821 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1801 1822 // r9 and r10 may be used to save non-volatile registers
1802 1823 if (is_oop) {
1803 1824 __ movq(saved_to, to);
1804 1825 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1805 1826 }
1806 1827
1807 1828 // 'from', 'to' and 'count' are now valid
1808 1829 __ movptr(dword_count, count);
1809 1830 __ shrptr(count, 1); // count => qword_count
1810 1831
1811 1832 // Copy from low to high addresses. Use 'to' as scratch.
1812 1833 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1813 1834 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1814 1835 __ negptr(qword_count);
1815 1836 __ jmp(L_copy_32_bytes);
1816 1837
1817 1838 // Copy trailing qwords
1818 1839 __ BIND(L_copy_8_bytes);
1819 1840 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1820 1841 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1821 1842 __ increment(qword_count);
1822 1843 __ jcc(Assembler::notZero, L_copy_8_bytes);
1823 1844
1824 1845 // Check for and copy trailing dword
1825 1846 __ BIND(L_copy_4_bytes);
1826 1847 __ testl(dword_count, 1); // Only byte test since the value is 0 or 1
1827 1848 __ jccb(Assembler::zero, L_exit);
1828 1849 __ movl(rax, Address(end_from, 8));
1829 1850 __ movl(Address(end_to, 8), rax);
1830 1851
1831 1852 __ BIND(L_exit);
1832 1853 if (is_oop) {
1833 1854 __ leaq(end_to, Address(saved_to, dword_count, Address::times_4, -4));
1834 1855 gen_write_ref_array_post_barrier(saved_to, end_to, rax);
1835 1856 }
1836 1857 inc_counter_np(SharedRuntime::_jint_array_copy_ctr);
1837 1858 restore_arg_regs();
1838 1859 __ xorptr(rax, rax); // return 0
1839 1860 __ leave(); // required for proper stackwalking of RuntimeStub frame
1840 1861 __ ret(0);
1841 1862
1842 1863 // Copy 32-bytes chunks
1843 1864 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1844 1865 __ jmp(L_copy_4_bytes);
1845 1866
1846 1867 return start;
1847 1868 }
1848 1869
1849 1870 // Arguments:
1850 1871 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1851 1872 // ignored
1852 1873 // is_oop - true => oop array, so generate store check code
1853 1874 // name - stub name string
1854 1875 //
1855 1876 // Inputs:
1856 1877 // c_rarg0 - source array address
1857 1878 // c_rarg1 - destination array address
1858 1879 // c_rarg2 - element count, treated as ssize_t, can be zero
1859 1880 //
1860 1881 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1861 1882 // the hardware handle it. The two dwords within qwords that span
1862 1883 // cache line boundaries will still be loaded and stored atomicly.
1863 1884 //
1864 1885 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
1865 1886 address *entry, const char *name,
1866 1887 bool dest_uninitialized = false) {
1867 1888 __ align(CodeEntryAlignment);
1868 1889 StubCodeMark mark(this, "StubRoutines", name);
1869 1890 address start = __ pc();
1870 1891
1871 1892 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
1872 1893 const Register from = rdi; // source array address
1873 1894 const Register to = rsi; // destination array address
1874 1895 const Register count = rdx; // elements count
1875 1896 const Register dword_count = rcx;
1876 1897 const Register qword_count = count;
1877 1898
1878 1899 __ enter(); // required for proper stackwalking of RuntimeStub frame
1879 1900 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1880 1901
1881 1902 if (entry != NULL) {
1882 1903 *entry = __ pc();
1883 1904 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1884 1905 BLOCK_COMMENT("Entry:");
1885 1906 }
1886 1907
1887 1908 array_overlap_test(nooverlap_target, Address::times_4);
1888 1909 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1889 1910 // r9 and r10 may be used to save non-volatile registers
1890 1911
1891 1912 if (is_oop) {
1892 1913 // no registers are destroyed by this call
1893 1914 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1894 1915 }
1895 1916
1896 1917 assert_clean_int(count, rax); // Make sure 'count' is clean int.
1897 1918 // 'from', 'to' and 'count' are now valid
1898 1919 __ movptr(dword_count, count);
1899 1920 __ shrptr(count, 1); // count => qword_count
1900 1921
1901 1922 // Copy from high to low addresses. Use 'to' as scratch.
1902 1923
1903 1924 // Check for and copy trailing dword
1904 1925 __ testl(dword_count, 1);
1905 1926 __ jcc(Assembler::zero, L_copy_32_bytes);
1906 1927 __ movl(rax, Address(from, dword_count, Address::times_4, -4));
1907 1928 __ movl(Address(to, dword_count, Address::times_4, -4), rax);
1908 1929 __ jmp(L_copy_32_bytes);
1909 1930
1910 1931 // Copy trailing qwords
1911 1932 __ BIND(L_copy_8_bytes);
1912 1933 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1913 1934 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1914 1935 __ decrement(qword_count);
1915 1936 __ jcc(Assembler::notZero, L_copy_8_bytes);
1916 1937
1917 1938 inc_counter_np(SharedRuntime::_jint_array_copy_ctr);
1918 1939 if (is_oop) {
1919 1940 __ jmp(L_exit);
1920 1941 }
1921 1942 restore_arg_regs();
1922 1943 __ xorptr(rax, rax); // return 0
1923 1944 __ leave(); // required for proper stackwalking of RuntimeStub frame
1924 1945 __ ret(0);
1925 1946
1926 1947 // Copy in 32-bytes chunks
1927 1948 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1928 1949
1929 1950 inc_counter_np(SharedRuntime::_jint_array_copy_ctr);
1930 1951 __ bind(L_exit);
1931 1952 if (is_oop) {
1932 1953 Register end_to = rdx;
1933 1954 __ leaq(end_to, Address(to, dword_count, Address::times_4, -4));
1934 1955 gen_write_ref_array_post_barrier(to, end_to, rax);
1935 1956 }
1936 1957 restore_arg_regs();
1937 1958 __ xorptr(rax, rax); // return 0
1938 1959 __ leave(); // required for proper stackwalking of RuntimeStub frame
1939 1960 __ ret(0);
1940 1961
1941 1962 return start;
1942 1963 }
1943 1964
1944 1965 // Arguments:
1945 1966 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
1946 1967 // ignored
1947 1968 // is_oop - true => oop array, so generate store check code
1948 1969 // name - stub name string
1949 1970 //
1950 1971 // Inputs:
1951 1972 // c_rarg0 - source array address
1952 1973 // c_rarg1 - destination array address
1953 1974 // c_rarg2 - element count, treated as ssize_t, can be zero
1954 1975 //
1955 1976 // Side Effects:
1956 1977 // disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
1957 1978 // no-overlap entry point used by generate_conjoint_long_oop_copy().
1958 1979 //
1959 1980 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
1960 1981 const char *name, bool dest_uninitialized = false) {
1961 1982 __ align(CodeEntryAlignment);
1962 1983 StubCodeMark mark(this, "StubRoutines", name);
1963 1984 address start = __ pc();
1964 1985
1965 1986 Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
1966 1987 const Register from = rdi; // source array address
1967 1988 const Register to = rsi; // destination array address
1968 1989 const Register qword_count = rdx; // elements count
1969 1990 const Register end_from = from; // source array end address
1970 1991 const Register end_to = rcx; // destination array end address
1971 1992 const Register saved_to = to;
1972 1993 // End pointers are inclusive, and if count is not zero they point
1973 1994 // to the last unit copied: end_to[0] := end_from[0]
1974 1995
1975 1996 __ enter(); // required for proper stackwalking of RuntimeStub frame
1976 1997 // Save no-overlap entry point for generate_conjoint_long_oop_copy()
1977 1998 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1978 1999
1979 2000 if (entry != NULL) {
1980 2001 *entry = __ pc();
1981 2002 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1982 2003 BLOCK_COMMENT("Entry:");
1983 2004 }
1984 2005
1985 2006 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1986 2007 // r9 and r10 may be used to save non-volatile registers
1987 2008 // 'from', 'to' and 'qword_count' are now valid
1988 2009 if (is_oop) {
1989 2010 // no registers are destroyed by this call
1990 2011 gen_write_ref_array_pre_barrier(to, qword_count, dest_uninitialized);
1991 2012 }
1992 2013
1993 2014 // Copy from low to high addresses. Use 'to' as scratch.
1994 2015 __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
1995 2016 __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
1996 2017 __ negptr(qword_count);
1997 2018 __ jmp(L_copy_32_bytes);
1998 2019
1999 2020 // Copy trailing qwords
2000 2021 __ BIND(L_copy_8_bytes);
2001 2022 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
2002 2023 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
2003 2024 __ increment(qword_count);
2004 2025 __ jcc(Assembler::notZero, L_copy_8_bytes);
2005 2026
2006 2027 if (is_oop) {
2007 2028 __ jmp(L_exit);
2008 2029 } else {
2009 2030 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
2010 2031 restore_arg_regs();
2011 2032 __ xorptr(rax, rax); // return 0
2012 2033 __ leave(); // required for proper stackwalking of RuntimeStub frame
2013 2034 __ ret(0);
2014 2035 }
2015 2036
2016 2037 // Copy 64-byte chunks
2017 2038 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
2018 2039
2019 2040 if (is_oop) {
2020 2041 __ BIND(L_exit);
2021 2042 gen_write_ref_array_post_barrier(saved_to, end_to, rax);
2022 2043 inc_counter_np(SharedRuntime::_oop_array_copy_ctr);
2023 2044 } else {
2024 2045 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
2025 2046 }
2026 2047 restore_arg_regs();
2027 2048 __ xorptr(rax, rax); // return 0
2028 2049 __ leave(); // required for proper stackwalking of RuntimeStub frame
2029 2050 __ ret(0);
2030 2051
2031 2052 return start;
2032 2053 }
2033 2054
2034 2055 // Arguments:
2035 2056 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
2036 2057 // ignored
2037 2058 // is_oop - true => oop array, so generate store check code
2038 2059 // name - stub name string
2039 2060 //
2040 2061 // Inputs:
2041 2062 // c_rarg0 - source array address
2042 2063 // c_rarg1 - destination array address
2043 2064 // c_rarg2 - element count, treated as ssize_t, can be zero
2044 2065 //
2045 2066 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
2046 2067 address nooverlap_target, address *entry,
2047 2068 const char *name, bool dest_uninitialized = false) {
2048 2069 __ align(CodeEntryAlignment);
2049 2070 StubCodeMark mark(this, "StubRoutines", name);
2050 2071 address start = __ pc();
2051 2072
2052 2073 Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
2053 2074 const Register from = rdi; // source array address
2054 2075 const Register to = rsi; // destination array address
2055 2076 const Register qword_count = rdx; // elements count
2056 2077 const Register saved_count = rcx;
2057 2078
2058 2079 __ enter(); // required for proper stackwalking of RuntimeStub frame
2059 2080 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
2060 2081
2061 2082 if (entry != NULL) {
2062 2083 *entry = __ pc();
2063 2084 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2064 2085 BLOCK_COMMENT("Entry:");
2065 2086 }
2066 2087
2067 2088 array_overlap_test(nooverlap_target, Address::times_8);
2068 2089 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2069 2090 // r9 and r10 may be used to save non-volatile registers
2070 2091 // 'from', 'to' and 'qword_count' are now valid
2071 2092 if (is_oop) {
2072 2093 // Save to and count for store barrier
2073 2094 __ movptr(saved_count, qword_count);
2074 2095 // No registers are destroyed by this call
2075 2096 gen_write_ref_array_pre_barrier(to, saved_count, dest_uninitialized);
2076 2097 }
2077 2098
2078 2099 __ jmp(L_copy_32_bytes);
2079 2100
2080 2101 // Copy trailing qwords
2081 2102 __ BIND(L_copy_8_bytes);
2082 2103 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
2083 2104 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
2084 2105 __ decrement(qword_count);
2085 2106 __ jcc(Assembler::notZero, L_copy_8_bytes);
2086 2107
2087 2108 if (is_oop) {
2088 2109 __ jmp(L_exit);
2089 2110 } else {
2090 2111 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
2091 2112 restore_arg_regs();
2092 2113 __ xorptr(rax, rax); // return 0
2093 2114 __ leave(); // required for proper stackwalking of RuntimeStub frame
2094 2115 __ ret(0);
2095 2116 }
2096 2117
2097 2118 // Copy in 32-bytes chunks
2098 2119 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
2099 2120
2100 2121 if (is_oop) {
2101 2122 __ BIND(L_exit);
2102 2123 __ lea(rcx, Address(to, saved_count, Address::times_8, -8));
2103 2124 gen_write_ref_array_post_barrier(to, rcx, rax);
2104 2125 inc_counter_np(SharedRuntime::_oop_array_copy_ctr);
2105 2126 } else {
2106 2127 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
2107 2128 }
2108 2129 restore_arg_regs();
2109 2130 __ xorptr(rax, rax); // return 0
2110 2131 __ leave(); // required for proper stackwalking of RuntimeStub frame
2111 2132 __ ret(0);
2112 2133
2113 2134 return start;
2114 2135 }
2115 2136
2116 2137
2117 2138 // Helper for generating a dynamic type check.
2118 2139 // Smashes no registers.
2119 2140 void generate_type_check(Register sub_klass,
2120 2141 Register super_check_offset,
2121 2142 Register super_klass,
2122 2143 Label& L_success) {
2123 2144 assert_different_registers(sub_klass, super_check_offset, super_klass);
2124 2145
2125 2146 BLOCK_COMMENT("type_check:");
2126 2147
2127 2148 Label L_miss;
2128 2149
2129 2150 __ check_klass_subtype_fast_path(sub_klass, super_klass, noreg, &L_success, &L_miss, NULL,
2130 2151 super_check_offset);
2131 2152 __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg, &L_success, NULL);
2132 2153
2133 2154 // Fall through on failure!
2134 2155 __ BIND(L_miss);
2135 2156 }
2136 2157
2137 2158 //
2138 2159 // Generate checkcasting array copy stub
2139 2160 //
2140 2161 // Input:
2141 2162 // c_rarg0 - source array address
2142 2163 // c_rarg1 - destination array address
2143 2164 // c_rarg2 - element count, treated as ssize_t, can be zero
2144 2165 // c_rarg3 - size_t ckoff (super_check_offset)
2145 2166 // not Win64
2146 2167 // c_rarg4 - oop ckval (super_klass)
2147 2168 // Win64
2148 2169 // rsp+40 - oop ckval (super_klass)
2149 2170 //
2150 2171 // Output:
2151 2172 // rax == 0 - success
2152 2173 // rax == -1^K - failure, where K is partial transfer count
2153 2174 //
2154 2175 address generate_checkcast_copy(const char *name, address *entry,
2155 2176 bool dest_uninitialized = false) {
2156 2177
2157 2178 Label L_load_element, L_store_element, L_do_card_marks, L_done;
2158 2179
2159 2180 // Input registers (after setup_arg_regs)
2160 2181 const Register from = rdi; // source array address
2161 2182 const Register to = rsi; // destination array address
2162 2183 const Register length = rdx; // elements count
2163 2184 const Register ckoff = rcx; // super_check_offset
2164 2185 const Register ckval = r8; // super_klass
2165 2186
2166 2187 // Registers used as temps (r13, r14 are save-on-entry)
2167 2188 const Register end_from = from; // source array end address
2168 2189 const Register end_to = r13; // destination array end address
2169 2190 const Register count = rdx; // -(count_remaining)
2170 2191 const Register r14_length = r14; // saved copy of length
2171 2192 // End pointers are inclusive, and if length is not zero they point
2172 2193 // to the last unit copied: end_to[0] := end_from[0]
2173 2194
2174 2195 const Register rax_oop = rax; // actual oop copied
2175 2196 const Register r11_klass = r11; // oop._klass
2176 2197
2177 2198 //---------------------------------------------------------------
2178 2199 // Assembler stub will be used for this call to arraycopy
2179 2200 // if the two arrays are subtypes of Object[] but the
2180 2201 // destination array type is not equal to or a supertype
2181 2202 // of the source type. Each element must be separately
2182 2203 // checked.
2183 2204
2184 2205 __ align(CodeEntryAlignment);
2185 2206 StubCodeMark mark(this, "StubRoutines", name);
2186 2207 address start = __ pc();
2187 2208
2188 2209 __ enter(); // required for proper stackwalking of RuntimeStub frame
2189 2210
2190 2211 #ifdef ASSERT
2191 2212 // caller guarantees that the arrays really are different
2192 2213 // otherwise, we would have to make conjoint checks
2193 2214 { Label L;
2194 2215 array_overlap_test(L, TIMES_OOP);
2195 2216 __ stop("checkcast_copy within a single array");
2196 2217 __ bind(L);
2197 2218 }
2198 2219 #endif //ASSERT
2199 2220
2200 2221 setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
2201 2222 // ckoff => rcx, ckval => r8
2202 2223 // r9 and r10 may be used to save non-volatile registers
2203 2224 #ifdef _WIN64
2204 2225 // last argument (#4) is on stack on Win64
2205 2226 __ movptr(ckval, Address(rsp, 6 * wordSize));
2206 2227 #endif
2207 2228
2208 2229 // Caller of this entry point must set up the argument registers.
2209 2230 if (entry != NULL) {
2210 2231 *entry = __ pc();
2211 2232 BLOCK_COMMENT("Entry:");
2212 2233 }
2213 2234
2214 2235 // allocate spill slots for r13, r14
2215 2236 enum {
2216 2237 saved_r13_offset,
2217 2238 saved_r14_offset,
2218 2239 saved_rbp_offset
2219 2240 };
2220 2241 __ subptr(rsp, saved_rbp_offset * wordSize);
2221 2242 __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
2222 2243 __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
2223 2244
2224 2245 // check that int operands are properly extended to size_t
2225 2246 assert_clean_int(length, rax);
2226 2247 assert_clean_int(ckoff, rax);
2227 2248
2228 2249 #ifdef ASSERT
2229 2250 BLOCK_COMMENT("assert consistent ckoff/ckval");
2230 2251 // The ckoff and ckval must be mutually consistent,
2231 2252 // even though caller generates both.
2232 2253 { Label L;
2233 2254 int sco_offset = (klassOopDesc::header_size() * HeapWordSize +
2234 2255 Klass::super_check_offset_offset_in_bytes());
2235 2256 __ cmpl(ckoff, Address(ckval, sco_offset));
2236 2257 __ jcc(Assembler::equal, L);
2237 2258 __ stop("super_check_offset inconsistent");
2238 2259 __ bind(L);
2239 2260 }
2240 2261 #endif //ASSERT
2241 2262
2242 2263 // Loop-invariant addresses. They are exclusive end pointers.
2243 2264 Address end_from_addr(from, length, TIMES_OOP, 0);
2244 2265 Address end_to_addr(to, length, TIMES_OOP, 0);
2245 2266 // Loop-variant addresses. They assume post-incremented count < 0.
2246 2267 Address from_element_addr(end_from, count, TIMES_OOP, 0);
2247 2268 Address to_element_addr(end_to, count, TIMES_OOP, 0);
2248 2269
2249 2270 gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
2250 2271
2251 2272 // Copy from low to high addresses, indexed from the end of each array.
2252 2273 __ lea(end_from, end_from_addr);
2253 2274 __ lea(end_to, end_to_addr);
2254 2275 __ movptr(r14_length, length); // save a copy of the length
2255 2276 assert(length == count, ""); // else fix next line:
2256 2277 __ negptr(count); // negate and test the length
2257 2278 __ jcc(Assembler::notZero, L_load_element);
2258 2279
2259 2280 // Empty array: Nothing to do.
2260 2281 __ xorptr(rax, rax); // return 0 on (trivial) success
2261 2282 __ jmp(L_done);
2262 2283
2263 2284 // ======== begin loop ========
2264 2285 // (Loop is rotated; its entry is L_load_element.)
2265 2286 // Loop control:
2266 2287 // for (count = -count; count != 0; count++)
2267 2288 // Base pointers src, dst are biased by 8*(count-1),to last element.
2268 2289 __ align(OptoLoopAlignment);
2269 2290
2270 2291 __ BIND(L_store_element);
2271 2292 __ store_heap_oop(to_element_addr, rax_oop); // store the oop
2272 2293 __ increment(count); // increment the count toward zero
2273 2294 __ jcc(Assembler::zero, L_do_card_marks);
2274 2295
2275 2296 // ======== loop entry is here ========
2276 2297 __ BIND(L_load_element);
2277 2298 __ load_heap_oop(rax_oop, from_element_addr); // load the oop
2278 2299 __ testptr(rax_oop, rax_oop);
2279 2300 __ jcc(Assembler::zero, L_store_element);
2280 2301
2281 2302 __ load_klass(r11_klass, rax_oop);// query the object klass
2282 2303 generate_type_check(r11_klass, ckoff, ckval, L_store_element);
2283 2304 // ======== end loop ========
2284 2305
2285 2306 // It was a real error; we must depend on the caller to finish the job.
2286 2307 // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
2287 2308 // Emit GC store barriers for the oops we have copied (r14 + rdx),
2288 2309 // and report their number to the caller.
2289 2310 assert_different_registers(rax, r14_length, count, to, end_to, rcx);
2290 2311 __ lea(end_to, to_element_addr);
2291 2312 __ addptr(end_to, -heapOopSize); // make an inclusive end pointer
2292 2313 gen_write_ref_array_post_barrier(to, end_to, rscratch1);
2293 2314 __ movptr(rax, r14_length); // original oops
2294 2315 __ addptr(rax, count); // K = (original - remaining) oops
2295 2316 __ notptr(rax); // report (-1^K) to caller
2296 2317 __ jmp(L_done);
2297 2318
2298 2319 // Come here on success only.
2299 2320 __ BIND(L_do_card_marks);
2300 2321 __ addptr(end_to, -heapOopSize); // make an inclusive end pointer
2301 2322 gen_write_ref_array_post_barrier(to, end_to, rscratch1);
2302 2323 __ xorptr(rax, rax); // return 0 on success
2303 2324
2304 2325 // Common exit point (success or failure).
2305 2326 __ BIND(L_done);
2306 2327 __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
2307 2328 __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
2308 2329 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr);
2309 2330 restore_arg_regs();
2310 2331 __ leave(); // required for proper stackwalking of RuntimeStub frame
2311 2332 __ ret(0);
2312 2333
2313 2334 return start;
2314 2335 }
2315 2336
2316 2337 //
2317 2338 // Generate 'unsafe' array copy stub
2318 2339 // Though just as safe as the other stubs, it takes an unscaled
2319 2340 // size_t argument instead of an element count.
2320 2341 //
2321 2342 // Input:
2322 2343 // c_rarg0 - source array address
2323 2344 // c_rarg1 - destination array address
2324 2345 // c_rarg2 - byte count, treated as ssize_t, can be zero
2325 2346 //
2326 2347 // Examines the alignment of the operands and dispatches
2327 2348 // to a long, int, short, or byte copy loop.
2328 2349 //
2329 2350 address generate_unsafe_copy(const char *name,
2330 2351 address byte_copy_entry, address short_copy_entry,
2331 2352 address int_copy_entry, address long_copy_entry) {
2332 2353
2333 2354 Label L_long_aligned, L_int_aligned, L_short_aligned;
2334 2355
2335 2356 // Input registers (before setup_arg_regs)
2336 2357 const Register from = c_rarg0; // source array address
2337 2358 const Register to = c_rarg1; // destination array address
2338 2359 const Register size = c_rarg2; // byte count (size_t)
2339 2360
2340 2361 // Register used as a temp
2341 2362 const Register bits = rax; // test copy of low bits
2342 2363
2343 2364 __ align(CodeEntryAlignment);
2344 2365 StubCodeMark mark(this, "StubRoutines", name);
2345 2366 address start = __ pc();
2346 2367
2347 2368 __ enter(); // required for proper stackwalking of RuntimeStub frame
2348 2369
2349 2370 // bump this on entry, not on exit:
2350 2371 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
2351 2372
2352 2373 __ mov(bits, from);
2353 2374 __ orptr(bits, to);
2354 2375 __ orptr(bits, size);
2355 2376
2356 2377 __ testb(bits, BytesPerLong-1);
2357 2378 __ jccb(Assembler::zero, L_long_aligned);
2358 2379
2359 2380 __ testb(bits, BytesPerInt-1);
2360 2381 __ jccb(Assembler::zero, L_int_aligned);
2361 2382
2362 2383 __ testb(bits, BytesPerShort-1);
2363 2384 __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
2364 2385
2365 2386 __ BIND(L_short_aligned);
2366 2387 __ shrptr(size, LogBytesPerShort); // size => short_count
2367 2388 __ jump(RuntimeAddress(short_copy_entry));
2368 2389
2369 2390 __ BIND(L_int_aligned);
2370 2391 __ shrptr(size, LogBytesPerInt); // size => int_count
2371 2392 __ jump(RuntimeAddress(int_copy_entry));
2372 2393
2373 2394 __ BIND(L_long_aligned);
2374 2395 __ shrptr(size, LogBytesPerLong); // size => qword_count
2375 2396 __ jump(RuntimeAddress(long_copy_entry));
2376 2397
2377 2398 return start;
2378 2399 }
2379 2400
2380 2401 // Perform range checks on the proposed arraycopy.
2381 2402 // Kills temp, but nothing else.
2382 2403 // Also, clean the sign bits of src_pos and dst_pos.
2383 2404 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
2384 2405 Register src_pos, // source position (c_rarg1)
2385 2406 Register dst, // destination array oo (c_rarg2)
2386 2407 Register dst_pos, // destination position (c_rarg3)
2387 2408 Register length,
2388 2409 Register temp,
2389 2410 Label& L_failed) {
2390 2411 BLOCK_COMMENT("arraycopy_range_checks:");
2391 2412
2392 2413 // if (src_pos + length > arrayOop(src)->length()) FAIL;
2393 2414 __ movl(temp, length);
2394 2415 __ addl(temp, src_pos); // src_pos + length
2395 2416 __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
2396 2417 __ jcc(Assembler::above, L_failed);
2397 2418
2398 2419 // if (dst_pos + length > arrayOop(dst)->length()) FAIL;
2399 2420 __ movl(temp, length);
2400 2421 __ addl(temp, dst_pos); // dst_pos + length
2401 2422 __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
2402 2423 __ jcc(Assembler::above, L_failed);
2403 2424
2404 2425 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
2405 2426 // Move with sign extension can be used since they are positive.
2406 2427 __ movslq(src_pos, src_pos);
2407 2428 __ movslq(dst_pos, dst_pos);
2408 2429
2409 2430 BLOCK_COMMENT("arraycopy_range_checks done");
2410 2431 }
2411 2432
2412 2433 //
2413 2434 // Generate generic array copy stubs
2414 2435 //
2415 2436 // Input:
2416 2437 // c_rarg0 - src oop
2417 2438 // c_rarg1 - src_pos (32-bits)
2418 2439 // c_rarg2 - dst oop
2419 2440 // c_rarg3 - dst_pos (32-bits)
2420 2441 // not Win64
2421 2442 // c_rarg4 - element count (32-bits)
2422 2443 // Win64
2423 2444 // rsp+40 - element count (32-bits)
2424 2445 //
2425 2446 // Output:
2426 2447 // rax == 0 - success
2427 2448 // rax == -1^K - failure, where K is partial transfer count
2428 2449 //
2429 2450 address generate_generic_copy(const char *name,
2430 2451 address byte_copy_entry, address short_copy_entry,
2431 2452 address int_copy_entry, address long_copy_entry,
2432 2453 address oop_copy_entry, address checkcast_copy_entry) {
2433 2454
2434 2455 Label L_failed, L_failed_0, L_objArray;
2435 2456 Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
2436 2457
2437 2458 // Input registers
2438 2459 const Register src = c_rarg0; // source array oop
2439 2460 const Register src_pos = c_rarg1; // source position
2440 2461 const Register dst = c_rarg2; // destination array oop
2441 2462 const Register dst_pos = c_rarg3; // destination position
2442 2463 #ifndef _WIN64
2443 2464 const Register length = c_rarg4;
2444 2465 #else
2445 2466 const Address length(rsp, 6 * wordSize); // elements count is on stack on Win64
2446 2467 #endif
2447 2468
2448 2469 { int modulus = CodeEntryAlignment;
2449 2470 int target = modulus - 5; // 5 = sizeof jmp(L_failed)
2450 2471 int advance = target - (__ offset() % modulus);
2451 2472 if (advance < 0) advance += modulus;
2452 2473 if (advance > 0) __ nop(advance);
2453 2474 }
2454 2475 StubCodeMark mark(this, "StubRoutines", name);
2455 2476
2456 2477 // Short-hop target to L_failed. Makes for denser prologue code.
2457 2478 __ BIND(L_failed_0);
2458 2479 __ jmp(L_failed);
2459 2480 assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
2460 2481
2461 2482 __ align(CodeEntryAlignment);
2462 2483 address start = __ pc();
2463 2484
2464 2485 __ enter(); // required for proper stackwalking of RuntimeStub frame
2465 2486
2466 2487 // bump this on entry, not on exit:
2467 2488 inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
2468 2489
2469 2490 //-----------------------------------------------------------------------
2470 2491 // Assembler stub will be used for this call to arraycopy
2471 2492 // if the following conditions are met:
2472 2493 //
2473 2494 // (1) src and dst must not be null.
2474 2495 // (2) src_pos must not be negative.
2475 2496 // (3) dst_pos must not be negative.
2476 2497 // (4) length must not be negative.
2477 2498 // (5) src klass and dst klass should be the same and not NULL.
2478 2499 // (6) src and dst should be arrays.
2479 2500 // (7) src_pos + length must not exceed length of src.
2480 2501 // (8) dst_pos + length must not exceed length of dst.
2481 2502 //
2482 2503
2483 2504 // if (src == NULL) return -1;
2484 2505 __ testptr(src, src); // src oop
2485 2506 size_t j1off = __ offset();
2486 2507 __ jccb(Assembler::zero, L_failed_0);
2487 2508
2488 2509 // if (src_pos < 0) return -1;
2489 2510 __ testl(src_pos, src_pos); // src_pos (32-bits)
2490 2511 __ jccb(Assembler::negative, L_failed_0);
2491 2512
2492 2513 // if (dst == NULL) return -1;
2493 2514 __ testptr(dst, dst); // dst oop
2494 2515 __ jccb(Assembler::zero, L_failed_0);
2495 2516
2496 2517 // if (dst_pos < 0) return -1;
2497 2518 __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
2498 2519 size_t j4off = __ offset();
2499 2520 __ jccb(Assembler::negative, L_failed_0);
2500 2521
2501 2522 // The first four tests are very dense code,
2502 2523 // but not quite dense enough to put four
2503 2524 // jumps in a 16-byte instruction fetch buffer.
2504 2525 // That's good, because some branch predicters
2505 2526 // do not like jumps so close together.
2506 2527 // Make sure of this.
2507 2528 guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
2508 2529
2509 2530 // registers used as temp
2510 2531 const Register r11_length = r11; // elements count to copy
2511 2532 const Register r10_src_klass = r10; // array klass
2512 2533
2513 2534 // if (length < 0) return -1;
2514 2535 __ movl(r11_length, length); // length (elements count, 32-bits value)
2515 2536 __ testl(r11_length, r11_length);
2516 2537 __ jccb(Assembler::negative, L_failed_0);
2517 2538
2518 2539 __ load_klass(r10_src_klass, src);
2519 2540 #ifdef ASSERT
2520 2541 // assert(src->klass() != NULL);
2521 2542 {
2522 2543 BLOCK_COMMENT("assert klasses not null {");
2523 2544 Label L1, L2;
2524 2545 __ testptr(r10_src_klass, r10_src_klass);
2525 2546 __ jcc(Assembler::notZero, L2); // it is broken if klass is NULL
2526 2547 __ bind(L1);
2527 2548 __ stop("broken null klass");
2528 2549 __ bind(L2);
2529 2550 __ load_klass(rax, dst);
2530 2551 __ cmpq(rax, 0);
2531 2552 __ jcc(Assembler::equal, L1); // this would be broken also
2532 2553 BLOCK_COMMENT("} assert klasses not null done");
2533 2554 }
2534 2555 #endif
2535 2556
2536 2557 // Load layout helper (32-bits)
2537 2558 //
2538 2559 // |array_tag| | header_size | element_type | |log2_element_size|
2539 2560 // 32 30 24 16 8 2 0
2540 2561 //
2541 2562 // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
2542 2563 //
2543 2564
2544 2565 const int lh_offset = klassOopDesc::header_size() * HeapWordSize +
2545 2566 Klass::layout_helper_offset_in_bytes();
2546 2567
2547 2568 // Handle objArrays completely differently...
2548 2569 const jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
2549 2570 __ cmpl(Address(r10_src_klass, lh_offset), objArray_lh);
2550 2571 __ jcc(Assembler::equal, L_objArray);
2551 2572
2552 2573 // if (src->klass() != dst->klass()) return -1;
2553 2574 __ load_klass(rax, dst);
2554 2575 __ cmpq(r10_src_klass, rax);
2555 2576 __ jcc(Assembler::notEqual, L_failed);
2556 2577
2557 2578 const Register rax_lh = rax; // layout helper
2558 2579 __ movl(rax_lh, Address(r10_src_klass, lh_offset));
2559 2580
2560 2581 // if (!src->is_Array()) return -1;
2561 2582 __ cmpl(rax_lh, Klass::_lh_neutral_value);
2562 2583 __ jcc(Assembler::greaterEqual, L_failed);
2563 2584
2564 2585 // At this point, it is known to be a typeArray (array_tag 0x3).
2565 2586 #ifdef ASSERT
2566 2587 {
2567 2588 BLOCK_COMMENT("assert primitive array {");
2568 2589 Label L;
2569 2590 __ cmpl(rax_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
2570 2591 __ jcc(Assembler::greaterEqual, L);
2571 2592 __ stop("must be a primitive array");
2572 2593 __ bind(L);
2573 2594 BLOCK_COMMENT("} assert primitive array done");
2574 2595 }
2575 2596 #endif
2576 2597
2577 2598 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2578 2599 r10, L_failed);
2579 2600
2580 2601 // typeArrayKlass
2581 2602 //
2582 2603 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
2583 2604 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
2584 2605 //
2585 2606
2586 2607 const Register r10_offset = r10; // array offset
2587 2608 const Register rax_elsize = rax_lh; // element size
2588 2609
2589 2610 __ movl(r10_offset, rax_lh);
2590 2611 __ shrl(r10_offset, Klass::_lh_header_size_shift);
2591 2612 __ andptr(r10_offset, Klass::_lh_header_size_mask); // array_offset
2592 2613 __ addptr(src, r10_offset); // src array offset
2593 2614 __ addptr(dst, r10_offset); // dst array offset
2594 2615 BLOCK_COMMENT("choose copy loop based on element size");
2595 2616 __ andl(rax_lh, Klass::_lh_log2_element_size_mask); // rax_lh -> rax_elsize
2596 2617
2597 2618 // next registers should be set before the jump to corresponding stub
2598 2619 const Register from = c_rarg0; // source array address
2599 2620 const Register to = c_rarg1; // destination array address
2600 2621 const Register count = c_rarg2; // elements count
2601 2622
2602 2623 // 'from', 'to', 'count' registers should be set in such order
2603 2624 // since they are the same as 'src', 'src_pos', 'dst'.
2604 2625
2605 2626 __ BIND(L_copy_bytes);
2606 2627 __ cmpl(rax_elsize, 0);
2607 2628 __ jccb(Assembler::notEqual, L_copy_shorts);
2608 2629 __ lea(from, Address(src, src_pos, Address::times_1, 0));// src_addr
2609 2630 __ lea(to, Address(dst, dst_pos, Address::times_1, 0));// dst_addr
2610 2631 __ movl2ptr(count, r11_length); // length
2611 2632 __ jump(RuntimeAddress(byte_copy_entry));
2612 2633
2613 2634 __ BIND(L_copy_shorts);
2614 2635 __ cmpl(rax_elsize, LogBytesPerShort);
2615 2636 __ jccb(Assembler::notEqual, L_copy_ints);
2616 2637 __ lea(from, Address(src, src_pos, Address::times_2, 0));// src_addr
2617 2638 __ lea(to, Address(dst, dst_pos, Address::times_2, 0));// dst_addr
2618 2639 __ movl2ptr(count, r11_length); // length
2619 2640 __ jump(RuntimeAddress(short_copy_entry));
2620 2641
2621 2642 __ BIND(L_copy_ints);
2622 2643 __ cmpl(rax_elsize, LogBytesPerInt);
2623 2644 __ jccb(Assembler::notEqual, L_copy_longs);
2624 2645 __ lea(from, Address(src, src_pos, Address::times_4, 0));// src_addr
2625 2646 __ lea(to, Address(dst, dst_pos, Address::times_4, 0));// dst_addr
2626 2647 __ movl2ptr(count, r11_length); // length
2627 2648 __ jump(RuntimeAddress(int_copy_entry));
2628 2649
2629 2650 __ BIND(L_copy_longs);
2630 2651 #ifdef ASSERT
2631 2652 {
2632 2653 BLOCK_COMMENT("assert long copy {");
2633 2654 Label L;
2634 2655 __ cmpl(rax_elsize, LogBytesPerLong);
2635 2656 __ jcc(Assembler::equal, L);
2636 2657 __ stop("must be long copy, but elsize is wrong");
2637 2658 __ bind(L);
2638 2659 BLOCK_COMMENT("} assert long copy done");
2639 2660 }
2640 2661 #endif
2641 2662 __ lea(from, Address(src, src_pos, Address::times_8, 0));// src_addr
2642 2663 __ lea(to, Address(dst, dst_pos, Address::times_8, 0));// dst_addr
2643 2664 __ movl2ptr(count, r11_length); // length
2644 2665 __ jump(RuntimeAddress(long_copy_entry));
2645 2666
2646 2667 // objArrayKlass
2647 2668 __ BIND(L_objArray);
2648 2669 // live at this point: r10_src_klass, r11_length, src[_pos], dst[_pos]
2649 2670
2650 2671 Label L_plain_copy, L_checkcast_copy;
2651 2672 // test array classes for subtyping
2652 2673 __ load_klass(rax, dst);
2653 2674 __ cmpq(r10_src_klass, rax); // usual case is exact equality
2654 2675 __ jcc(Assembler::notEqual, L_checkcast_copy);
2655 2676
2656 2677 // Identically typed arrays can be copied without element-wise checks.
2657 2678 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2658 2679 r10, L_failed);
2659 2680
2660 2681 __ lea(from, Address(src, src_pos, TIMES_OOP,
2661 2682 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
2662 2683 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2663 2684 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
2664 2685 __ movl2ptr(count, r11_length); // length
2665 2686 __ BIND(L_plain_copy);
2666 2687 __ jump(RuntimeAddress(oop_copy_entry));
2667 2688
2668 2689 __ BIND(L_checkcast_copy);
2669 2690 // live at this point: r10_src_klass, r11_length, rax (dst_klass)
2670 2691 {
2671 2692 // Before looking at dst.length, make sure dst is also an objArray.
2672 2693 __ cmpl(Address(rax, lh_offset), objArray_lh);
2673 2694 __ jcc(Assembler::notEqual, L_failed);
2674 2695
2675 2696 // It is safe to examine both src.length and dst.length.
2676 2697 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2677 2698 rax, L_failed);
2678 2699
2679 2700 const Register r11_dst_klass = r11;
2680 2701 __ load_klass(r11_dst_klass, dst); // reload
2681 2702
2682 2703 // Marshal the base address arguments now, freeing registers.
2683 2704 __ lea(from, Address(src, src_pos, TIMES_OOP,
2684 2705 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2685 2706 __ lea(to, Address(dst, dst_pos, TIMES_OOP,
2686 2707 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2687 2708 __ movl(count, length); // length (reloaded)
2688 2709 Register sco_temp = c_rarg3; // this register is free now
2689 2710 assert_different_registers(from, to, count, sco_temp,
2690 2711 r11_dst_klass, r10_src_klass);
2691 2712 assert_clean_int(count, sco_temp);
2692 2713
2693 2714 // Generate the type check.
2694 2715 const int sco_offset = (klassOopDesc::header_size() * HeapWordSize +
2695 2716 Klass::super_check_offset_offset_in_bytes());
2696 2717 __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
2697 2718 assert_clean_int(sco_temp, rax);
2698 2719 generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
2699 2720
2700 2721 // Fetch destination element klass from the objArrayKlass header.
2701 2722 int ek_offset = (klassOopDesc::header_size() * HeapWordSize +
2702 2723 objArrayKlass::element_klass_offset_in_bytes());
2703 2724 __ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
2704 2725 __ movl( sco_temp, Address(r11_dst_klass, sco_offset));
2705 2726 assert_clean_int(sco_temp, rax);
2706 2727
2707 2728 // the checkcast_copy loop needs two extra arguments:
2708 2729 assert(c_rarg3 == sco_temp, "#3 already in place");
2709 2730 // Set up arguments for checkcast_copy_entry.
2710 2731 setup_arg_regs(4);
2711 2732 __ movptr(r8, r11_dst_klass); // dst.klass.element_klass, r8 is c_rarg4 on Linux/Solaris
2712 2733 __ jump(RuntimeAddress(checkcast_copy_entry));
2713 2734 }
2714 2735
2715 2736 __ BIND(L_failed);
2716 2737 __ xorptr(rax, rax);
2717 2738 __ notptr(rax); // return -1
2718 2739 __ leave(); // required for proper stackwalking of RuntimeStub frame
2719 2740 __ ret(0);
2720 2741
2721 2742 return start;
2722 2743 }
2723 2744
2724 2745 void generate_arraycopy_stubs() {
2725 2746 address entry;
2726 2747 address entry_jbyte_arraycopy;
2727 2748 address entry_jshort_arraycopy;
2728 2749 address entry_jint_arraycopy;
2729 2750 address entry_oop_arraycopy;
2730 2751 address entry_jlong_arraycopy;
2731 2752 address entry_checkcast_arraycopy;
2732 2753
2733 2754 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry,
2734 2755 "jbyte_disjoint_arraycopy");
2735 2756 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, &entry_jbyte_arraycopy,
2736 2757 "jbyte_arraycopy");
2737 2758
2738 2759 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry,
2739 2760 "jshort_disjoint_arraycopy");
2740 2761 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, &entry_jshort_arraycopy,
2741 2762 "jshort_arraycopy");
2742 2763
2743 2764 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, &entry,
2744 2765 "jint_disjoint_arraycopy");
2745 2766 StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, entry,
2746 2767 &entry_jint_arraycopy, "jint_arraycopy");
2747 2768
2748 2769 StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, &entry,
2749 2770 "jlong_disjoint_arraycopy");
2750 2771 StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, entry,
2751 2772 &entry_jlong_arraycopy, "jlong_arraycopy");
2752 2773
2753 2774
2754 2775 if (UseCompressedOops) {
2755 2776 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, &entry,
2756 2777 "oop_disjoint_arraycopy");
2757 2778 StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, entry,
2758 2779 &entry_oop_arraycopy, "oop_arraycopy");
2759 2780 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, &entry,
2760 2781 "oop_disjoint_arraycopy_uninit",
2761 2782 /*dest_uninitialized*/true);
2762 2783 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, entry,
2763 2784 NULL, "oop_arraycopy_uninit",
2764 2785 /*dest_uninitialized*/true);
2765 2786 } else {
2766 2787 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, &entry,
2767 2788 "oop_disjoint_arraycopy");
2768 2789 StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, entry,
2769 2790 &entry_oop_arraycopy, "oop_arraycopy");
2770 2791 StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, &entry,
2771 2792 "oop_disjoint_arraycopy_uninit",
2772 2793 /*dest_uninitialized*/true);
2773 2794 StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, entry,
2774 2795 NULL, "oop_arraycopy_uninit",
2775 2796 /*dest_uninitialized*/true);
2776 2797 }
2777 2798
2778 2799 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
2779 2800 StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL,
2780 2801 /*dest_uninitialized*/true);
2781 2802
2782 2803 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy",
2783 2804 entry_jbyte_arraycopy,
2784 2805 entry_jshort_arraycopy,
2785 2806 entry_jint_arraycopy,
2786 2807 entry_jlong_arraycopy);
2787 2808 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy",
2788 2809 entry_jbyte_arraycopy,
2789 2810 entry_jshort_arraycopy,
2790 2811 entry_jint_arraycopy,
2791 2812 entry_oop_arraycopy,
2792 2813 entry_jlong_arraycopy,
2793 2814 entry_checkcast_arraycopy);
2794 2815
2795 2816 StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
2796 2817 StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
2797 2818 StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
2798 2819 StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
2799 2820 StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
2800 2821 StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
2801 2822
2802 2823 // We don't generate specialized code for HeapWord-aligned source
2803 2824 // arrays, so just use the code we've already generated
2804 2825 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = StubRoutines::_jbyte_disjoint_arraycopy;
2805 2826 StubRoutines::_arrayof_jbyte_arraycopy = StubRoutines::_jbyte_arraycopy;
2806 2827
2807 2828 StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
2808 2829 StubRoutines::_arrayof_jshort_arraycopy = StubRoutines::_jshort_arraycopy;
2809 2830
2810 2831 StubRoutines::_arrayof_jint_disjoint_arraycopy = StubRoutines::_jint_disjoint_arraycopy;
2811 2832 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
2812 2833
2813 2834 StubRoutines::_arrayof_jlong_disjoint_arraycopy = StubRoutines::_jlong_disjoint_arraycopy;
2814 2835 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
2815 2836
2816 2837 StubRoutines::_arrayof_oop_disjoint_arraycopy = StubRoutines::_oop_disjoint_arraycopy;
2817 2838 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
2818 2839
2819 2840 StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
2820 2841 StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
2821 2842 }
2822 2843
2823 2844 void generate_math_stubs() {
2824 2845 {
2825 2846 StubCodeMark mark(this, "StubRoutines", "log");
2826 2847 StubRoutines::_intrinsic_log = (double (*)(double)) __ pc();
2827 2848
2828 2849 __ subq(rsp, 8);
2829 2850 __ movdbl(Address(rsp, 0), xmm0);
2830 2851 __ fld_d(Address(rsp, 0));
2831 2852 __ flog();
2832 2853 __ fstp_d(Address(rsp, 0));
2833 2854 __ movdbl(xmm0, Address(rsp, 0));
2834 2855 __ addq(rsp, 8);
2835 2856 __ ret(0);
2836 2857 }
2837 2858 {
2838 2859 StubCodeMark mark(this, "StubRoutines", "log10");
2839 2860 StubRoutines::_intrinsic_log10 = (double (*)(double)) __ pc();
2840 2861
2841 2862 __ subq(rsp, 8);
2842 2863 __ movdbl(Address(rsp, 0), xmm0);
2843 2864 __ fld_d(Address(rsp, 0));
2844 2865 __ flog10();
2845 2866 __ fstp_d(Address(rsp, 0));
2846 2867 __ movdbl(xmm0, Address(rsp, 0));
2847 2868 __ addq(rsp, 8);
2848 2869 __ ret(0);
2849 2870 }
2850 2871 {
2851 2872 StubCodeMark mark(this, "StubRoutines", "sin");
2852 2873 StubRoutines::_intrinsic_sin = (double (*)(double)) __ pc();
2853 2874
2854 2875 __ subq(rsp, 8);
2855 2876 __ movdbl(Address(rsp, 0), xmm0);
2856 2877 __ fld_d(Address(rsp, 0));
2857 2878 __ trigfunc('s');
2858 2879 __ fstp_d(Address(rsp, 0));
2859 2880 __ movdbl(xmm0, Address(rsp, 0));
2860 2881 __ addq(rsp, 8);
2861 2882 __ ret(0);
2862 2883 }
2863 2884 {
2864 2885 StubCodeMark mark(this, "StubRoutines", "cos");
2865 2886 StubRoutines::_intrinsic_cos = (double (*)(double)) __ pc();
2866 2887
2867 2888 __ subq(rsp, 8);
2868 2889 __ movdbl(Address(rsp, 0), xmm0);
2869 2890 __ fld_d(Address(rsp, 0));
2870 2891 __ trigfunc('c');
2871 2892 __ fstp_d(Address(rsp, 0));
2872 2893 __ movdbl(xmm0, Address(rsp, 0));
2873 2894 __ addq(rsp, 8);
2874 2895 __ ret(0);
2875 2896 }
2876 2897 {
2877 2898 StubCodeMark mark(this, "StubRoutines", "tan");
2878 2899 StubRoutines::_intrinsic_tan = (double (*)(double)) __ pc();
2879 2900
2880 2901 __ subq(rsp, 8);
2881 2902 __ movdbl(Address(rsp, 0), xmm0);
2882 2903 __ fld_d(Address(rsp, 0));
2883 2904 __ trigfunc('t');
2884 2905 __ fstp_d(Address(rsp, 0));
2885 2906 __ movdbl(xmm0, Address(rsp, 0));
2886 2907 __ addq(rsp, 8);
2887 2908 __ ret(0);
2888 2909 }
2889 2910
2890 2911 // The intrinsic version of these seem to return the same value as
2891 2912 // the strict version.
2892 2913 StubRoutines::_intrinsic_exp = SharedRuntime::dexp;
2893 2914 StubRoutines::_intrinsic_pow = SharedRuntime::dpow;
2894 2915 }
2895 2916
2896 2917 #undef __
2897 2918 #define __ masm->
2898 2919
2899 2920 // Continuation point for throwing of implicit exceptions that are
2900 2921 // not handled in the current activation. Fabricates an exception
2901 2922 // oop and initiates normal exception dispatching in this
2902 2923 // frame. Since we need to preserve callee-saved values (currently
2903 2924 // only for C2, but done for C1 as well) we need a callee-saved oop
2904 2925 // map and therefore have to make these stubs into RuntimeStubs
2905 2926 // rather than BufferBlobs. If the compiler needs all registers to
2906 2927 // be preserved between the fault point and the exception handler
2907 2928 // then it must assume responsibility for that in
2908 2929 // AbstractCompiler::continuation_for_implicit_null_exception or
2909 2930 // continuation_for_implicit_division_by_zero_exception. All other
2910 2931 // implicit exceptions (e.g., NullPointerException or
2911 2932 // AbstractMethodError on entry) are either at call sites or
2912 2933 // otherwise assume that stack unwinding will be initiated, so
2913 2934 // caller saved registers were assumed volatile in the compiler.
2914 2935 address generate_throw_exception(const char* name,
2915 2936 address runtime_entry,
2916 2937 bool restore_saved_exception_pc) {
2917 2938 // Information about frame layout at time of blocking runtime call.
2918 2939 // Note that we only have to preserve callee-saved registers since
2919 2940 // the compilers are responsible for supplying a continuation point
2920 2941 // if they expect all registers to be preserved.
2921 2942 enum layout {
2922 2943 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
2923 2944 rbp_off2,
2924 2945 return_off,
2925 2946 return_off2,
2926 2947 framesize // inclusive of return address
2927 2948 };
2928 2949
2929 2950 int insts_size = 512;
2930 2951 int locs_size = 64;
2931 2952
2932 2953 CodeBuffer code(name, insts_size, locs_size);
2933 2954 OopMapSet* oop_maps = new OopMapSet();
2934 2955 MacroAssembler* masm = new MacroAssembler(&code);
2935 2956
2936 2957 address start = __ pc();
2937 2958
2938 2959 // This is an inlined and slightly modified version of call_VM
2939 2960 // which has the ability to fetch the return PC out of
2940 2961 // thread-local storage and also sets up last_Java_sp slightly
2941 2962 // differently than the real call_VM
2942 2963 if (restore_saved_exception_pc) {
2943 2964 __ movptr(rax,
2944 2965 Address(r15_thread,
2945 2966 in_bytes(JavaThread::saved_exception_pc_offset())));
2946 2967 __ push(rax);
2947 2968 }
2948 2969
2949 2970 __ enter(); // required for proper stackwalking of RuntimeStub frame
2950 2971
2951 2972 assert(is_even(framesize/2), "sp not 16-byte aligned");
2952 2973
2953 2974 // return address and rbp are already in place
2954 2975 __ subptr(rsp, (framesize-4) << LogBytesPerInt); // prolog
2955 2976
2956 2977 int frame_complete = __ pc() - start;
2957 2978
2958 2979 // Set up last_Java_sp and last_Java_fp
2959 2980 __ set_last_Java_frame(rsp, rbp, NULL);
2960 2981
2961 2982 // Call runtime
2962 2983 __ movptr(c_rarg0, r15_thread);
2963 2984 BLOCK_COMMENT("call runtime_entry");
2964 2985 __ call(RuntimeAddress(runtime_entry));
2965 2986
2966 2987 // Generate oop map
2967 2988 OopMap* map = new OopMap(framesize, 0);
2968 2989
2969 2990 oop_maps->add_gc_map(__ pc() - start, map);
2970 2991
2971 2992 __ reset_last_Java_frame(true, false);
2972 2993
2973 2994 __ leave(); // required for proper stackwalking of RuntimeStub frame
2974 2995
2975 2996 // check for pending exceptions
2976 2997 #ifdef ASSERT
2977 2998 Label L;
2978 2999 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()),
2979 3000 (int32_t) NULL_WORD);
2980 3001 __ jcc(Assembler::notEqual, L);
2981 3002 __ should_not_reach_here();
2982 3003 __ bind(L);
2983 3004 #endif // ASSERT
2984 3005 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2985 3006
2986 3007
2987 3008 // codeBlob framesize is in words (not VMRegImpl::slot_size)
2988 3009 RuntimeStub* stub =
2989 3010 RuntimeStub::new_runtime_stub(name,
2990 3011 &code,
2991 3012 frame_complete,
2992 3013 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2993 3014 oop_maps, false);
2994 3015 return stub->entry_point();
2995 3016 }
2996 3017
2997 3018 // Initialization
2998 3019 void generate_initial() {
2999 3020 // Generates all stubs and initializes the entry points
3000 3021
3001 3022 // This platform-specific stub is needed by generate_call_stub()
3002 3023 StubRoutines::x86::_mxcsr_std = generate_fp_mask("mxcsr_std", 0x0000000000001F80);
3003 3024
3004 3025 // entry points that exist in all platforms Note: This is code
3005 3026 // that could be shared among different platforms - however the
3006 3027 // benefit seems to be smaller than the disadvantage of having a
3007 3028 // much more complicated generator structure. See also comment in
3008 3029 // stubRoutines.hpp.
3009 3030
3010 3031 StubRoutines::_forward_exception_entry = generate_forward_exception();
3011 3032
3012 3033 StubRoutines::_call_stub_entry =
3013 3034 generate_call_stub(StubRoutines::_call_stub_return_address);
3014 3035
3015 3036 // is referenced by megamorphic call
3016 3037 StubRoutines::_catch_exception_entry = generate_catch_exception();
3017 3038
3018 3039 // atomic calls
3019 3040 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg();
3020 3041 StubRoutines::_atomic_xchg_ptr_entry = generate_atomic_xchg_ptr();
3021 3042 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg();
3022 3043 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long();
3023 3044 StubRoutines::_atomic_add_entry = generate_atomic_add();
3024 3045 StubRoutines::_atomic_add_ptr_entry = generate_atomic_add_ptr();
3025 3046 StubRoutines::_fence_entry = generate_orderaccess_fence();
3026 3047
3027 3048 StubRoutines::_handler_for_unsafe_access_entry =
3028 3049 generate_handler_for_unsafe_access();
3029 3050
3030 3051 // platform dependent
3031 3052 StubRoutines::x86::_get_previous_fp_entry = generate_get_previous_fp();
3032 3053
3033 3054 StubRoutines::x86::_verify_mxcsr_entry = generate_verify_mxcsr();
3034 3055 }
3035 3056
3036 3057 void generate_all() {
3037 3058 // Generates all stubs and initializes the entry points
3038 3059
3039 3060 // These entry points require SharedInfo::stack0 to be set up in
3040 3061 // non-core builds and need to be relocatable, so they each
3041 3062 // fabricate a RuntimeStub internally.
3042 3063 StubRoutines::_throw_AbstractMethodError_entry =
3043 3064 generate_throw_exception("AbstractMethodError throw_exception",
3044 3065 CAST_FROM_FN_PTR(address,
3045 3066 SharedRuntime::
3046 3067 throw_AbstractMethodError),
3047 3068 false);
3048 3069
3049 3070 StubRoutines::_throw_IncompatibleClassChangeError_entry =
3050 3071 generate_throw_exception("IncompatibleClassChangeError throw_exception",
3051 3072 CAST_FROM_FN_PTR(address,
3052 3073 SharedRuntime::
3053 3074 throw_IncompatibleClassChangeError),
3054 3075 false);
3055 3076
3056 3077 StubRoutines::_throw_ArithmeticException_entry =
3057 3078 generate_throw_exception("ArithmeticException throw_exception",
3058 3079 CAST_FROM_FN_PTR(address,
3059 3080 SharedRuntime::
3060 3081 throw_ArithmeticException),
3061 3082 true);
3062 3083
3063 3084 StubRoutines::_throw_NullPointerException_entry =
3064 3085 generate_throw_exception("NullPointerException throw_exception",
3065 3086 CAST_FROM_FN_PTR(address,
3066 3087 SharedRuntime::
3067 3088 throw_NullPointerException),
3068 3089 true);
3069 3090
3070 3091 StubRoutines::_throw_NullPointerException_at_call_entry =
3071 3092 generate_throw_exception("NullPointerException at call throw_exception",
3072 3093 CAST_FROM_FN_PTR(address,
3073 3094 SharedRuntime::
3074 3095 throw_NullPointerException_at_call),
3075 3096 false);
3076 3097
3077 3098 StubRoutines::_throw_StackOverflowError_entry =
3078 3099 generate_throw_exception("StackOverflowError throw_exception",
3079 3100 CAST_FROM_FN_PTR(address,
3080 3101 SharedRuntime::
3081 3102 throw_StackOverflowError),
3082 3103 false);
3083 3104
3084 3105 // entry points that are platform specific
3085 3106 StubRoutines::x86::_f2i_fixup = generate_f2i_fixup();
3086 3107 StubRoutines::x86::_f2l_fixup = generate_f2l_fixup();
3087 3108 StubRoutines::x86::_d2i_fixup = generate_d2i_fixup();
3088 3109 StubRoutines::x86::_d2l_fixup = generate_d2l_fixup();
3089 3110
3090 3111 StubRoutines::x86::_float_sign_mask = generate_fp_mask("float_sign_mask", 0x7FFFFFFF7FFFFFFF);
3091 3112 StubRoutines::x86::_float_sign_flip = generate_fp_mask("float_sign_flip", 0x8000000080000000);
3092 3113 StubRoutines::x86::_double_sign_mask = generate_fp_mask("double_sign_mask", 0x7FFFFFFFFFFFFFFF);
3093 3114 StubRoutines::x86::_double_sign_flip = generate_fp_mask("double_sign_flip", 0x8000000000000000);
3094 3115
3095 3116 // support for verify_oop (must happen after universe_init)
3096 3117 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
3097 3118
3098 3119 // arraycopy stubs used by compilers
3099 3120 generate_arraycopy_stubs();
3100 3121
3101 3122 generate_math_stubs();
3102 3123 }
3103 3124
3104 3125 public:
3105 3126 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
3106 3127 if (all) {
3107 3128 generate_all();
3108 3129 } else {
3109 3130 generate_initial();
3110 3131 }
3111 3132 }
3112 3133 }; // end class declaration
3113 3134
3114 3135 void StubGenerator_generate(CodeBuffer* code, bool all) {
3115 3136 StubGenerator g(code, all);
3116 3137 }
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