src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp

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 204 #ifdef _LP64
 205     if (index_opr->type() == T_INT) {
 206       LIR_Opr tmp = new_register(T_LONG);
 207       __ convert(Bytecodes::_i2l, index_opr, tmp);
 208       index_opr = tmp;
 209     }
 210 #endif
 211 
 212     base_opr = new_pointer_register();
 213     assert (index_opr->is_register(), "Must be register");
 214     if (shift > 0) {
 215       __ shift_left(index_opr, shift, base_opr);
 216       __ add(base_opr, array_opr, base_opr);
 217     } else {
 218       __ add(index_opr, array_opr, base_opr);
 219     }
 220   }
 221   if (needs_card_mark) {
 222     LIR_Opr ptr = new_pointer_register();
 223     __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
 224     return new LIR_Address(ptr, 0, type);
 225   } else {
 226     return new LIR_Address(base_opr, offset, type);
 227   }
 228 }
 229 
 230 
 231 void LIRGenerator::increment_counter(address counter, int step) {
 232   LIR_Opr pointer = new_pointer_register();
 233   __ move(LIR_OprFact::intptrConst(counter), pointer);
 234   LIR_Address* addr = new LIR_Address(pointer, 0, T_INT);
 235   increment_counter(addr, step);
 236 }
 237 
 238 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 239   LIR_Opr temp = new_register(T_INT);
 240   __ move(addr, temp);
 241   LIR_Opr c = LIR_OprFact::intConst(step);
 242   if (Assembler::is_simm13(step)) {
 243     __ add(temp, c, temp);
 244   } else {
 245     LIR_Opr temp2 = new_register(T_INT);
 246     __ move(c, temp2);
 247     __ add(temp, temp2, temp);
 248   }
 249   __ move(temp, addr);
 250 }
 251 
 252 
 253 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 254   LIR_Opr o7opr = FrameMap::O7_opr;


1142 
1143 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1144                                      BasicType type, bool is_volatile) {
1145   LIR_Opr base_op = src;
1146   LIR_Opr index_op = offset;
1147 
1148   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1149 #ifndef _LP64
1150   if (is_volatile && type == T_LONG) {
1151     __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1152   } else
1153 #endif
1154     {
1155       if (type == T_BOOLEAN) {
1156         type = T_BYTE;
1157       }
1158       LIR_Address* addr;
1159       if (type == T_ARRAY || type == T_OBJECT) {
1160         LIR_Opr tmp = new_pointer_register();
1161         __ add(base_op, index_op, tmp);
1162         addr = new LIR_Address(tmp, 0, type);
1163       } else {
1164         addr = new LIR_Address(base_op, index_op, type);
1165       }
1166 
1167       if (is_obj) {
1168         pre_barrier(LIR_OprFact::address(addr), false, NULL);
1169         // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1170       }
1171       __ move(data, addr);
1172       if (is_obj) {
1173         // This address is precise
1174         post_barrier(LIR_OprFact::address(addr), data);
1175       }
1176     }
1177 }
1178 
1179 
1180 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1181                                      BasicType type, bool is_volatile) {
1182 #ifndef _LP64


 204 #ifdef _LP64
 205     if (index_opr->type() == T_INT) {
 206       LIR_Opr tmp = new_register(T_LONG);
 207       __ convert(Bytecodes::_i2l, index_opr, tmp);
 208       index_opr = tmp;
 209     }
 210 #endif
 211 
 212     base_opr = new_pointer_register();
 213     assert (index_opr->is_register(), "Must be register");
 214     if (shift > 0) {
 215       __ shift_left(index_opr, shift, base_opr);
 216       __ add(base_opr, array_opr, base_opr);
 217     } else {
 218       __ add(index_opr, array_opr, base_opr);
 219     }
 220   }
 221   if (needs_card_mark) {
 222     LIR_Opr ptr = new_pointer_register();
 223     __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
 224     return new LIR_Address(ptr, (intx)0, type);
 225   } else {
 226     return new LIR_Address(base_opr, offset, type);
 227   }
 228 }
 229 
 230 
 231 void LIRGenerator::increment_counter(address counter, int step) {
 232   LIR_Opr pointer = new_pointer_register();
 233   __ move(LIR_OprFact::intptrConst(counter), pointer);
 234   LIR_Address* addr = new LIR_Address(pointer, (intx)0, T_INT);
 235   increment_counter(addr, step);
 236 }
 237 
 238 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 239   LIR_Opr temp = new_register(T_INT);
 240   __ move(addr, temp);
 241   LIR_Opr c = LIR_OprFact::intConst(step);
 242   if (Assembler::is_simm13(step)) {
 243     __ add(temp, c, temp);
 244   } else {
 245     LIR_Opr temp2 = new_register(T_INT);
 246     __ move(c, temp2);
 247     __ add(temp, temp2, temp);
 248   }
 249   __ move(temp, addr);
 250 }
 251 
 252 
 253 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 254   LIR_Opr o7opr = FrameMap::O7_opr;


1142 
1143 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1144                                      BasicType type, bool is_volatile) {
1145   LIR_Opr base_op = src;
1146   LIR_Opr index_op = offset;
1147 
1148   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1149 #ifndef _LP64
1150   if (is_volatile && type == T_LONG) {
1151     __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1152   } else
1153 #endif
1154     {
1155       if (type == T_BOOLEAN) {
1156         type = T_BYTE;
1157       }
1158       LIR_Address* addr;
1159       if (type == T_ARRAY || type == T_OBJECT) {
1160         LIR_Opr tmp = new_pointer_register();
1161         __ add(base_op, index_op, tmp);
1162         addr = new LIR_Address(tmp, (intx)0, type);
1163       } else {
1164         addr = new LIR_Address(base_op, index_op, type);
1165       }
1166 
1167       if (is_obj) {
1168         pre_barrier(LIR_OprFact::address(addr), false, NULL);
1169         // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1170       }
1171       __ move(data, addr);
1172       if (is_obj) {
1173         // This address is precise
1174         post_barrier(LIR_OprFact::address(addr), data);
1175       }
1176     }
1177 }
1178 
1179 
1180 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1181                                      BasicType type, bool is_volatile) {
1182 #ifndef _LP64