1 /*
   2  * Copyright 2005-2009 Sun Microsystems, Inc.  All Rights Reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
  20  * CA 95054 USA or visit www.sun.com if you need additional information or
  21  * have any questions.
  22  *
  23  */
  24 
  25 # include "incls/_precompiled.incl"
  26 # include "incls/_c1_LIRGenerator_x86.cpp.incl"
  27 
  28 #ifdef ASSERT
  29 #define __ gen()->lir(__FILE__, __LINE__)->
  30 #else
  31 #define __ gen()->lir()->
  32 #endif
  33 
  34 // Item will be loaded into a byte register; Intel only
  35 void LIRItem::load_byte_item() {
  36   load_item();
  37   LIR_Opr res = result();
  38 
  39   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  40     // make sure that it is a byte register
  41     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  42            "can't load floats in byte register");
  43     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  44     __ move(res, reg);
  45 
  46     _result = reg;
  47   }
  48 }
  49 
  50 
  51 void LIRItem::load_nonconstant() {
  52   LIR_Opr r = value()->operand();
  53   if (r->is_constant()) {
  54     _result = r;
  55   } else {
  56     load_item();
  57   }
  58 }
  59 
  60 //--------------------------------------------------------------
  61 //               LIRGenerator
  62 //--------------------------------------------------------------
  63 
  64 
  65 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  66 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  67 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  68 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  69 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  70 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  71 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  72 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  73 
  74 
  75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  76   LIR_Opr opr;
  77   switch (type->tag()) {
  78     case intTag:     opr = FrameMap::rax_opr;          break;
  79     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  80     case longTag:    opr = FrameMap::long0_opr;        break;
  81     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  82     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  83 
  84     case addressTag:
  85     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  86   }
  87 
  88   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
  89   return opr;
  90 }
  91 
  92 
  93 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
  94   LIR_Opr reg = new_register(T_INT);
  95   set_vreg_flag(reg, LIRGenerator::byte_reg);
  96   return reg;
  97 }
  98 
  99 
 100 //--------- loading items into registers --------------------------------
 101 
 102 
 103 // i486 instructions can inline constants
 104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 105   if (type == T_SHORT || type == T_CHAR) {
 106     // there is no immediate move of word values in asembler_i486.?pp
 107     return false;
 108   }
 109   Constant* c = v->as_Constant();
 110   if (c && c->state() == NULL) {
 111     // constants of any type can be stored directly, except for
 112     // unloaded object constants.
 113     return true;
 114   }
 115   return false;
 116 }
 117 
 118 
 119 bool LIRGenerator::can_inline_as_constant(Value v) const {
 120   if (v->type()->tag() == longTag) return false;
 121   return v->type()->tag() != objectTag ||
 122     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 123 }
 124 
 125 
 126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 127   if (c->type() == T_LONG) return false;
 128   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 129 }
 130 
 131 
 132 LIR_Opr LIRGenerator::safepoint_poll_register() {
 133   return LIR_OprFact::illegalOpr;
 134 }
 135 
 136 
 137 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 138                                             int shift, int disp, BasicType type) {
 139   assert(base->is_register(), "must be");
 140   if (index->is_constant()) {
 141     return new LIR_Address(base,
 142                            (index->as_constant_ptr()->as_jint() << shift) + disp,
 143                            type);
 144   } else {
 145     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 146   }
 147 }
 148 
 149 
 150 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 151                                               BasicType type, bool needs_card_mark) {
 152   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 153 
 154   LIR_Address* addr;
 155   if (index_opr->is_constant()) {
 156     int elem_size = type2aelembytes(type);
 157     addr = new LIR_Address(array_opr,
 158                            offset_in_bytes + index_opr->as_jint() * elem_size, type);
 159   } else {
 160 #ifdef _LP64
 161     if (index_opr->type() == T_INT) {
 162       LIR_Opr tmp = new_register(T_LONG);
 163       __ convert(Bytecodes::_i2l, index_opr, tmp);
 164       index_opr = tmp;
 165     }
 166 #endif // _LP64
 167     addr =  new LIR_Address(array_opr,
 168                             index_opr,
 169                             LIR_Address::scale(type),
 170                             offset_in_bytes, type);
 171   }
 172   if (needs_card_mark) {
 173     // This store will need a precise card mark, so go ahead and
 174     // compute the full adddres instead of computing once for the
 175     // store and again for the card mark.
 176     LIR_Opr tmp = new_pointer_register();
 177     __ leal(LIR_OprFact::address(addr), tmp);
 178     return new LIR_Address(tmp, (intx)0, type);
 179   } else {
 180     return addr;
 181   }
 182 }
 183 
 184 
 185 void LIRGenerator::increment_counter(address counter, int step) {
 186   LIR_Opr pointer = new_pointer_register();
 187   __ move(LIR_OprFact::intptrConst(counter), pointer);
 188   LIR_Address* addr = new LIR_Address(pointer, (intx)0, T_INT);
 189   increment_counter(addr, step);
 190 }
 191 
 192 
 193 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 194   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 195 }
 196 
 197 
 198 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 199   __ cmp_mem_int(condition, base, disp, c, info);
 200 }
 201 
 202 
 203 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 204   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 205 }
 206 
 207 
 208 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 209   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 210 }
 211 
 212 
 213 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 214   if (tmp->is_valid()) {
 215     if (is_power_of_2(c + 1)) {
 216       __ move(left, tmp);
 217       __ shift_left(left, log2_intptr(c + 1), left);
 218       __ sub(left, tmp, result);
 219       return true;
 220     } else if (is_power_of_2(c - 1)) {
 221       __ move(left, tmp);
 222       __ shift_left(left, log2_intptr(c - 1), left);
 223       __ add(left, tmp, result);
 224       return true;
 225     }
 226   }
 227   return false;
 228 }
 229 
 230 
 231 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 232   BasicType type = item->type();
 233   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 234 }
 235 
 236 //----------------------------------------------------------------------
 237 //             visitor functions
 238 //----------------------------------------------------------------------
 239 
 240 
 241 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 242   assert(x->is_root(),"");
 243   bool needs_range_check = true;
 244   bool use_length = x->length() != NULL;
 245   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 246   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 247                                          !get_jobject_constant(x->value())->is_null_object());
 248 
 249   LIRItem array(x->array(), this);
 250   LIRItem index(x->index(), this);
 251   LIRItem value(x->value(), this);
 252   LIRItem length(this);
 253 
 254   array.load_item();
 255   index.load_nonconstant();
 256 
 257   if (use_length) {
 258     needs_range_check = x->compute_needs_range_check();
 259     if (needs_range_check) {
 260       length.set_instruction(x->length());
 261       length.load_item();
 262     }
 263   }
 264   if (needs_store_check) {
 265     value.load_item();
 266   } else {
 267     value.load_for_store(x->elt_type());
 268   }
 269 
 270   set_no_result(x);
 271 
 272   // the CodeEmitInfo must be duplicated for each different
 273   // LIR-instruction because spilling can occur anywhere between two
 274   // instructions and so the debug information must be different
 275   CodeEmitInfo* range_check_info = state_for(x);
 276   CodeEmitInfo* null_check_info = NULL;
 277   if (x->needs_null_check()) {
 278     null_check_info = new CodeEmitInfo(range_check_info);
 279   }
 280 
 281   // emit array address setup early so it schedules better
 282   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 283 
 284   if (GenerateRangeChecks && needs_range_check) {
 285     if (use_length) {
 286       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 287       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 288     } else {
 289       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 290       // range_check also does the null check
 291       null_check_info = NULL;
 292     }
 293   }
 294 
 295   if (GenerateArrayStoreCheck && needs_store_check) {
 296     LIR_Opr tmp1 = new_register(objectType);
 297     LIR_Opr tmp2 = new_register(objectType);
 298     LIR_Opr tmp3 = new_register(objectType);
 299 
 300     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 301     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info);
 302   }
 303 
 304   if (obj_store) {
 305     // Needs GC write barriers.
 306     pre_barrier(LIR_OprFact::address(array_addr), false, NULL);
 307     __ move(value.result(), array_addr, null_check_info);
 308     // Seems to be a precise
 309     post_barrier(LIR_OprFact::address(array_addr), value.result());
 310   } else {
 311     __ move(value.result(), array_addr, null_check_info);
 312   }
 313 }
 314 
 315 
 316 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 317   assert(x->is_root(),"");
 318   LIRItem obj(x->obj(), this);
 319   obj.load_item();
 320 
 321   set_no_result(x);
 322 
 323   // "lock" stores the address of the monitor stack slot, so this is not an oop
 324   LIR_Opr lock = new_register(T_INT);
 325   // Need a scratch register for biased locking on x86
 326   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 327   if (UseBiasedLocking) {
 328     scratch = new_register(T_INT);
 329   }
 330 
 331   CodeEmitInfo* info_for_exception = NULL;
 332   if (x->needs_null_check()) {
 333     info_for_exception = state_for(x, x->lock_stack_before());
 334   }
 335   // this CodeEmitInfo must not have the xhandlers because here the
 336   // object is already locked (xhandlers expect object to be unlocked)
 337   CodeEmitInfo* info = state_for(x, x->state(), true);
 338   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 339                         x->monitor_no(), info_for_exception, info);
 340 }
 341 
 342 
 343 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 344   assert(x->is_root(),"");
 345 
 346   LIRItem obj(x->obj(), this);
 347   obj.dont_load_item();
 348 
 349   LIR_Opr lock = new_register(T_INT);
 350   LIR_Opr obj_temp = new_register(T_INT);
 351   set_no_result(x);
 352   monitor_exit(obj_temp, lock, syncTempOpr(), x->monitor_no());
 353 }
 354 
 355 
 356 // _ineg, _lneg, _fneg, _dneg
 357 void LIRGenerator::do_NegateOp(NegateOp* x) {
 358   LIRItem value(x->x(), this);
 359   value.set_destroys_register();
 360   value.load_item();
 361   LIR_Opr reg = rlock(x);
 362   __ negate(value.result(), reg);
 363 
 364   set_result(x, round_item(reg));
 365 }
 366 
 367 
 368 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 369 //      _dadd, _dmul, _dsub, _ddiv, _drem
 370 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 371   LIRItem left(x->x(),  this);
 372   LIRItem right(x->y(), this);
 373   LIRItem* left_arg  = &left;
 374   LIRItem* right_arg = &right;
 375   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 376   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 377   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 378     left.load_item();
 379   } else {
 380     left.dont_load_item();
 381   }
 382 
 383   // do not load right operand if it is a constant.  only 0 and 1 are
 384   // loaded because there are special instructions for loading them
 385   // without memory access (not needed for SSE2 instructions)
 386   bool must_load_right = false;
 387   if (right.is_constant()) {
 388     LIR_Const* c = right.result()->as_constant_ptr();
 389     assert(c != NULL, "invalid constant");
 390     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 391 
 392     if (c->type() == T_FLOAT) {
 393       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 394     } else {
 395       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 396     }
 397   }
 398 
 399   if (must_load_both) {
 400     // frem and drem destroy also right operand, so move it to a new register
 401     right.set_destroys_register();
 402     right.load_item();
 403   } else if (right.is_register() || must_load_right) {
 404     right.load_item();
 405   } else {
 406     right.dont_load_item();
 407   }
 408   LIR_Opr reg = rlock(x);
 409   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 410   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 411     tmp = new_register(T_DOUBLE);
 412   }
 413 
 414   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 415     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 416     LIR_Opr fpu0, fpu1;
 417     if (x->op() == Bytecodes::_frem) {
 418       fpu0 = LIR_OprFact::single_fpu(0);
 419       fpu1 = LIR_OprFact::single_fpu(1);
 420     } else {
 421       fpu0 = LIR_OprFact::double_fpu(0);
 422       fpu1 = LIR_OprFact::double_fpu(1);
 423     }
 424     __ move(right.result(), fpu1); // order of left and right operand is important!
 425     __ move(left.result(), fpu0);
 426     __ rem (fpu0, fpu1, fpu0);
 427     __ move(fpu0, reg);
 428 
 429   } else {
 430     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 431   }
 432 
 433   set_result(x, round_item(reg));
 434 }
 435 
 436 
 437 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 438 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 439   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 440     // long division is implemented as a direct call into the runtime
 441     LIRItem left(x->x(), this);
 442     LIRItem right(x->y(), this);
 443 
 444     // the check for division by zero destroys the right operand
 445     right.set_destroys_register();
 446 
 447     BasicTypeList signature(2);
 448     signature.append(T_LONG);
 449     signature.append(T_LONG);
 450     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 451 
 452     // check for division by zero (destroys registers of right operand!)
 453     CodeEmitInfo* info = state_for(x);
 454 
 455     const LIR_Opr result_reg = result_register_for(x->type());
 456     left.load_item_force(cc->at(1));
 457     right.load_item();
 458 
 459     __ move(right.result(), cc->at(0));
 460 
 461     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 462     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 463 
 464     address entry;
 465     switch (x->op()) {
 466     case Bytecodes::_lrem:
 467       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 468       break; // check if dividend is 0 is done elsewhere
 469     case Bytecodes::_ldiv:
 470       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 471       break; // check if dividend is 0 is done elsewhere
 472     case Bytecodes::_lmul:
 473       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 474       break;
 475     default:
 476       ShouldNotReachHere();
 477     }
 478 
 479     LIR_Opr result = rlock_result(x);
 480     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 481     __ move(result_reg, result);
 482   } else if (x->op() == Bytecodes::_lmul) {
 483     // missing test if instr is commutative and if we should swap
 484     LIRItem left(x->x(), this);
 485     LIRItem right(x->y(), this);
 486 
 487     // right register is destroyed by the long mul, so it must be
 488     // copied to a new register.
 489     right.set_destroys_register();
 490 
 491     left.load_item();
 492     right.load_item();
 493 
 494     LIR_Opr reg = FrameMap::long0_opr;
 495     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 496     LIR_Opr result = rlock_result(x);
 497     __ move(reg, result);
 498   } else {
 499     // missing test if instr is commutative and if we should swap
 500     LIRItem left(x->x(), this);
 501     LIRItem right(x->y(), this);
 502 
 503     left.load_item();
 504     // don't load constants to save register
 505     right.load_nonconstant();
 506     rlock_result(x);
 507     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 508   }
 509 }
 510 
 511 
 512 
 513 // for: _iadd, _imul, _isub, _idiv, _irem
 514 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 515   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 516     // The requirements for division and modulo
 517     // input : rax,: dividend                         min_int
 518     //         reg: divisor   (may not be rax,/rdx)   -1
 519     //
 520     // output: rax,: quotient  (= rax, idiv reg)       min_int
 521     //         rdx: remainder (= rax, irem reg)       0
 522 
 523     // rax, and rdx will be destroyed
 524 
 525     // Note: does this invalidate the spec ???
 526     LIRItem right(x->y(), this);
 527     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 528 
 529     // call state_for before load_item_force because state_for may
 530     // force the evaluation of other instructions that are needed for
 531     // correct debug info.  Otherwise the live range of the fix
 532     // register might be too long.
 533     CodeEmitInfo* info = state_for(x);
 534 
 535     left.load_item_force(divInOpr());
 536 
 537     right.load_item();
 538 
 539     LIR_Opr result = rlock_result(x);
 540     LIR_Opr result_reg;
 541     if (x->op() == Bytecodes::_idiv) {
 542       result_reg = divOutOpr();
 543     } else {
 544       result_reg = remOutOpr();
 545     }
 546 
 547     if (!ImplicitDiv0Checks) {
 548       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 549       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 550     }
 551     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 552     if (x->op() == Bytecodes::_irem) {
 553       __ irem(left.result(), right.result(), result_reg, tmp, info);
 554     } else if (x->op() == Bytecodes::_idiv) {
 555       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 556     } else {
 557       ShouldNotReachHere();
 558     }
 559 
 560     __ move(result_reg, result);
 561   } else {
 562     // missing test if instr is commutative and if we should swap
 563     LIRItem left(x->x(),  this);
 564     LIRItem right(x->y(), this);
 565     LIRItem* left_arg = &left;
 566     LIRItem* right_arg = &right;
 567     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 568       // swap them if left is real stack (or cached) and right is real register(not cached)
 569       left_arg = &right;
 570       right_arg = &left;
 571     }
 572 
 573     left_arg->load_item();
 574 
 575     // do not need to load right, as we can handle stack and constants
 576     if (x->op() == Bytecodes::_imul ) {
 577       // check if we can use shift instead
 578       bool use_constant = false;
 579       bool use_tmp = false;
 580       if (right_arg->is_constant()) {
 581         int iconst = right_arg->get_jint_constant();
 582         if (iconst > 0) {
 583           if (is_power_of_2(iconst)) {
 584             use_constant = true;
 585           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 586             use_constant = true;
 587             use_tmp = true;
 588           }
 589         }
 590       }
 591       if (use_constant) {
 592         right_arg->dont_load_item();
 593       } else {
 594         right_arg->load_item();
 595       }
 596       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 597       if (use_tmp) {
 598         tmp = new_register(T_INT);
 599       }
 600       rlock_result(x);
 601 
 602       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 603     } else {
 604       right_arg->dont_load_item();
 605       rlock_result(x);
 606       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 607       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 608     }
 609   }
 610 }
 611 
 612 
 613 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 614   // when an operand with use count 1 is the left operand, then it is
 615   // likely that no move for 2-operand-LIR-form is necessary
 616   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 617     x->swap_operands();
 618   }
 619 
 620   ValueTag tag = x->type()->tag();
 621   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 622   switch (tag) {
 623     case floatTag:
 624     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 625     case longTag:    do_ArithmeticOp_Long(x); return;
 626     case intTag:     do_ArithmeticOp_Int(x);  return;
 627   }
 628   ShouldNotReachHere();
 629 }
 630 
 631 
 632 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 633 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 634   // count must always be in rcx
 635   LIRItem value(x->x(), this);
 636   LIRItem count(x->y(), this);
 637 
 638   ValueTag elemType = x->type()->tag();
 639   bool must_load_count = !count.is_constant() || elemType == longTag;
 640   if (must_load_count) {
 641     // count for long must be in register
 642     count.load_item_force(shiftCountOpr());
 643   } else {
 644     count.dont_load_item();
 645   }
 646   value.load_item();
 647   LIR_Opr reg = rlock_result(x);
 648 
 649   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 650 }
 651 
 652 
 653 // _iand, _land, _ior, _lor, _ixor, _lxor
 654 void LIRGenerator::do_LogicOp(LogicOp* x) {
 655   // when an operand with use count 1 is the left operand, then it is
 656   // likely that no move for 2-operand-LIR-form is necessary
 657   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 658     x->swap_operands();
 659   }
 660 
 661   LIRItem left(x->x(), this);
 662   LIRItem right(x->y(), this);
 663 
 664   left.load_item();
 665   right.load_nonconstant();
 666   LIR_Opr reg = rlock_result(x);
 667 
 668   logic_op(x->op(), reg, left.result(), right.result());
 669 }
 670 
 671 
 672 
 673 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 674 void LIRGenerator::do_CompareOp(CompareOp* x) {
 675   LIRItem left(x->x(), this);
 676   LIRItem right(x->y(), this);
 677   ValueTag tag = x->x()->type()->tag();
 678   if (tag == longTag) {
 679     left.set_destroys_register();
 680   }
 681   left.load_item();
 682   right.load_item();
 683   LIR_Opr reg = rlock_result(x);
 684 
 685   if (x->x()->type()->is_float_kind()) {
 686     Bytecodes::Code code = x->op();
 687     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 688   } else if (x->x()->type()->tag() == longTag) {
 689     __ lcmp2int(left.result(), right.result(), reg);
 690   } else {
 691     Unimplemented();
 692   }
 693 }
 694 
 695 
 696 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
 697   assert(x->number_of_arguments() == 3, "wrong type");
 698   LIRItem obj       (x->argument_at(0), this);  // AtomicLong object
 699   LIRItem cmp_value (x->argument_at(1), this);  // value to compare with field
 700   LIRItem new_value (x->argument_at(2), this);  // replace field with new_value if it matches cmp_value
 701 
 702   // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
 703   cmp_value.load_item_force(FrameMap::long0_opr);
 704 
 705   // new value must be in rcx,ebx (hi,lo)
 706   new_value.load_item_force(FrameMap::long1_opr);
 707 
 708   // object pointer register is overwritten with field address
 709   obj.load_item();
 710 
 711   // generate compare-and-swap; produces zero condition if swap occurs
 712   int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
 713   LIR_Opr addr = obj.result();
 714   __ add(addr, LIR_OprFact::intConst(value_offset), addr);
 715   LIR_Opr t1 = LIR_OprFact::illegalOpr;  // no temp needed
 716   LIR_Opr t2 = LIR_OprFact::illegalOpr;  // no temp needed
 717   __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
 718 
 719   // generate conditional move of boolean result
 720   LIR_Opr result = rlock_result(x);
 721   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
 722 }
 723 
 724 
 725 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 726   assert(x->number_of_arguments() == 4, "wrong type");
 727   LIRItem obj   (x->argument_at(0), this);  // object
 728   LIRItem offset(x->argument_at(1), this);  // offset of field
 729   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
 730   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
 731 
 732   assert(obj.type()->tag() == objectTag, "invalid type");
 733 
 734   // In 64bit the type can be long, sparc doesn't have this assert
 735   // assert(offset.type()->tag() == intTag, "invalid type");
 736 
 737   assert(cmp.type()->tag() == type->tag(), "invalid type");
 738   assert(val.type()->tag() == type->tag(), "invalid type");
 739 
 740   // get address of field
 741   obj.load_item();
 742   offset.load_nonconstant();
 743 
 744   if (type == objectType) {
 745     cmp.load_item_force(FrameMap::rax_oop_opr);
 746     val.load_item();
 747   } else if (type == intType) {
 748     cmp.load_item_force(FrameMap::rax_opr);
 749     val.load_item();
 750   } else if (type == longType) {
 751     cmp.load_item_force(FrameMap::long0_opr);
 752     val.load_item_force(FrameMap::long1_opr);
 753   } else {
 754     ShouldNotReachHere();
 755   }
 756 
 757   LIR_Opr addr = new_pointer_register();
 758   LIR_Address* a;
 759   if(offset.result()->is_constant()) {
 760     a = new LIR_Address(obj.result(),
 761                         NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()),
 762                         as_BasicType(type));
 763   } else {
 764     a = new LIR_Address(obj.result(),
 765                         offset.result(),
 766                         LIR_Address::times_1,
 767                         0,
 768                         as_BasicType(type));
 769   }
 770   __ leal(LIR_OprFact::address(a), addr);
 771 
 772   if (type == objectType) {  // Write-barrier needed for Object fields.
 773     // Do the pre-write barrier, if any.
 774     pre_barrier(addr, false, NULL);
 775   }
 776 
 777   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 778   if (type == objectType)
 779     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
 780   else if (type == intType)
 781     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 782   else if (type == longType)
 783     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 784   else {
 785     ShouldNotReachHere();
 786   }
 787 
 788   // generate conditional move of boolean result
 789   LIR_Opr result = rlock_result(x);
 790   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result);
 791   if (type == objectType) {   // Write-barrier needed for Object fields.
 792     // Seems to be precise
 793     post_barrier(addr, val.result());
 794   }
 795 }
 796 
 797 
 798 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 799   assert(x->number_of_arguments() == 1, "wrong type");
 800   LIRItem value(x->argument_at(0), this);
 801 
 802   bool use_fpu = false;
 803   if (UseSSE >= 2) {
 804     switch(x->id()) {
 805       case vmIntrinsics::_dsin:
 806       case vmIntrinsics::_dcos:
 807       case vmIntrinsics::_dtan:
 808       case vmIntrinsics::_dlog:
 809       case vmIntrinsics::_dlog10:
 810         use_fpu = true;
 811     }
 812   } else {
 813     value.set_destroys_register();
 814   }
 815 
 816   value.load_item();
 817 
 818   LIR_Opr calc_input = value.result();
 819   LIR_Opr calc_result = rlock_result(x);
 820 
 821   // sin and cos need two free fpu stack slots, so register two temporary operands
 822   LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
 823   LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
 824 
 825   if (use_fpu) {
 826     LIR_Opr tmp = FrameMap::fpu0_double_opr;
 827     __ move(calc_input, tmp);
 828 
 829     calc_input = tmp;
 830     calc_result = tmp;
 831     tmp1 = FrameMap::caller_save_fpu_reg_at(1);
 832     tmp2 = FrameMap::caller_save_fpu_reg_at(2);
 833   }
 834 
 835   switch(x->id()) {
 836     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 837     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 838     case vmIntrinsics::_dsin:   __ sin  (calc_input, calc_result, tmp1, tmp2);              break;
 839     case vmIntrinsics::_dcos:   __ cos  (calc_input, calc_result, tmp1, tmp2);              break;
 840     case vmIntrinsics::_dtan:   __ tan  (calc_input, calc_result, tmp1, tmp2);              break;
 841     case vmIntrinsics::_dlog:   __ log  (calc_input, calc_result, tmp1);                    break;
 842     case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1);                    break;
 843     default:                    ShouldNotReachHere();
 844   }
 845 
 846   if (use_fpu) {
 847     __ move(calc_result, x->operand());
 848   }
 849 }
 850 
 851 
 852 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 853   assert(x->number_of_arguments() == 5, "wrong type");
 854   LIRItem src(x->argument_at(0), this);
 855   LIRItem src_pos(x->argument_at(1), this);
 856   LIRItem dst(x->argument_at(2), this);
 857   LIRItem dst_pos(x->argument_at(3), this);
 858   LIRItem length(x->argument_at(4), this);
 859 
 860   // operands for arraycopy must use fixed registers, otherwise
 861   // LinearScan will fail allocation (because arraycopy always needs a
 862   // call)
 863 
 864 #ifndef _LP64
 865   src.load_item_force     (FrameMap::rcx_oop_opr);
 866   src_pos.load_item_force (FrameMap::rdx_opr);
 867   dst.load_item_force     (FrameMap::rax_oop_opr);
 868   dst_pos.load_item_force (FrameMap::rbx_opr);
 869   length.load_item_force  (FrameMap::rdi_opr);
 870   LIR_Opr tmp =           (FrameMap::rsi_opr);
 871 #else
 872 
 873   // The java calling convention will give us enough registers
 874   // so that on the stub side the args will be perfect already.
 875   // On the other slow/special case side we call C and the arg
 876   // positions are not similar enough to pick one as the best.
 877   // Also because the java calling convention is a "shifted" version
 878   // of the C convention we can process the java args trivially into C
 879   // args without worry of overwriting during the xfer
 880 
 881   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
 882   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
 883   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
 884   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
 885   length.load_item_force  (FrameMap::as_opr(j_rarg4));
 886 
 887   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
 888 #endif // LP64
 889 
 890   set_no_result(x);
 891 
 892   int flags;
 893   ciArrayKlass* expected_type;
 894   arraycopy_helper(x, &flags, &expected_type);
 895 
 896   CodeEmitInfo* info = state_for(x, x->state()); // we may want to have stack (deoptimization?)
 897   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
 898 }
 899 
 900 
 901 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
 902 // _i2b, _i2c, _i2s
 903 LIR_Opr fixed_register_for(BasicType type) {
 904   switch (type) {
 905     case T_FLOAT:  return FrameMap::fpu0_float_opr;
 906     case T_DOUBLE: return FrameMap::fpu0_double_opr;
 907     case T_INT:    return FrameMap::rax_opr;
 908     case T_LONG:   return FrameMap::long0_opr;
 909     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 910   }
 911 }
 912 
 913 void LIRGenerator::do_Convert(Convert* x) {
 914   // flags that vary for the different operations and different SSE-settings
 915   bool fixed_input, fixed_result, round_result, needs_stub;
 916 
 917   switch (x->op()) {
 918     case Bytecodes::_i2l: // fall through
 919     case Bytecodes::_l2i: // fall through
 920     case Bytecodes::_i2b: // fall through
 921     case Bytecodes::_i2c: // fall through
 922     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
 923 
 924     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
 925     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
 926     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
 927     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
 928     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
 929     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
 930     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
 931     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
 932     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
 933     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
 934     default: ShouldNotReachHere();
 935   }
 936 
 937   LIRItem value(x->value(), this);
 938   value.load_item();
 939   LIR_Opr input = value.result();
 940   LIR_Opr result = rlock(x);
 941 
 942   // arguments of lir_convert
 943   LIR_Opr conv_input = input;
 944   LIR_Opr conv_result = result;
 945   ConversionStub* stub = NULL;
 946 
 947   if (fixed_input) {
 948     conv_input = fixed_register_for(input->type());
 949     __ move(input, conv_input);
 950   }
 951 
 952   assert(fixed_result == false || round_result == false, "cannot set both");
 953   if (fixed_result) {
 954     conv_result = fixed_register_for(result->type());
 955   } else if (round_result) {
 956     result = new_register(result->type());
 957     set_vreg_flag(result, must_start_in_memory);
 958   }
 959 
 960   if (needs_stub) {
 961     stub = new ConversionStub(x->op(), conv_input, conv_result);
 962   }
 963 
 964   __ convert(x->op(), conv_input, conv_result, stub);
 965 
 966   if (result != conv_result) {
 967     __ move(conv_result, result);
 968   }
 969 
 970   assert(result->is_virtual(), "result must be virtual register");
 971   set_result(x, result);
 972 }
 973 
 974 
 975 void LIRGenerator::do_NewInstance(NewInstance* x) {
 976   if (PrintNotLoaded && !x->klass()->is_loaded()) {
 977     tty->print_cr("   ###class not loaded at new bci %d", x->bci());
 978   }
 979   CodeEmitInfo* info = state_for(x, x->state());
 980   LIR_Opr reg = result_register_for(x->type());
 981   LIR_Opr klass_reg = new_register(objectType);
 982   new_instance(reg, x->klass(),
 983                        FrameMap::rcx_oop_opr,
 984                        FrameMap::rdi_oop_opr,
 985                        FrameMap::rsi_oop_opr,
 986                        LIR_OprFact::illegalOpr,
 987                        FrameMap::rdx_oop_opr, info);
 988   LIR_Opr result = rlock_result(x);
 989   __ move(reg, result);
 990 }
 991 
 992 
 993 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
 994   CodeEmitInfo* info = state_for(x, x->state());
 995 
 996   LIRItem length(x->length(), this);
 997   length.load_item_force(FrameMap::rbx_opr);
 998 
 999   LIR_Opr reg = result_register_for(x->type());
1000   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1001   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1002   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1003   LIR_Opr tmp4 = reg;
1004   LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
1005   LIR_Opr len = length.result();
1006   BasicType elem_type = x->elt_type();
1007 
1008   __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1009 
1010   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1011   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1012 
1013   LIR_Opr result = rlock_result(x);
1014   __ move(reg, result);
1015 }
1016 
1017 
1018 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1019   LIRItem length(x->length(), this);
1020   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1021   // and therefore provide the state before the parameters have been consumed
1022   CodeEmitInfo* patching_info = NULL;
1023   if (!x->klass()->is_loaded() || PatchALot) {
1024     patching_info =  state_for(x, x->state_before());
1025   }
1026 
1027   CodeEmitInfo* info = state_for(x, x->state());
1028 
1029   const LIR_Opr reg = result_register_for(x->type());
1030   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1031   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1032   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1033   LIR_Opr tmp4 = reg;
1034   LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
1035 
1036   length.load_item_force(FrameMap::rbx_opr);
1037   LIR_Opr len = length.result();
1038 
1039   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1040   ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
1041   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1042     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1043   }
1044   jobject2reg_with_patching(klass_reg, obj, patching_info);
1045   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1046 
1047   LIR_Opr result = rlock_result(x);
1048   __ move(reg, result);
1049 }
1050 
1051 
1052 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1053   Values* dims = x->dims();
1054   int i = dims->length();
1055   LIRItemList* items = new LIRItemList(dims->length(), NULL);
1056   while (i-- > 0) {
1057     LIRItem* size = new LIRItem(dims->at(i), this);
1058     items->at_put(i, size);
1059   }
1060 
1061   // Evaluate state_for early since it may emit code.
1062   CodeEmitInfo* patching_info = NULL;
1063   if (!x->klass()->is_loaded() || PatchALot) {
1064     patching_info = state_for(x, x->state_before());
1065 
1066     // cannot re-use same xhandlers for multiple CodeEmitInfos, so
1067     // clone all handlers.  This is handled transparently in other
1068     // places by the CodeEmitInfo cloning logic but is handled
1069     // specially here because a stub isn't being used.
1070     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1071   }
1072   CodeEmitInfo* info = state_for(x, x->state());
1073 
1074   i = dims->length();
1075   while (i-- > 0) {
1076     LIRItem* size = items->at(i);
1077     size->load_nonconstant();
1078 
1079     store_stack_parameter(size->result(), in_ByteSize(i*4));
1080   }
1081 
1082   LIR_Opr reg = result_register_for(x->type());
1083   jobject2reg_with_patching(reg, x->klass(), patching_info);
1084 
1085   LIR_Opr rank = FrameMap::rbx_opr;
1086   __ move(LIR_OprFact::intConst(x->rank()), rank);
1087   LIR_Opr varargs = FrameMap::rcx_opr;
1088   __ move(FrameMap::rsp_opr, varargs);
1089   LIR_OprList* args = new LIR_OprList(3);
1090   args->append(reg);
1091   args->append(rank);
1092   args->append(varargs);
1093   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1094                   LIR_OprFact::illegalOpr,
1095                   reg, args, info);
1096 
1097   LIR_Opr result = rlock_result(x);
1098   __ move(reg, result);
1099 }
1100 
1101 
1102 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1103   // nothing to do for now
1104 }
1105 
1106 
1107 void LIRGenerator::do_CheckCast(CheckCast* x) {
1108   LIRItem obj(x->obj(), this);
1109 
1110   CodeEmitInfo* patching_info = NULL;
1111   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1112     // must do this before locking the destination register as an oop register,
1113     // and before the obj is loaded (the latter is for deoptimization)
1114     patching_info = state_for(x, x->state_before());
1115   }
1116   obj.load_item();
1117 
1118   // info for exceptions
1119   CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks());
1120 
1121   CodeStub* stub;
1122   if (x->is_incompatible_class_change_check()) {
1123     assert(patching_info == NULL, "can't patch this");
1124     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1125   } else {
1126     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1127   }
1128   LIR_Opr reg = rlock_result(x);
1129   __ checkcast(reg, obj.result(), x->klass(),
1130                new_register(objectType), new_register(objectType),
1131                !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr,
1132                x->direct_compare(), info_for_exception, patching_info, stub,
1133                x->profiled_method(), x->profiled_bci());
1134 }
1135 
1136 
1137 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1138   LIRItem obj(x->obj(), this);
1139 
1140   // result and test object may not be in same register
1141   LIR_Opr reg = rlock_result(x);
1142   CodeEmitInfo* patching_info = NULL;
1143   if ((!x->klass()->is_loaded() || PatchALot)) {
1144     // must do this before locking the destination register as an oop register
1145     patching_info = state_for(x, x->state_before());
1146   }
1147   obj.load_item();
1148   LIR_Opr tmp = new_register(objectType);
1149   __ instanceof(reg, obj.result(), x->klass(),
1150                 tmp, new_register(objectType), LIR_OprFact::illegalOpr,
1151                 x->direct_compare(), patching_info);
1152 }
1153 
1154 
1155 void LIRGenerator::do_If(If* x) {
1156   assert(x->number_of_sux() == 2, "inconsistency");
1157   ValueTag tag = x->x()->type()->tag();
1158   bool is_safepoint = x->is_safepoint();
1159 
1160   If::Condition cond = x->cond();
1161 
1162   LIRItem xitem(x->x(), this);
1163   LIRItem yitem(x->y(), this);
1164   LIRItem* xin = &xitem;
1165   LIRItem* yin = &yitem;
1166 
1167   if (tag == longTag) {
1168     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1169     // mirror for other conditions
1170     if (cond == If::gtr || cond == If::leq) {
1171       cond = Instruction::mirror(cond);
1172       xin = &yitem;
1173       yin = &xitem;
1174     }
1175     xin->set_destroys_register();
1176   }
1177   xin->load_item();
1178   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1179     // inline long zero
1180     yin->dont_load_item();
1181   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1182     // longs cannot handle constants at right side
1183     yin->load_item();
1184   } else {
1185     yin->dont_load_item();
1186   }
1187 
1188   // add safepoint before generating condition code so it can be recomputed
1189   if (x->is_safepoint()) {
1190     // increment backedge counter if needed
1191     increment_backedge_counter(state_for(x, x->state_before()));
1192 
1193     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1194   }
1195   set_no_result(x);
1196 
1197   LIR_Opr left = xin->result();
1198   LIR_Opr right = yin->result();
1199   __ cmp(lir_cond(cond), left, right);
1200   profile_branch(x, cond);
1201   move_to_phi(x->state());
1202   if (x->x()->type()->is_float_kind()) {
1203     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1204   } else {
1205     __ branch(lir_cond(cond), right->type(), x->tsux());
1206   }
1207   assert(x->default_sux() == x->fsux(), "wrong destination above");
1208   __ jump(x->default_sux());
1209 }
1210 
1211 
1212 LIR_Opr LIRGenerator::getThreadPointer() {
1213 #ifdef _LP64
1214   return FrameMap::as_pointer_opr(r15_thread);
1215 #else
1216   LIR_Opr result = new_register(T_INT);
1217   __ get_thread(result);
1218   return result;
1219 #endif //
1220 }
1221 
1222 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1223   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1224   LIR_OprList* args = new LIR_OprList();
1225   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1226   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1227 }
1228 
1229 
1230 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1231                                         CodeEmitInfo* info) {
1232   if (address->type() == T_LONG) {
1233     address = new LIR_Address(address->base(),
1234                               address->index(), address->scale(),
1235                               address->disp(), T_DOUBLE);
1236     // Transfer the value atomically by using FP moves.  This means
1237     // the value has to be moved between CPU and FPU registers.  It
1238     // always has to be moved through spill slot since there's no
1239     // quick way to pack the value into an SSE register.
1240     LIR_Opr temp_double = new_register(T_DOUBLE);
1241     LIR_Opr spill = new_register(T_LONG);
1242     set_vreg_flag(spill, must_start_in_memory);
1243     __ move(value, spill);
1244     __ volatile_move(spill, temp_double, T_LONG);
1245     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1246   } else {
1247     __ store(value, address, info);
1248   }
1249 }
1250 
1251 
1252 
1253 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1254                                        CodeEmitInfo* info) {
1255   if (address->type() == T_LONG) {
1256     address = new LIR_Address(address->base(),
1257                               address->index(), address->scale(),
1258                               address->disp(), T_DOUBLE);
1259     // Transfer the value atomically by using FP moves.  This means
1260     // the value has to be moved between CPU and FPU registers.  In
1261     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1262     // SSE2+ mode it can be moved directly.
1263     LIR_Opr temp_double = new_register(T_DOUBLE);
1264     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1265     __ volatile_move(temp_double, result, T_LONG);
1266     if (UseSSE < 2) {
1267       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1268       set_vreg_flag(result, must_start_in_memory);
1269     }
1270   } else {
1271     __ load(address, result, info);
1272   }
1273 }
1274 
1275 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1276                                      BasicType type, bool is_volatile) {
1277   if (is_volatile && type == T_LONG) {
1278     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1279     LIR_Opr tmp = new_register(T_DOUBLE);
1280     __ load(addr, tmp);
1281     LIR_Opr spill = new_register(T_LONG);
1282     set_vreg_flag(spill, must_start_in_memory);
1283     __ move(tmp, spill);
1284     __ move(spill, dst);
1285   } else {
1286     LIR_Address* addr = new LIR_Address(src, offset, type);
1287     __ load(addr, dst);
1288   }
1289 }
1290 
1291 
1292 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1293                                      BasicType type, bool is_volatile) {
1294   if (is_volatile && type == T_LONG) {
1295     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1296     LIR_Opr tmp = new_register(T_DOUBLE);
1297     LIR_Opr spill = new_register(T_DOUBLE);
1298     set_vreg_flag(spill, must_start_in_memory);
1299     __ move(data, spill);
1300     __ move(spill, tmp);
1301     __ move(tmp, addr);
1302   } else {
1303     LIR_Address* addr = new LIR_Address(src, offset, type);
1304     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1305     if (is_obj) {
1306       // Do the pre-write barrier, if any.
1307       pre_barrier(LIR_OprFact::address(addr), false, NULL);
1308       __ move(data, addr);
1309       assert(src->is_register(), "must be register");
1310       // Seems to be a precise address
1311       post_barrier(LIR_OprFact::address(addr), data);
1312     } else {
1313       __ move(data, addr);
1314     }
1315   }
1316 }