67 , _frame_map(frame_map) 68 , _num_virtual_regs(gen->max_virtual_register_number()) 69 , _has_fpu_registers(false) 70 , _num_calls(-1) 71 , _max_spills(0) 72 , _unused_spill_slot(-1) 73 , _intervals(0) // initialized later with correct length 74 , _new_intervals_from_allocation(new IntervalList()) 75 , _sorted_intervals(NULL) 76 , _lir_ops(0) // initialized later with correct length 77 , _block_of_op(0) // initialized later with correct length 78 , _has_info(0) 79 , _has_call(0) 80 , _scope_value_cache(0) // initialized later with correct length 81 , _interval_in_loop(0, 0) // initialized later with correct length 82 , _cached_blocks(*ir->linear_scan_order()) 83 #ifdef X86 84 , _fpu_stack_allocator(NULL) 85 #endif 86 { 87 // note: to use more than on instance of LinearScan at a time this function call has to 88 // be moved somewhere outside of this constructor: 89 Interval::initialize(); 90 91 assert(this->ir() != NULL, "check if valid"); 92 assert(this->compilation() != NULL, "check if valid"); 93 assert(this->gen() != NULL, "check if valid"); 94 assert(this->frame_map() != NULL, "check if valid"); 95 } 96 97 98 // ********** functions for converting LIR-Operands to register numbers 99 // 100 // Emulate a flat register file comprising physical integer registers, 101 // physical floating-point registers and virtual registers, in that order. 102 // Virtual registers already have appropriate numbers, since V0 is 103 // the number of physical registers. 104 // Returns -1 for hi word if opr is a single word operand. 105 // 106 // Note: the inverse operation (calculating an operand for register numbers) 107 // is done in calc_operand_for_interval() 108 109 int LinearScan::reg_num(LIR_Opr opr) { 110 assert(opr->is_register(), "should not call this otherwise"); 3912 void MoveResolver::resolve_and_append_moves() { 3913 if (has_mappings()) { 3914 resolve_mappings(); 3915 } 3916 append_insertion_buffer(); 3917 } 3918 3919 3920 3921 // **** Implementation of Range ************************************* 3922 3923 Range::Range(int from, int to, Range* next) : 3924 _from(from), 3925 _to(to), 3926 _next(next) 3927 { 3928 } 3929 3930 // initialize sentinel 3931 Range* Range::_end = NULL; 3932 void Range::initialize() { 3933 _end = new Range(max_jint, max_jint, NULL); 3934 } 3935 3936 int Range::intersects_at(Range* r2) const { 3937 const Range* r1 = this; 3938 3939 assert(r1 != NULL && r2 != NULL, "null ranges not allowed"); 3940 assert(r1 != _end && r2 != _end, "empty ranges not allowed"); 3941 3942 do { 3943 if (r1->from() < r2->from()) { 3944 if (r1->to() <= r2->from()) { 3945 r1 = r1->next(); if (r1 == _end) return -1; 3946 } else { 3947 return r2->from(); 3948 } 3949 } else if (r2->from() < r1->from()) { 3950 if (r2->to() <= r1->from()) { 3951 r2 = r2->next(); if (r2 == _end) return -1; 3952 } else { 3953 return r1->from(); 3959 r2 = r2->next(); if (r2 == _end) return -1; 3960 } else { 3961 return r1->from(); 3962 } 3963 } 3964 } while (true); 3965 } 3966 3967 #ifndef PRODUCT 3968 void Range::print(outputStream* out) const { 3969 out->print("[%d, %d[ ", _from, _to); 3970 } 3971 #endif 3972 3973 3974 3975 // **** Implementation of Interval ********************************** 3976 3977 // initialize sentinel 3978 Interval* Interval::_end = NULL; 3979 void Interval::initialize() { 3980 Range::initialize(); 3981 _end = new Interval(-1); 3982 } 3983 3984 Interval::Interval(int reg_num) : 3985 _reg_num(reg_num), 3986 _type(T_ILLEGAL), 3987 _first(Range::end()), 3988 _use_pos_and_kinds(12), 3989 _current(Range::end()), 3990 _next(_end), 3991 _state(invalidState), 3992 _assigned_reg(LinearScan::any_reg), 3993 _assigned_regHi(LinearScan::any_reg), 3994 _cached_to(-1), 3995 _cached_opr(LIR_OprFact::illegalOpr), 3996 _cached_vm_reg(VMRegImpl::Bad()), 3997 _split_children(0), 3998 _canonical_spill_slot(-1), 3999 _insert_move_when_activated(false), 4000 _register_hint(NULL), 4001 _spill_state(noDefinitionFound), | 67 , _frame_map(frame_map) 68 , _num_virtual_regs(gen->max_virtual_register_number()) 69 , _has_fpu_registers(false) 70 , _num_calls(-1) 71 , _max_spills(0) 72 , _unused_spill_slot(-1) 73 , _intervals(0) // initialized later with correct length 74 , _new_intervals_from_allocation(new IntervalList()) 75 , _sorted_intervals(NULL) 76 , _lir_ops(0) // initialized later with correct length 77 , _block_of_op(0) // initialized later with correct length 78 , _has_info(0) 79 , _has_call(0) 80 , _scope_value_cache(0) // initialized later with correct length 81 , _interval_in_loop(0, 0) // initialized later with correct length 82 , _cached_blocks(*ir->linear_scan_order()) 83 #ifdef X86 84 , _fpu_stack_allocator(NULL) 85 #endif 86 { 87 assert(this->ir() != NULL, "check if valid"); 88 assert(this->compilation() != NULL, "check if valid"); 89 assert(this->gen() != NULL, "check if valid"); 90 assert(this->frame_map() != NULL, "check if valid"); 91 } 92 93 94 // ********** functions for converting LIR-Operands to register numbers 95 // 96 // Emulate a flat register file comprising physical integer registers, 97 // physical floating-point registers and virtual registers, in that order. 98 // Virtual registers already have appropriate numbers, since V0 is 99 // the number of physical registers. 100 // Returns -1 for hi word if opr is a single word operand. 101 // 102 // Note: the inverse operation (calculating an operand for register numbers) 103 // is done in calc_operand_for_interval() 104 105 int LinearScan::reg_num(LIR_Opr opr) { 106 assert(opr->is_register(), "should not call this otherwise"); 3908 void MoveResolver::resolve_and_append_moves() { 3909 if (has_mappings()) { 3910 resolve_mappings(); 3911 } 3912 append_insertion_buffer(); 3913 } 3914 3915 3916 3917 // **** Implementation of Range ************************************* 3918 3919 Range::Range(int from, int to, Range* next) : 3920 _from(from), 3921 _to(to), 3922 _next(next) 3923 { 3924 } 3925 3926 // initialize sentinel 3927 Range* Range::_end = NULL; 3928 void Range::initialize(Arena* arena) { 3929 _end = new (arena) Range(max_jint, max_jint, NULL); 3930 } 3931 3932 int Range::intersects_at(Range* r2) const { 3933 const Range* r1 = this; 3934 3935 assert(r1 != NULL && r2 != NULL, "null ranges not allowed"); 3936 assert(r1 != _end && r2 != _end, "empty ranges not allowed"); 3937 3938 do { 3939 if (r1->from() < r2->from()) { 3940 if (r1->to() <= r2->from()) { 3941 r1 = r1->next(); if (r1 == _end) return -1; 3942 } else { 3943 return r2->from(); 3944 } 3945 } else if (r2->from() < r1->from()) { 3946 if (r2->to() <= r1->from()) { 3947 r2 = r2->next(); if (r2 == _end) return -1; 3948 } else { 3949 return r1->from(); 3955 r2 = r2->next(); if (r2 == _end) return -1; 3956 } else { 3957 return r1->from(); 3958 } 3959 } 3960 } while (true); 3961 } 3962 3963 #ifndef PRODUCT 3964 void Range::print(outputStream* out) const { 3965 out->print("[%d, %d[ ", _from, _to); 3966 } 3967 #endif 3968 3969 3970 3971 // **** Implementation of Interval ********************************** 3972 3973 // initialize sentinel 3974 Interval* Interval::_end = NULL; 3975 void Interval::initialize(Arena* arena) { 3976 Range::initialize(arena); 3977 _end = new (arena) Interval(-1); 3978 } 3979 3980 Interval::Interval(int reg_num) : 3981 _reg_num(reg_num), 3982 _type(T_ILLEGAL), 3983 _first(Range::end()), 3984 _use_pos_and_kinds(12), 3985 _current(Range::end()), 3986 _next(_end), 3987 _state(invalidState), 3988 _assigned_reg(LinearScan::any_reg), 3989 _assigned_regHi(LinearScan::any_reg), 3990 _cached_to(-1), 3991 _cached_opr(LIR_OprFact::illegalOpr), 3992 _cached_vm_reg(VMRegImpl::Bad()), 3993 _split_children(0), 3994 _canonical_spill_slot(-1), 3995 _insert_move_when_activated(false), 3996 _register_hint(NULL), 3997 _spill_state(noDefinitionFound), |