src/cpu/x86/vm/nativeInst_x86.hpp
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*** old/src/cpu/x86/vm/nativeInst_x86.hpp Fri Mar 25 19:58:41 2011
--- new/src/cpu/x86/vm/nativeInst_x86.hpp Fri Mar 25 19:58:41 2011
*** 1,7 ****
--- 1,7 ----
/*
! * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
! * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*** 517,527 ****
--- 517,531 ----
// Simple test vs memory
class NativeTstRegMem: public NativeInstruction {
public:
enum Intel_specific_constants {
! instruction_code_memXregl = 0x85
! instruction_rex_prefix_mask = 0xF0,
+ instruction_rex_prefix = Assembler::REX,
+ instruction_code_memXregl = 0x85,
+ modrm_mask = 0x38, // select reg from the ModRM byte
+ modrm_reg = 0x00 // rax
};
};
inline bool NativeInstruction::is_illegal() { return (short)int_at(0) == (short)NativeIllegalInstruction::instruction_code; }
inline bool NativeInstruction::is_call() { return ubyte_at(0) == NativeCall::instruction_code; }
*** 531,547 ****
--- 535,564 ----
ubyte_at(0) == 0xEB; /* short jump */ }
inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
(ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
inline bool NativeInstruction::is_safepoint_poll() {
#ifdef AMD64
! if ( ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
ubyte_at(1) == 0x05 ) { // 00 rax 101
! if (Assembler::is_polling_page_far()) {
+ // two cases, depending on the choice of the base register in the address.
+ if (((ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix &&
+ ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl &&
+ (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ||
+ ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
+ (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) {
+ return true;
+ } else {
+ return false;
+ }
+ } else {
+ if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
+ ubyte_at(1) == 0x05) { // 00 rax 101
address fault = addr_at(6) + int_at(2);
return os::is_poll_address(fault);
} else {
return false;
}
+ }
#else
return ( ubyte_at(0) == NativeMovRegMem::instruction_code_mem2reg ||
ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl ) &&
(ubyte_at(1)&0xC7) == 0x05 && /* Mod R/M == disp32 */
(os::is_poll_address((address)int_at(2)));
src/cpu/x86/vm/nativeInst_x86.hpp
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