557
558 // !!!!! Special hack to get all types of calls to specify the byte offset
559 // from the start of the call to the point where the return address
560 // will point.
561 int MachCallStaticJavaNode::ret_addr_offset()
562 {
563 int offset = 5; // 5 bytes from start of call to where return address points
564 if (_method_handle_invoke)
565 offset += preserve_SP_size();
566 return offset;
567 }
568
569 int MachCallDynamicJavaNode::ret_addr_offset()
570 {
571 return 15; // 15 bytes from start of call to where return address points
572 }
573
574 // In os_cpu .ad file
575 // int MachCallRuntimeNode::ret_addr_offset()
576
577 // Indicate if the safepoint node needs the polling page as an input.
578 // Since amd64 does not have absolute addressing but RIP-relative
579 // addressing and the polling page is within 2G, it doesn't.
580 bool SafePointNode::needs_polling_address_input()
581 {
582 return false;
583 }
584
585 //
586 // Compute padding required for nodes which need alignment
587 //
588
589 // The address of the call instruction needs to be 4-byte aligned to
590 // ensure that it does not span a cache line so that it can be patched.
591 int CallStaticJavaDirectNode::compute_padding(int current_offset) const
592 {
593 current_offset += 1; // skip call opcode byte
594 return round_to(current_offset, alignment_required()) - current_offset;
595 }
596
597 // The address of the call instruction needs to be 4-byte aligned to
598 // ensure that it does not span a cache line so that it can be patched.
599 int CallStaticJavaHandleNode::compute_padding(int current_offset) const
600 {
601 current_offset += preserve_SP_size(); // skip mov rbp, rsp
602 current_offset += 1; // skip call opcode byte
975 // the hard way
976 }
977
978 int MachPrologNode::reloc() const
979 {
980 return 0; // a large enough number
981 }
982
983 //=============================================================================
984 #ifndef PRODUCT
985 void MachEpilogNode::format(PhaseRegAlloc* ra_, outputStream* st) const
986 {
987 Compile* C = ra_->C;
988 int framesize = C->frame_slots() << LogBytesPerInt;
989 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
990 // Remove word for return adr already pushed
991 // and RBP
992 framesize -= 2*wordSize;
993
994 if (framesize) {
995 st->print_cr("addq\trsp, %d\t# Destroy frame", framesize);
996 st->print("\t");
997 }
998
999 st->print_cr("popq\trbp");
1000 if (do_polling() && C->is_method_compilation()) {
1001 st->print_cr("\ttestl\trax, [rip + #offset_to_poll_page]\t"
1002 "# Safepoint: poll for GC");
1003 st->print("\t");
1004 }
1005 }
1006 #endif
1007
1008 void MachEpilogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
1009 {
1010 Compile* C = ra_->C;
1011 int framesize = C->frame_slots() << LogBytesPerInt;
1012 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
1013 // Remove word for return adr already pushed
1014 // and RBP
1015 framesize -= 2*wordSize;
1016
1017 // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
1018
1019 if (framesize) {
1020 emit_opcode(cbuf, Assembler::REX_W);
1021 if (framesize < 0x80) {
1022 emit_opcode(cbuf, 0x83); // addq rsp, #framesize
1023 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
1024 emit_d8(cbuf, framesize);
1025 } else {
1026 emit_opcode(cbuf, 0x81); // addq rsp, #framesize
1027 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
1028 emit_d32(cbuf, framesize);
1029 }
1030 }
1031
1032 // popq rbp
1033 emit_opcode(cbuf, 0x58 | RBP_enc);
1034
1035 if (do_polling() && C->is_method_compilation()) {
1036 // testl %rax, off(%rip) // Opcode + ModRM + Disp32 == 6 bytes
1037 // XXX reg_mem doesn't support RIP-relative addressing yet
1038 cbuf.set_insts_mark();
1039 cbuf.relocate(cbuf.insts_mark(), relocInfo::poll_return_type, 0); // XXX
1040 emit_opcode(cbuf, 0x85); // testl
1041 emit_rm(cbuf, 0x0, RAX_enc, 0x5); // 00 rax 101 == 0x5
1042 // cbuf.insts_mark() is beginning of instruction
1043 emit_d32_reloc(cbuf, os::get_polling_page());
1044 // relocInfo::poll_return_type,
1045 }
1046 }
1047
1048 uint MachEpilogNode::size(PhaseRegAlloc* ra_) const
1049 {
1050 Compile* C = ra_->C;
1051 int framesize = C->frame_slots() << LogBytesPerInt;
1052 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
1053 // Remove word for return adr already pushed
1054 // and RBP
1055 framesize -= 2*wordSize;
1056
1057 uint size = 0;
1058
1059 if (do_polling() && C->is_method_compilation()) {
1060 size += 6;
1061 }
1062
1063 // count popq rbp
1064 size++;
1065
1066 if (framesize) {
1067 if (framesize < 0x80) {
1068 size += 4;
1069 } else if (framesize) {
1070 size += 7;
1071 }
1072 }
1073
1074 return size;
1075 }
1076
1077 int MachEpilogNode::reloc() const
1078 {
1079 return 2; // a large enough number
1080 }
1081
1082 const Pipeline* MachEpilogNode::pipeline() const
1083 {
1084 return MachNode::pipeline_class();
1085 }
1086
1087 int MachEpilogNode::safepoint_offset() const
1088 {
1089 return 0;
1090 }
1091
1092 //=============================================================================
1093
1094 enum RC {
3893 emit_opcode(cbuf, 0x11);
3894 encode_RegMem(cbuf, srcenc, RSP_enc, 0x4, 0, 0, false); // 2 bytes
3895
3896 // call d2l_fixup
3897 cbuf.set_insts_mark();
3898 emit_opcode(cbuf, 0xE8);
3899 emit_d32_reloc(cbuf,
3900 (int)
3901 (StubRoutines::x86::d2l_fixup() - cbuf.insts_end() - 4),
3902 runtime_call_Relocation::spec(),
3903 RELOC_DISP32);
3904
3905 // popq $dst
3906 if (dstenc >= 8) {
3907 emit_opcode(cbuf, Assembler::REX_B);
3908 }
3909 emit_opcode(cbuf, 0x58 | (dstenc & 7));
3910
3911 // done:
3912 %}
3913
3914 // Safepoint Poll. This polls the safepoint page, and causes an
3915 // exception if it is not readable. Unfortunately, it kills
3916 // RFLAGS in the process.
3917 enc_class enc_safepoint_poll
3918 %{
3919 // testl %rax, off(%rip) // Opcode + ModRM + Disp32 == 6 bytes
3920 // XXX reg_mem doesn't support RIP-relative addressing yet
3921 cbuf.set_insts_mark();
3922 cbuf.relocate(cbuf.insts_mark(), relocInfo::poll_type, 0); // XXX
3923 emit_opcode(cbuf, 0x85); // testl
3924 emit_rm(cbuf, 0x0, RAX_enc, 0x5); // 00 rax 101 == 0x5
3925 // cbuf.insts_mark() is beginning of instruction
3926 emit_d32_reloc(cbuf, os::get_polling_page());
3927 // relocInfo::poll_type,
3928 %}
3929 %}
3930
3931
3932
3933 //----------FRAME--------------------------------------------------------------
3934 // Definition of frame structure and management information.
3935 //
3936 // S T A C K L A Y O U T Allocators stack-slot number
3937 // | (to get allocators register number
3938 // G Owned by | | v add OptoReg::stack0())
3939 // r CALLER | |
3940 // o | +--------+ pad to even-align allocators stack-slot
3941 // w V | pad0 | numbers; owned by CALLER
3942 // t -----------+--------+----> Matcher::_in_arg_limit, unaligned
3943 // h ^ | in | 5
3944 // | | args | 4 Holes in incoming args owned by SELF
3945 // | | | | 3
3946 // | | +--------+
3947 // V | | old out| Empty on Intel, window on Sparc
3948 // | old |preserve| Must be even aligned.
4212 operand immP()
4213 %{
4214 match(ConP);
4215
4216 op_cost(10);
4217 format %{ %}
4218 interface(CONST_INTER);
4219 %}
4220
4221 // NULL Pointer Immediate
4222 operand immP0()
4223 %{
4224 predicate(n->get_ptr() == 0);
4225 match(ConP);
4226
4227 op_cost(5);
4228 format %{ %}
4229 interface(CONST_INTER);
4230 %}
4231
4232 // Pointer Immediate
4233 operand immN() %{
4234 match(ConN);
4235
4236 op_cost(10);
4237 format %{ %}
4238 interface(CONST_INTER);
4239 %}
4240
4241 // NULL Pointer Immediate
4242 operand immN0() %{
4243 predicate(n->get_narrowcon() == 0);
4244 match(ConN);
4245
4246 op_cost(5);
4247 format %{ %}
4248 interface(CONST_INTER);
4249 %}
4250
4251 operand immP31()
6547 instruct loadConP(rRegP dst, immP con) %{
6548 match(Set dst con);
6549
6550 format %{ "movq $dst, $con\t# ptr" %}
6551 ins_encode(load_immP(dst, con));
6552 ins_pipe(ialu_reg_fat); // XXX
6553 %}
6554
6555 instruct loadConP0(rRegP dst, immP0 src, rFlagsReg cr)
6556 %{
6557 match(Set dst src);
6558 effect(KILL cr);
6559
6560 ins_cost(50);
6561 format %{ "xorl $dst, $dst\t# ptr" %}
6562 opcode(0x33); /* + rd */
6563 ins_encode(REX_reg_reg(dst, dst), OpcP, reg_reg(dst, dst));
6564 ins_pipe(ialu_reg);
6565 %}
6566
6567 instruct loadConP31(rRegP dst, immP31 src, rFlagsReg cr)
6568 %{
6569 match(Set dst src);
6570 effect(KILL cr);
6571
6572 ins_cost(60);
6573 format %{ "movl $dst, $src\t# ptr (positive 32-bit)" %}
6574 ins_encode(load_immP31(dst, src));
6575 ins_pipe(ialu_reg);
6576 %}
6577
6578 instruct loadConF(regF dst, immF con) %{
6579 match(Set dst con);
6580 ins_cost(125);
6581 format %{ "movss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
6582 ins_encode %{
6583 __ movflt($dst$$XMMRegister, $constantaddress($con));
6584 %}
6585 ins_pipe(pipe_slow);
6586 %}
12452 %}
12453
12454 instruct cmpFastUnlock(rFlagsReg cr,
12455 rRegP object, rax_RegP box, rRegP tmp)
12456 %{
12457 match(Set cr (FastUnlock object box));
12458 effect(TEMP tmp);
12459
12460 ins_cost(300);
12461 format %{ "fastunlock $object, $box, $tmp" %}
12462 ins_encode(Fast_Unlock(object, box, tmp));
12463 ins_pipe(pipe_slow);
12464 ins_pc_relative(1);
12465 %}
12466
12467
12468 // ============================================================================
12469 // Safepoint Instructions
12470 instruct safePoint_poll(rFlagsReg cr)
12471 %{
12472 match(SafePoint);
12473 effect(KILL cr);
12474
12475 format %{ "testl rax, [rip + #offset_to_poll_page]\t"
12476 "# Safepoint: poll for GC" %}
12477 size(6); // Opcode + ModRM + Disp32 == 6 bytes
12478 ins_cost(125);
12479 ins_encode(enc_safepoint_poll);
12480 ins_pipe(ialu_reg_mem);
12481 %}
12482
12483 // ============================================================================
12484 // Procedure Call/Return Instructions
12485 // Call Java Static Instruction
12486 // Note: If this code changes, the corresponding ret_addr_offset() and
12487 // compute_padding() functions will have to be adjusted.
12488 instruct CallStaticJavaDirect(method meth) %{
12489 match(CallStaticJava);
12490 predicate(!((CallStaticJavaNode*) n)->is_method_handle_invoke());
12491 effect(USE meth);
12492
12493 ins_cost(300);
12494 format %{ "call,static " %}
12495 opcode(0xE8); /* E8 cd */
12496 ins_encode(Java_Static_Call(meth), call_epilog);
12497 ins_pipe(pipe_slow);
12498 ins_pc_relative(1);
12499 ins_alignment(4);
|
557
558 // !!!!! Special hack to get all types of calls to specify the byte offset
559 // from the start of the call to the point where the return address
560 // will point.
561 int MachCallStaticJavaNode::ret_addr_offset()
562 {
563 int offset = 5; // 5 bytes from start of call to where return address points
564 if (_method_handle_invoke)
565 offset += preserve_SP_size();
566 return offset;
567 }
568
569 int MachCallDynamicJavaNode::ret_addr_offset()
570 {
571 return 15; // 15 bytes from start of call to where return address points
572 }
573
574 // In os_cpu .ad file
575 // int MachCallRuntimeNode::ret_addr_offset()
576
577 // Indicate if the safepoint node needs the polling page as an input,
578 // it does if the polling page is more than disp32 away.
579 bool SafePointNode::needs_polling_address_input()
580 {
581 return Assembler::is_polling_page_far();
582 }
583
584 //
585 // Compute padding required for nodes which need alignment
586 //
587
588 // The address of the call instruction needs to be 4-byte aligned to
589 // ensure that it does not span a cache line so that it can be patched.
590 int CallStaticJavaDirectNode::compute_padding(int current_offset) const
591 {
592 current_offset += 1; // skip call opcode byte
593 return round_to(current_offset, alignment_required()) - current_offset;
594 }
595
596 // The address of the call instruction needs to be 4-byte aligned to
597 // ensure that it does not span a cache line so that it can be patched.
598 int CallStaticJavaHandleNode::compute_padding(int current_offset) const
599 {
600 current_offset += preserve_SP_size(); // skip mov rbp, rsp
601 current_offset += 1; // skip call opcode byte
974 // the hard way
975 }
976
977 int MachPrologNode::reloc() const
978 {
979 return 0; // a large enough number
980 }
981
982 //=============================================================================
983 #ifndef PRODUCT
984 void MachEpilogNode::format(PhaseRegAlloc* ra_, outputStream* st) const
985 {
986 Compile* C = ra_->C;
987 int framesize = C->frame_slots() << LogBytesPerInt;
988 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
989 // Remove word for return adr already pushed
990 // and RBP
991 framesize -= 2*wordSize;
992
993 if (framesize) {
994 st->print_cr("addq rsp, %d\t# Destroy frame", framesize);
995 st->print("\t");
996 }
997
998 st->print_cr("popq rbp");
999 if (do_polling() && C->is_method_compilation()) {
1000 st->print("\t");
1001 if (Assembler::is_polling_page_far()) {
1002 st->print_cr("movq rscratch1, #polling_page_address\n\t"
1003 "testl rax, [rscratch1]\t"
1004 "# Safepoint: poll for GC");
1005 } else {
1006 st->print_cr("testl rax, [rip + #offset_to_poll_page]\t"
1007 "# Safepoint: poll for GC");
1008 }
1009 }
1010 }
1011 #endif
1012
1013 void MachEpilogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
1014 {
1015 Compile* C = ra_->C;
1016 int framesize = C->frame_slots() << LogBytesPerInt;
1017 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
1018 // Remove word for return adr already pushed
1019 // and RBP
1020 framesize -= 2*wordSize;
1021
1022 // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
1023
1024 if (framesize) {
1025 emit_opcode(cbuf, Assembler::REX_W);
1026 if (framesize < 0x80) {
1027 emit_opcode(cbuf, 0x83); // addq rsp, #framesize
1028 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
1029 emit_d8(cbuf, framesize);
1030 } else {
1031 emit_opcode(cbuf, 0x81); // addq rsp, #framesize
1032 emit_rm(cbuf, 0x3, 0x00, RSP_enc);
1033 emit_d32(cbuf, framesize);
1034 }
1035 }
1036
1037 // popq rbp
1038 emit_opcode(cbuf, 0x58 | RBP_enc);
1039
1040 if (do_polling() && C->is_method_compilation()) {
1041 MacroAssembler _masm(&cbuf);
1042 AddressLiteral polling_page(os::get_polling_page(), relocInfo::poll_return_type);
1043 if (Assembler::is_polling_page_far()) {
1044 __ lea(rscratch1, polling_page);
1045 __ relocate(relocInfo::poll_return_type);
1046 __ testl(rax, Address(rscratch1, 0));
1047 } else {
1048 __ testl(rax, polling_page);
1049 }
1050 }
1051 }
1052
1053 uint MachEpilogNode::size(PhaseRegAlloc* ra_) const
1054 {
1055 return MachNode::size(ra_); // too many variables; just compute it
1056 // the hard way
1057 }
1058
1059 int MachEpilogNode::reloc() const
1060 {
1061 return 2; // a large enough number
1062 }
1063
1064 const Pipeline* MachEpilogNode::pipeline() const
1065 {
1066 return MachNode::pipeline_class();
1067 }
1068
1069 int MachEpilogNode::safepoint_offset() const
1070 {
1071 return 0;
1072 }
1073
1074 //=============================================================================
1075
1076 enum RC {
3875 emit_opcode(cbuf, 0x11);
3876 encode_RegMem(cbuf, srcenc, RSP_enc, 0x4, 0, 0, false); // 2 bytes
3877
3878 // call d2l_fixup
3879 cbuf.set_insts_mark();
3880 emit_opcode(cbuf, 0xE8);
3881 emit_d32_reloc(cbuf,
3882 (int)
3883 (StubRoutines::x86::d2l_fixup() - cbuf.insts_end() - 4),
3884 runtime_call_Relocation::spec(),
3885 RELOC_DISP32);
3886
3887 // popq $dst
3888 if (dstenc >= 8) {
3889 emit_opcode(cbuf, Assembler::REX_B);
3890 }
3891 emit_opcode(cbuf, 0x58 | (dstenc & 7));
3892
3893 // done:
3894 %}
3895 %}
3896
3897
3898
3899 //----------FRAME--------------------------------------------------------------
3900 // Definition of frame structure and management information.
3901 //
3902 // S T A C K L A Y O U T Allocators stack-slot number
3903 // | (to get allocators register number
3904 // G Owned by | | v add OptoReg::stack0())
3905 // r CALLER | |
3906 // o | +--------+ pad to even-align allocators stack-slot
3907 // w V | pad0 | numbers; owned by CALLER
3908 // t -----------+--------+----> Matcher::_in_arg_limit, unaligned
3909 // h ^ | in | 5
3910 // | | args | 4 Holes in incoming args owned by SELF
3911 // | | | | 3
3912 // | | +--------+
3913 // V | | old out| Empty on Intel, window on Sparc
3914 // | old |preserve| Must be even aligned.
4178 operand immP()
4179 %{
4180 match(ConP);
4181
4182 op_cost(10);
4183 format %{ %}
4184 interface(CONST_INTER);
4185 %}
4186
4187 // NULL Pointer Immediate
4188 operand immP0()
4189 %{
4190 predicate(n->get_ptr() == 0);
4191 match(ConP);
4192
4193 op_cost(5);
4194 format %{ %}
4195 interface(CONST_INTER);
4196 %}
4197
4198 operand immP_poll() %{
4199 predicate(n->get_ptr() != 0 && n->get_ptr() == (intptr_t)os::get_polling_page());
4200 match(ConP);
4201
4202 // formats are generated automatically for constants and base registers
4203 format %{ %}
4204 interface(CONST_INTER);
4205 %}
4206
4207 // Pointer Immediate
4208 operand immN() %{
4209 match(ConN);
4210
4211 op_cost(10);
4212 format %{ %}
4213 interface(CONST_INTER);
4214 %}
4215
4216 // NULL Pointer Immediate
4217 operand immN0() %{
4218 predicate(n->get_narrowcon() == 0);
4219 match(ConN);
4220
4221 op_cost(5);
4222 format %{ %}
4223 interface(CONST_INTER);
4224 %}
4225
4226 operand immP31()
6522 instruct loadConP(rRegP dst, immP con) %{
6523 match(Set dst con);
6524
6525 format %{ "movq $dst, $con\t# ptr" %}
6526 ins_encode(load_immP(dst, con));
6527 ins_pipe(ialu_reg_fat); // XXX
6528 %}
6529
6530 instruct loadConP0(rRegP dst, immP0 src, rFlagsReg cr)
6531 %{
6532 match(Set dst src);
6533 effect(KILL cr);
6534
6535 ins_cost(50);
6536 format %{ "xorl $dst, $dst\t# ptr" %}
6537 opcode(0x33); /* + rd */
6538 ins_encode(REX_reg_reg(dst, dst), OpcP, reg_reg(dst, dst));
6539 ins_pipe(ialu_reg);
6540 %}
6541
6542 instruct loadConP_poll(rRegP dst, immP_poll src) %{
6543 match(Set dst src);
6544 format %{ "movq $dst, $src\t!ptr" %}
6545 ins_encode %{
6546 AddressLiteral polling_page(os::get_polling_page(), relocInfo::poll_type);
6547 __ lea($dst$$Register, polling_page);
6548 %}
6549 ins_pipe(ialu_reg_fat);
6550 %}
6551
6552 instruct loadConP31(rRegP dst, immP31 src, rFlagsReg cr)
6553 %{
6554 match(Set dst src);
6555 effect(KILL cr);
6556
6557 ins_cost(60);
6558 format %{ "movl $dst, $src\t# ptr (positive 32-bit)" %}
6559 ins_encode(load_immP31(dst, src));
6560 ins_pipe(ialu_reg);
6561 %}
6562
6563 instruct loadConF(regF dst, immF con) %{
6564 match(Set dst con);
6565 ins_cost(125);
6566 format %{ "movss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
6567 ins_encode %{
6568 __ movflt($dst$$XMMRegister, $constantaddress($con));
6569 %}
6570 ins_pipe(pipe_slow);
6571 %}
12437 %}
12438
12439 instruct cmpFastUnlock(rFlagsReg cr,
12440 rRegP object, rax_RegP box, rRegP tmp)
12441 %{
12442 match(Set cr (FastUnlock object box));
12443 effect(TEMP tmp);
12444
12445 ins_cost(300);
12446 format %{ "fastunlock $object, $box, $tmp" %}
12447 ins_encode(Fast_Unlock(object, box, tmp));
12448 ins_pipe(pipe_slow);
12449 ins_pc_relative(1);
12450 %}
12451
12452
12453 // ============================================================================
12454 // Safepoint Instructions
12455 instruct safePoint_poll(rFlagsReg cr)
12456 %{
12457 predicate(!Assembler::is_polling_page_far());
12458 match(SafePoint);
12459 effect(KILL cr);
12460
12461 format %{ "testl rax, [rip + #offset_to_poll_page]\t"
12462 "# Safepoint: poll for GC" %}
12463 ins_cost(125);
12464 ins_encode %{
12465 AddressLiteral addr(os::get_polling_page(), relocInfo::poll_type);
12466 __ testl(rax, addr);
12467 %}
12468 ins_pipe(ialu_reg_mem);
12469 %}
12470
12471 instruct safePoint_poll_far(rFlagsReg cr, rRegP poll)
12472 %{
12473 predicate(Assembler::is_polling_page_far());
12474 match(SafePoint poll);
12475 effect(KILL cr, USE poll);
12476
12477 format %{ "testl rax, [$poll]\t"
12478 "# Safepoint: poll for GC" %}
12479 ins_cost(125);
12480 ins_encode %{
12481 __ relocate(relocInfo::poll_type);
12482 __ testl(rax, Address($poll$$Register, 0));
12483 %}
12484 ins_pipe(ialu_reg_mem);
12485 %}
12486
12487 // ============================================================================
12488 // Procedure Call/Return Instructions
12489 // Call Java Static Instruction
12490 // Note: If this code changes, the corresponding ret_addr_offset() and
12491 // compute_padding() functions will have to be adjusted.
12492 instruct CallStaticJavaDirect(method meth) %{
12493 match(CallStaticJava);
12494 predicate(!((CallStaticJavaNode*) n)->is_method_handle_invoke());
12495 effect(USE meth);
12496
12497 ins_cost(300);
12498 format %{ "call,static " %}
12499 opcode(0xE8); /* E8 cd */
12500 ins_encode(Java_Static_Call(meth), call_epilog);
12501 ins_pipe(pipe_slow);
12502 ins_pc_relative(1);
12503 ins_alignment(4);
|