20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25  private:
  26 
  27   //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  28   //
  29   // Sparc load/store emission
  30   //
  31   // The sparc ld/st instructions cannot accomodate displacements > 13 bits long.
  32   // The following "pseudo" sparc instructions (load/store) make it easier to use the indexed addressing mode
  33   // by allowing 32 bit displacements:
  34   //
  35   //    When disp <= 13 bits long, a single load or store instruction is emitted with (disp + [d]).
  36   //    When disp >  13 bits long, code is emitted to set the displacement into the O7 register,
  37   //       and then a load or store is emitted with ([O7] + [d]).
  38   //
  39 
  40   // some load/store variants return the code_offset for proper positioning of debug info for null checks

  41 
  42   // load/store with 32 bit displacement
  43   int load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
  44   void store(Register value, Register base, int offset, BasicType type, CodeEmitInfo *info = NULL);
  45 
  46   // loadf/storef with 32 bit displacement
  47   void load(Register s, int disp, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL);
  48   void store(FloatRegister d, Register s1, int disp, BasicType st_type, CodeEmitInfo* info = NULL);
  49 
  50   // convienence methods for calling load/store with an Address
  51   void load(const Address& a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0);
  52   void store(Register d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0);
  53   void load(const Address& a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0);
  54   void store(FloatRegister d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0);
  55 
  56   // convienence methods for calling load/store with an LIR_Address
  57   void load(LIR_Address* a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL);
  58   void store(Register d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL);
  59   void load(LIR_Address* a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL);
  60   void store(FloatRegister d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL);
  61 
  62   int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool unaligned = false);
  63   int store(LIR_Opr from_reg, Register base, Register disp, BasicType type);
  64 
  65   int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool unaligned = false);
  66   int load(Register base, Register disp, LIR_Opr to_reg, BasicType type);
  67 
  68   void monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register hdr, int monitor_no);
  69 
  70   int shift_amount(BasicType t);
  71 
  72   static bool is_single_instruction(LIR_Op* op);
  73 
  74   // Record the type of the receiver in ReceiverTypeData
  75   void type_profile_helper(Register mdo, int mdo_offset_bias,
  76                            ciMethodData *md, ciProfileData *data,
  77                            Register recv, Register tmp1, Label* update_done);
  78   // Setup pointers to MDO, MDO slot, also compute offset bias to access the slot.
  79   void setup_md_access(ciMethod* method, int bci,
  80                        ciMethodData*& md, ciProfileData*& data, int& mdo_offset_bias);
  81  public:
  82   void   pack64(LIR_Opr src, LIR_Opr dst);
  83   void unpack64(LIR_Opr src, LIR_Opr dst);
  84 
  85 enum {
  86 #ifdef _LP64

  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25  private:
  26 
  27   //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  28   //
  29   // Sparc load/store emission
  30   //
  31   // The sparc ld/st instructions cannot accomodate displacements > 13 bits long.
  32   // The following "pseudo" sparc instructions (load/store) make it easier to use the indexed addressing mode
  33   // by allowing 32 bit displacements:
  34   //
  35   //    When disp <= 13 bits long, a single load or store instruction is emitted with (disp + [d]).
  36   //    When disp >  13 bits long, code is emitted to set the displacement into the O7 register,
  37   //       and then a load or store is emitted with ([O7] + [d]).
  38   //
  39 
  40   int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned);
  41   int store(LIR_Opr from_reg, Register base, Register disp, BasicType type, bool wide);
  42 
  43   int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned);
  44   int load(Register base, Register disp, LIR_Opr to_reg, BasicType type, bool wide);























  45 
  46   void monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register hdr, int monitor_no);
  47 
  48   int shift_amount(BasicType t);
  49 
  50   static bool is_single_instruction(LIR_Op* op);
  51 
  52   // Record the type of the receiver in ReceiverTypeData
  53   void type_profile_helper(Register mdo, int mdo_offset_bias,
  54                            ciMethodData *md, ciProfileData *data,
  55                            Register recv, Register tmp1, Label* update_done);
  56   // Setup pointers to MDO, MDO slot, also compute offset bias to access the slot.
  57   void setup_md_access(ciMethod* method, int bci,
  58                        ciMethodData*& md, ciProfileData*& data, int& mdo_offset_bias);
  59  public:
  60   void   pack64(LIR_Opr src, LIR_Opr dst);
  61   void unpack64(LIR_Opr src, LIR_Opr dst);
  62 
  63 enum {
  64 #ifdef _LP64