1 /*
   2  * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "incls/_precompiled.incl"
  26 #include "incls/_c1_CodeStubs_x86.cpp.incl"
  27 
  28 
  29 #define __ ce->masm()->
  30 
  31 float ConversionStub::float_zero = 0.0;
  32 double ConversionStub::double_zero = 0.0;
  33 
  34 void ConversionStub::emit_code(LIR_Assembler* ce) {
  35   __ bind(_entry);
  36   assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
  37 
  38 
  39   if (input()->is_single_xmm()) {
  40     __ comiss(input()->as_xmm_float_reg(),
  41               ExternalAddress((address)&float_zero));
  42   } else if (input()->is_double_xmm()) {
  43     __ comisd(input()->as_xmm_double_reg(),
  44               ExternalAddress((address)&double_zero));
  45   } else {
  46     LP64_ONLY(ShouldNotReachHere());
  47     __ push(rax);
  48     __ ftst();
  49     __ fnstsw_ax();
  50     __ sahf();
  51     __ pop(rax);
  52   }
  53 
  54   Label NaN, do_return;
  55   __ jccb(Assembler::parity, NaN);
  56   __ jccb(Assembler::below, do_return);
  57 
  58   // input is > 0 -> return maxInt
  59   // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
  60   __ decrement(result()->as_register());
  61   __ jmpb(do_return);
  62 
  63   // input is NaN -> return 0
  64   __ bind(NaN);
  65   __ xorptr(result()->as_register(), result()->as_register());
  66 
  67   __ bind(do_return);
  68   __ jmp(_continuation);
  69 }
  70 
  71 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
  72   __ bind(_entry);
  73   ce->store_parameter(_method->as_register(), 1);
  74   ce->store_parameter(_bci, 0);
  75   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
  76   ce->add_call_info_here(_info);
  77   ce->verify_oop_map(_info);
  78   __ jmp(_continuation);
  79 }
  80 
  81 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
  82                                bool throw_index_out_of_bounds_exception)
  83   : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
  84   , _index(index)
  85 {
  86   assert(info != NULL, "must have info");
  87   _info = new CodeEmitInfo(info);
  88 }
  89 
  90 
  91 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
  92   __ bind(_entry);
  93   // pass the array index on stack because all registers must be preserved
  94   if (_index->is_cpu_register()) {
  95     ce->store_parameter(_index->as_register(), 0);
  96   } else {
  97     ce->store_parameter(_index->as_jint(), 0);
  98   }
  99   Runtime1::StubID stub_id;
 100   if (_throw_index_out_of_bounds_exception) {
 101     stub_id = Runtime1::throw_index_exception_id;
 102   } else {
 103     stub_id = Runtime1::throw_range_check_failed_id;
 104   }
 105   __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
 106   ce->add_call_info_here(_info);
 107   debug_only(__ should_not_reach_here());
 108 }
 109 
 110 
 111 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
 112   if (_offset != -1) {
 113     ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
 114   }
 115   __ bind(_entry);
 116   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
 117   ce->add_call_info_here(_info);
 118   debug_only(__ should_not_reach_here());
 119 }
 120 
 121 
 122 // Implementation of NewInstanceStub
 123 
 124 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
 125   _result = result;
 126   _klass = klass;
 127   _klass_reg = klass_reg;
 128   _info = new CodeEmitInfo(info);
 129   assert(stub_id == Runtime1::new_instance_id                 ||
 130          stub_id == Runtime1::fast_new_instance_id            ||
 131          stub_id == Runtime1::fast_new_instance_init_check_id,
 132          "need new_instance id");
 133   _stub_id   = stub_id;
 134 }
 135 
 136 
 137 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
 138   assert(__ rsp_offset() == 0, "frame size should be fixed");
 139   __ bind(_entry);
 140   __ movptr(rdx, _klass_reg->as_register());
 141   __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
 142   ce->add_call_info_here(_info);
 143   ce->verify_oop_map(_info);
 144   assert(_result->as_register() == rax, "result must in rax,");
 145   __ jmp(_continuation);
 146 }
 147 
 148 
 149 // Implementation of NewTypeArrayStub
 150 
 151 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
 152   _klass_reg = klass_reg;
 153   _length = length;
 154   _result = result;
 155   _info = new CodeEmitInfo(info);
 156 }
 157 
 158 
 159 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
 160   assert(__ rsp_offset() == 0, "frame size should be fixed");
 161   __ bind(_entry);
 162   assert(_length->as_register() == rbx, "length must in rbx,");
 163   assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
 164   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
 165   ce->add_call_info_here(_info);
 166   ce->verify_oop_map(_info);
 167   assert(_result->as_register() == rax, "result must in rax,");
 168   __ jmp(_continuation);
 169 }
 170 
 171 
 172 // Implementation of NewObjectArrayStub
 173 
 174 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
 175   _klass_reg = klass_reg;
 176   _result = result;
 177   _length = length;
 178   _info = new CodeEmitInfo(info);
 179 }
 180 
 181 
 182 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
 183   assert(__ rsp_offset() == 0, "frame size should be fixed");
 184   __ bind(_entry);
 185   assert(_length->as_register() == rbx, "length must in rbx,");
 186   assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
 187   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
 188   ce->add_call_info_here(_info);
 189   ce->verify_oop_map(_info);
 190   assert(_result->as_register() == rax, "result must in rax,");
 191   __ jmp(_continuation);
 192 }
 193 
 194 
 195 // Implementation of MonitorAccessStubs
 196 
 197 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
 198 : MonitorAccessStub(obj_reg, lock_reg)
 199 {
 200   _info = new CodeEmitInfo(info);
 201 }
 202 
 203 
 204 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
 205   assert(__ rsp_offset() == 0, "frame size should be fixed");
 206   __ bind(_entry);
 207   ce->store_parameter(_obj_reg->as_register(),  1);
 208   ce->store_parameter(_lock_reg->as_register(), 0);
 209   Runtime1::StubID enter_id;
 210   if (ce->compilation()->has_fpu_code()) {
 211     enter_id = Runtime1::monitorenter_id;
 212   } else {
 213     enter_id = Runtime1::monitorenter_nofpu_id;
 214   }
 215   __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
 216   ce->add_call_info_here(_info);
 217   ce->verify_oop_map(_info);
 218   __ jmp(_continuation);
 219 }
 220 
 221 
 222 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
 223   __ bind(_entry);
 224   if (_compute_lock) {
 225     // lock_reg was destroyed by fast unlocking attempt => recompute it
 226     ce->monitor_address(_monitor_ix, _lock_reg);
 227   }
 228   ce->store_parameter(_lock_reg->as_register(), 0);
 229   // note: non-blocking leaf routine => no call info needed
 230   Runtime1::StubID exit_id;
 231   if (ce->compilation()->has_fpu_code()) {
 232     exit_id = Runtime1::monitorexit_id;
 233   } else {
 234     exit_id = Runtime1::monitorexit_nofpu_id;
 235   }
 236   __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
 237   __ jmp(_continuation);
 238 }
 239 
 240 
 241 // Implementation of patching:
 242 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
 243 // - Replace original code with a call to the stub
 244 // At Runtime:
 245 // - call to stub, jump to runtime
 246 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
 247 // - in runtime: after initializing class, restore original code, reexecute instruction
 248 
 249 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
 250 
 251 void PatchingStub::align_patch_site(MacroAssembler* masm) {
 252   // We're patching a 5-7 byte instruction on intel and we need to
 253   // make sure that we don't see a piece of the instruction.  It
 254   // appears mostly impossible on Intel to simply invalidate other
 255   // processors caches and since they may do aggressive prefetch it's
 256   // very hard to make a guess about what code might be in the icache.
 257   // Force the instruction to be double word aligned so that it
 258   // doesn't span a cache line.
 259   masm->align(round_to(NativeGeneralJump::instruction_size, wordSize));
 260 }
 261 
 262 void PatchingStub::emit_code(LIR_Assembler* ce) {
 263   assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
 264 
 265   Label call_patch;
 266 
 267   // static field accesses have special semantics while the class
 268   // initializer is being run so we emit a test which can be used to
 269   // check that this code is being executed by the initializing
 270   // thread.
 271   address being_initialized_entry = __ pc();
 272   if (CommentedAssembly) {
 273     __ block_comment(" patch template");
 274   }
 275   if (_id == load_klass_id) {
 276     // produce a copy of the load klass instruction for use by the being initialized case
 277     address start = __ pc();
 278     jobject o = NULL;
 279     __ movoop(_obj, o);
 280 #ifdef ASSERT
 281     for (int i = 0; i < _bytes_to_copy; i++) {
 282       address ptr = (address)(_pc_start + i);
 283       int a_byte = (*ptr) & 0xFF;
 284       assert(a_byte == *start++, "should be the same code");
 285     }
 286 #endif
 287   } else {
 288     // make a copy the code which is going to be patched.
 289     for ( int i = 0; i < _bytes_to_copy; i++) {
 290       address ptr = (address)(_pc_start + i);
 291       int a_byte = (*ptr) & 0xFF;
 292       __ a_byte (a_byte);
 293       *ptr = 0x90; // make the site look like a nop
 294     }
 295   }
 296 
 297   address end_of_patch = __ pc();
 298   int bytes_to_skip = 0;
 299   if (_id == load_klass_id) {
 300     int offset = __ offset();
 301     if (CommentedAssembly) {
 302       __ block_comment(" being_initialized check");
 303     }
 304     assert(_obj != noreg, "must be a valid register");
 305     Register tmp = rax;
 306     if (_obj == tmp) tmp = rbx;
 307     __ push(tmp);
 308     __ get_thread(tmp);
 309     __ cmpptr(tmp, Address(_obj, instanceKlass::init_thread_offset_in_bytes() + sizeof(klassOopDesc)));
 310     __ pop(tmp);
 311     __ jcc(Assembler::notEqual, call_patch);
 312 
 313     // access_field patches may execute the patched code before it's
 314     // copied back into place so we need to jump back into the main
 315     // code of the nmethod to continue execution.
 316     __ jmp(_patch_site_continuation);
 317 
 318     // make sure this extra code gets skipped
 319     bytes_to_skip += __ offset() - offset;
 320   }
 321   if (CommentedAssembly) {
 322     __ block_comment("patch data encoded as movl");
 323   }
 324   // Now emit the patch record telling the runtime how to find the
 325   // pieces of the patch.  We only need 3 bytes but for readability of
 326   // the disassembly we make the data look like a movl reg, imm32,
 327   // which requires 5 bytes
 328   int sizeof_patch_record = 5;
 329   bytes_to_skip += sizeof_patch_record;
 330 
 331   // emit the offsets needed to find the code to patch
 332   int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
 333 
 334   __ a_byte(0xB8);
 335   __ a_byte(0);
 336   __ a_byte(being_initialized_entry_offset);
 337   __ a_byte(bytes_to_skip);
 338   __ a_byte(_bytes_to_copy);
 339   address patch_info_pc = __ pc();
 340   assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
 341 
 342   address entry = __ pc();
 343   NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
 344   address target = NULL;
 345   switch (_id) {
 346     case access_field_id:  target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
 347     case load_klass_id:    target = Runtime1::entry_for(Runtime1::load_klass_patching_id); break;
 348     default: ShouldNotReachHere();
 349   }
 350   __ bind(call_patch);
 351 
 352   if (CommentedAssembly) {
 353     __ block_comment("patch entry point");
 354   }
 355   __ call(RuntimeAddress(target));
 356   assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
 357   ce->add_call_info_here(_info);
 358   int jmp_off = __ offset();
 359   __ jmp(_patch_site_entry);
 360   // Add enough nops so deoptimization can overwrite the jmp above with a call
 361   // and not destroy the world.
 362   for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
 363     __ nop();
 364   }
 365   if (_id == load_klass_id) {
 366     CodeSection* cs = __ code_section();
 367     RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
 368     relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, relocInfo::oop_type, relocInfo::none);
 369   }
 370 }
 371 
 372 
 373 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
 374   __ bind(_entry);
 375   __ call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack_with_reexecution()));
 376   ce->add_call_info_here(_info);
 377   debug_only(__ should_not_reach_here());
 378 }
 379 
 380 
 381 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
 382   ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
 383   __ bind(_entry);
 384   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id)));
 385   ce->add_call_info_here(_info);
 386   debug_only(__ should_not_reach_here());
 387 }
 388 
 389 
 390 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
 391   assert(__ rsp_offset() == 0, "frame size should be fixed");
 392 
 393   __ bind(_entry);
 394   // pass the object on stack because all registers must be preserved
 395   if (_obj->is_cpu_register()) {
 396     ce->store_parameter(_obj->as_register(), 0);
 397   }
 398   __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
 399   ce->add_call_info_here(_info);
 400   debug_only(__ should_not_reach_here());
 401 }
 402 
 403 
 404 ArrayStoreExceptionStub::ArrayStoreExceptionStub(CodeEmitInfo* info):
 405   _info(info) {
 406 }
 407 
 408 
 409 void ArrayStoreExceptionStub::emit_code(LIR_Assembler* ce) {
 410   assert(__ rsp_offset() == 0, "frame size should be fixed");
 411   __ bind(_entry);
 412   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_array_store_exception_id)));
 413   ce->add_call_info_here(_info);
 414   debug_only(__ should_not_reach_here());
 415 }
 416 
 417 
 418 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
 419   //---------------slow case: call to native-----------------
 420   __ bind(_entry);
 421   // Figure out where the args should go
 422   // This should really convert the IntrinsicID to the methodOop and signature
 423   // but I don't know how to do that.
 424   //
 425   VMRegPair args[5];
 426   BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
 427   SharedRuntime::java_calling_convention(signature, args, 5, true);
 428 
 429   // push parameters
 430   // (src, src_pos, dest, destPos, length)
 431   Register r[5];
 432   r[0] = src()->as_register();
 433   r[1] = src_pos()->as_register();
 434   r[2] = dst()->as_register();
 435   r[3] = dst_pos()->as_register();
 436   r[4] = length()->as_register();
 437 
 438   // next registers will get stored on the stack
 439   for (int i = 0; i < 5 ; i++ ) {
 440     VMReg r_1 = args[i].first();
 441     if (r_1->is_stack()) {
 442       int st_off = r_1->reg2stack() * wordSize;
 443       __ movptr (Address(rsp, st_off), r[i]);
 444     } else {
 445       assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
 446     }
 447   }
 448 
 449   ce->align_call(lir_static_call);
 450 
 451   ce->emit_static_call_stub();
 452   AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
 453                          relocInfo::static_call_type);
 454   __ call(resolve);
 455   ce->add_call_info_here(info());
 456 
 457 #ifndef PRODUCT
 458   __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
 459 #endif
 460 
 461   __ jmp(_continuation);
 462 }
 463 
 464 /////////////////////////////////////////////////////////////////////////////
 465 #ifndef SERIALGC
 466 
 467 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
 468 
 469   // At this point we know that marking is in progress
 470 
 471   __ bind(_entry);
 472   assert(pre_val()->is_register(), "Precondition.");
 473 
 474   Register pre_val_reg = pre_val()->as_register();
 475 
 476   ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false);
 477 
 478   __ cmpptr(pre_val_reg, (int32_t) NULL_WORD);
 479   __ jcc(Assembler::equal, _continuation);
 480   ce->store_parameter(pre_val()->as_register(), 0);
 481   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id)));
 482   __ jmp(_continuation);
 483 
 484 }
 485 
 486 jbyte* G1PostBarrierStub::_byte_map_base = NULL;
 487 
 488 jbyte* G1PostBarrierStub::byte_map_base_slow() {
 489   BarrierSet* bs = Universe::heap()->barrier_set();
 490   assert(bs->is_a(BarrierSet::G1SATBCTLogging),
 491          "Must be if we're using this.");
 492   return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
 493 }
 494 
 495 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
 496   __ bind(_entry);
 497   assert(addr()->is_register(), "Precondition.");
 498   assert(new_val()->is_register(), "Precondition.");
 499   Register new_val_reg = new_val()->as_register();
 500   __ cmpptr(new_val_reg, (int32_t) NULL_WORD);
 501   __ jcc(Assembler::equal, _continuation);
 502   ce->store_parameter(addr()->as_pointer_register(), 0);
 503   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id)));
 504   __ jmp(_continuation);
 505 }
 506 
 507 #endif // SERIALGC
 508 /////////////////////////////////////////////////////////////////////////////
 509 
 510 #undef __