109 static LIR_Opr as_long_opr(Register r, Register r2) { 110 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); 111 } 112 static LIR_Opr as_pointer_opr(Register r) { 113 return LIR_OprFact::single_cpu(cpu_reg2rnr(r)); 114 } 115 #endif // _LP64 116 117 // VMReg name for spilled physical FPU stack slot n 118 static VMReg fpu_regname (int n); 119 120 static XMMRegister nr2xmmreg(int rnr); 121 122 static bool is_caller_save_register (LIR_Opr opr) { return true; } 123 static bool is_caller_save_register (Register r) { return true; } 124 125 static LIR_Opr caller_save_xmm_reg_at(int i) { 126 assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds"); 127 return _caller_save_xmm_regs[i]; 128 } | 109 static LIR_Opr as_long_opr(Register r, Register r2) { 110 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2)); 111 } 112 static LIR_Opr as_pointer_opr(Register r) { 113 return LIR_OprFact::single_cpu(cpu_reg2rnr(r)); 114 } 115 #endif // _LP64 116 117 // VMReg name for spilled physical FPU stack slot n 118 static VMReg fpu_regname (int n); 119 120 static XMMRegister nr2xmmreg(int rnr); 121 122 static bool is_caller_save_register (LIR_Opr opr) { return true; } 123 static bool is_caller_save_register (Register r) { return true; } 124 125 static LIR_Opr caller_save_xmm_reg_at(int i) { 126 assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds"); 127 return _caller_save_xmm_regs[i]; 128 } 129 130 // The amount of allocatable registers can change depending 131 // on whether compressed oops are on. 132 static int cpu_reg_range_reduction() { 133 #ifdef _LP64 134 if (UseCompressedOops) { 135 // Reducing the allocatable range by 1 effectively excluding r12. 136 return 1; 137 } 138 #endif 139 return 0; 140 } |