src/cpu/sparc/vm/assembler_sparc.hpp
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*** old/src/cpu/sparc/vm/assembler_sparc.hpp	Thu Nov 25 07:05:47 2010
--- new/src/cpu/sparc/vm/assembler_sparc.hpp	Thu Nov 25 07:05:47 2010

*** 832,841 **** --- 832,849 ---- bool is_in_wdisp16_range(Label& L) { intptr_t d = intptr_t(pc()) - intptr_t(target(L)); return is_simm(d, 18); } + static CC heap_oop_cc() { + #ifdef _LP64 + if (UseCompressedOops) return icc; + else return xcc; + #endif + return icc; + } + enum ASIs { // page 72, v9 ASI_PRIMARY = 0x80, ASI_PRIMARY_LITTLE = 0x88 // add more from book as needed };
*** 1796,1805 **** --- 1804,1817 ---- MacroAssembler* delayed() { Assembler::delayed(); return this; } // branches that use right instruction for v8 vs. v9 inline void br( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none ); inline void br( Condition c, bool a, Predict p, Label& L ); + // branches on specific condition code (always icc on 32 bit) + inline void br( Condition c, CC cc, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none ); + inline void br( Condition c, CC cc, bool a, Predict p, Label& L ); + inline void fb( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none ); inline void fb( Condition c, bool a, Predict p, Label& L ); // compares register with zero and branches (V9 and V8 instructions) void br_zero( Condition c, bool a, Predict p, Register s1, Label& L);

src/cpu/sparc/vm/assembler_sparc.hpp
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