src/cpu/x86/vm/assembler_x86.hpp
Index Unified diffs Context diffs Sdiffs Patch New Old Previous File Next File c1-coops Sdiff src/cpu/x86/vm

src/cpu/x86/vm/assembler_x86.hpp

Print this page




 118 REGISTER_DECLARATION(XMMRegister, j_farg0, xmm0);
 119 REGISTER_DECLARATION(XMMRegister, j_farg1, xmm1);
 120 REGISTER_DECLARATION(XMMRegister, j_farg2, xmm2);
 121 REGISTER_DECLARATION(XMMRegister, j_farg3, xmm3);
 122 REGISTER_DECLARATION(XMMRegister, j_farg4, xmm4);
 123 REGISTER_DECLARATION(XMMRegister, j_farg5, xmm5);
 124 REGISTER_DECLARATION(XMMRegister, j_farg6, xmm6);
 125 REGISTER_DECLARATION(XMMRegister, j_farg7, xmm7);
 126 
 127 REGISTER_DECLARATION(Register, rscratch1, r10);  // volatile
 128 REGISTER_DECLARATION(Register, rscratch2, r11);  // volatile
 129 
 130 REGISTER_DECLARATION(Register, r12_heapbase, r12); // callee-saved
 131 REGISTER_DECLARATION(Register, r15_thread, r15); // callee-saved
 132 
 133 #else
 134 // rscratch1 will apear in 32bit code that is dead but of course must compile
 135 // Using noreg ensures if the dead code is incorrectly live and executed it
 136 // will cause an assertion failure
 137 #define rscratch1 noreg

 138 
 139 #endif // _LP64
 140 
 141 // JSR 292 fixed register usages:
 142 REGISTER_DECLARATION(Register, rbp_mh_SP_save, rbp);
 143 
 144 // Address is an abstraction used to represent a memory location
 145 // using any of the amd64 addressing modes with one object.
 146 //
 147 // Note: A register location is represented via a Register, not
 148 //       via an address for efficiency & simplicity reasons.
 149 
 150 class ArrayAddress;
 151 
 152 class Address VALUE_OBJ_CLASS_SPEC {
 153  public:
 154   enum ScaleFactor {
 155     no_scale = -1,
 156     times_1  =  0,
 157     times_2  =  1,




 118 REGISTER_DECLARATION(XMMRegister, j_farg0, xmm0);
 119 REGISTER_DECLARATION(XMMRegister, j_farg1, xmm1);
 120 REGISTER_DECLARATION(XMMRegister, j_farg2, xmm2);
 121 REGISTER_DECLARATION(XMMRegister, j_farg3, xmm3);
 122 REGISTER_DECLARATION(XMMRegister, j_farg4, xmm4);
 123 REGISTER_DECLARATION(XMMRegister, j_farg5, xmm5);
 124 REGISTER_DECLARATION(XMMRegister, j_farg6, xmm6);
 125 REGISTER_DECLARATION(XMMRegister, j_farg7, xmm7);
 126 
 127 REGISTER_DECLARATION(Register, rscratch1, r10);  // volatile
 128 REGISTER_DECLARATION(Register, rscratch2, r11);  // volatile
 129 
 130 REGISTER_DECLARATION(Register, r12_heapbase, r12); // callee-saved
 131 REGISTER_DECLARATION(Register, r15_thread, r15); // callee-saved
 132 
 133 #else
 134 // rscratch1 will apear in 32bit code that is dead but of course must compile
 135 // Using noreg ensures if the dead code is incorrectly live and executed it
 136 // will cause an assertion failure
 137 #define rscratch1 noreg
 138 #define rscratch2 noreg
 139 
 140 #endif // _LP64
 141 
 142 // JSR 292 fixed register usages:
 143 REGISTER_DECLARATION(Register, rbp_mh_SP_save, rbp);
 144 
 145 // Address is an abstraction used to represent a memory location
 146 // using any of the amd64 addressing modes with one object.
 147 //
 148 // Note: A register location is represented via a Register, not
 149 //       via an address for efficiency & simplicity reasons.
 150 
 151 class ArrayAddress;
 152 
 153 class Address VALUE_OBJ_CLASS_SPEC {
 154  public:
 155   enum ScaleFactor {
 156     no_scale = -1,
 157     times_1  =  0,
 158     times_2  =  1,


src/cpu/x86/vm/assembler_x86.hpp
Index Unified diffs Context diffs Sdiffs Patch New Old Previous File Next File