1 /*
   2  * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_C1_C1_LIR_HPP
  26 #define SHARE_VM_C1_C1_LIR_HPP
  27 
  28 #include "c1/c1_ValueType.hpp"
  29 
  30 class BlockBegin;
  31 class BlockList;
  32 class LIR_Assembler;
  33 class CodeEmitInfo;
  34 class CodeStub;
  35 class CodeStubList;
  36 class ArrayCopyStub;
  37 class LIR_Op;
  38 class ciType;
  39 class ValueType;
  40 class LIR_OpVisitState;
  41 class FpuStackSim;
  42 
  43 //---------------------------------------------------------------------
  44 //                 LIR Operands
  45 //  LIR_OprDesc
  46 //    LIR_OprPtr
  47 //      LIR_Const
  48 //      LIR_Address
  49 //---------------------------------------------------------------------
  50 class LIR_OprDesc;
  51 class LIR_OprPtr;
  52 class LIR_Const;
  53 class LIR_Address;
  54 class LIR_OprVisitor;
  55 
  56 
  57 typedef LIR_OprDesc* LIR_Opr;
  58 typedef int          RegNr;
  59 
  60 define_array(LIR_OprArray, LIR_Opr)
  61 define_stack(LIR_OprList, LIR_OprArray)
  62 
  63 define_array(LIR_OprRefArray, LIR_Opr*)
  64 define_stack(LIR_OprRefList, LIR_OprRefArray)
  65 
  66 define_array(CodeEmitInfoArray, CodeEmitInfo*)
  67 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
  68 
  69 define_array(LIR_OpArray, LIR_Op*)
  70 define_stack(LIR_OpList, LIR_OpArray)
  71 
  72 // define LIR_OprPtr early so LIR_OprDesc can refer to it
  73 class LIR_OprPtr: public CompilationResourceObj {
  74  public:
  75   bool is_oop_pointer() const                    { return (type() == T_OBJECT); }
  76   bool is_float_kind() const                     { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
  77 
  78   virtual LIR_Const*  as_constant()              { return NULL; }
  79   virtual LIR_Address* as_address()              { return NULL; }
  80   virtual BasicType type() const                 = 0;
  81   virtual void print_value_on(outputStream* out) const = 0;
  82 };
  83 
  84 
  85 
  86 // LIR constants
  87 class LIR_Const: public LIR_OprPtr {
  88  private:
  89   JavaValue _value;
  90 
  91   void type_check(BasicType t) const   { assert(type() == t, "type check"); }
  92   void type_check(BasicType t1, BasicType t2) const   { assert(type() == t1 || type() == t2, "type check"); }
  93   void type_check(BasicType t1, BasicType t2, BasicType t3) const   { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
  94 
  95  public:
  96   LIR_Const(jint i, bool is_address=false)       { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
  97   LIR_Const(jlong l)                             { _value.set_type(T_LONG);    _value.set_jlong(l); }
  98   LIR_Const(jfloat f)                            { _value.set_type(T_FLOAT);   _value.set_jfloat(f); }
  99   LIR_Const(jdouble d)                           { _value.set_type(T_DOUBLE);  _value.set_jdouble(d); }
 100   LIR_Const(jobject o)                           { _value.set_type(T_OBJECT);  _value.set_jobject(o); }
 101   LIR_Const(void* p) {
 102 #ifdef _LP64
 103     assert(sizeof(jlong) >= sizeof(p), "too small");;
 104     _value.set_type(T_LONG);    _value.set_jlong((jlong)p);
 105 #else
 106     assert(sizeof(jint) >= sizeof(p), "too small");;
 107     _value.set_type(T_INT);     _value.set_jint((jint)p);
 108 #endif
 109   }
 110 
 111   virtual BasicType type()       const { return _value.get_type(); }
 112   virtual LIR_Const* as_constant()     { return this; }
 113 
 114   jint      as_jint()    const         { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
 115   jlong     as_jlong()   const         { type_check(T_LONG  ); return _value.get_jlong(); }
 116   jfloat    as_jfloat()  const         { type_check(T_FLOAT ); return _value.get_jfloat(); }
 117   jdouble   as_jdouble() const         { type_check(T_DOUBLE); return _value.get_jdouble(); }
 118   jobject   as_jobject() const         { type_check(T_OBJECT); return _value.get_jobject(); }
 119   jint      as_jint_lo() const         { type_check(T_LONG  ); return low(_value.get_jlong()); }
 120   jint      as_jint_hi() const         { type_check(T_LONG  ); return high(_value.get_jlong()); }
 121 
 122 #ifdef _LP64
 123   address   as_pointer() const         { type_check(T_LONG  ); return (address)_value.get_jlong(); }
 124 #else
 125   address   as_pointer() const         { type_check(T_INT   ); return (address)_value.get_jint(); }
 126 #endif
 127 
 128 
 129   jint      as_jint_bits() const       { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
 130   jint      as_jint_lo_bits() const    {
 131     if (type() == T_DOUBLE) {
 132       return low(jlong_cast(_value.get_jdouble()));
 133     } else {
 134       return as_jint_lo();
 135     }
 136   }
 137   jint      as_jint_hi_bits() const    {
 138     if (type() == T_DOUBLE) {
 139       return high(jlong_cast(_value.get_jdouble()));
 140     } else {
 141       return as_jint_hi();
 142     }
 143   }
 144   jlong      as_jlong_bits() const    {
 145     if (type() == T_DOUBLE) {
 146       return jlong_cast(_value.get_jdouble());
 147     } else {
 148       return as_jlong();
 149     }
 150   }
 151 
 152   virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
 153 
 154 
 155   bool is_zero_float() {
 156     jfloat f = as_jfloat();
 157     jfloat ok = 0.0f;
 158     return jint_cast(f) == jint_cast(ok);
 159   }
 160 
 161   bool is_one_float() {
 162     jfloat f = as_jfloat();
 163     return !g_isnan(f) && g_isfinite(f) && f == 1.0;
 164   }
 165 
 166   bool is_zero_double() {
 167     jdouble d = as_jdouble();
 168     jdouble ok = 0.0;
 169     return jlong_cast(d) == jlong_cast(ok);
 170   }
 171 
 172   bool is_one_double() {
 173     jdouble d = as_jdouble();
 174     return !g_isnan(d) && g_isfinite(d) && d == 1.0;
 175   }
 176 };
 177 
 178 
 179 //---------------------LIR Operand descriptor------------------------------------
 180 //
 181 // The class LIR_OprDesc represents a LIR instruction operand;
 182 // it can be a register (ALU/FPU), stack location or a constant;
 183 // Constants and addresses are represented as resource area allocated
 184 // structures (see above).
 185 // Registers and stack locations are inlined into the this pointer
 186 // (see value function).
 187 
 188 class LIR_OprDesc: public CompilationResourceObj {
 189  public:
 190   // value structure:
 191   //     data       opr-type opr-kind
 192   // +--------------+-------+-------+
 193   // [max...........|7 6 5 4|3 2 1 0]
 194   //                             ^
 195   //                    is_pointer bit
 196   //
 197   // lowest bit cleared, means it is a structure pointer
 198   // we need  4 bits to represent types
 199 
 200  private:
 201   friend class LIR_OprFact;
 202 
 203   // Conversion
 204   intptr_t value() const                         { return (intptr_t) this; }
 205 
 206   bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
 207     return (value() & mask) == masked_value;
 208   }
 209 
 210   enum OprKind {
 211       pointer_value      = 0
 212     , stack_value        = 1
 213     , cpu_register       = 3
 214     , fpu_register       = 5
 215     , illegal_value      = 7
 216   };
 217 
 218   enum OprBits {
 219       pointer_bits   = 1
 220     , kind_bits      = 3
 221     , type_bits      = 4
 222     , size_bits      = 2
 223     , destroys_bits  = 1
 224     , virtual_bits   = 1
 225     , is_xmm_bits    = 1
 226     , last_use_bits  = 1
 227     , is_fpu_stack_offset_bits = 1        // used in assertion checking on x86 for FPU stack slot allocation
 228     , non_data_bits  = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
 229                        is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
 230     , data_bits      = BitsPerInt - non_data_bits
 231     , reg_bits       = data_bits / 2      // for two registers in one value encoding
 232   };
 233 
 234   enum OprShift {
 235       kind_shift     = 0
 236     , type_shift     = kind_shift     + kind_bits
 237     , size_shift     = type_shift     + type_bits
 238     , destroys_shift = size_shift     + size_bits
 239     , last_use_shift = destroys_shift + destroys_bits
 240     , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
 241     , virtual_shift  = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
 242     , is_xmm_shift   = virtual_shift + virtual_bits
 243     , data_shift     = is_xmm_shift + is_xmm_bits
 244     , reg1_shift = data_shift
 245     , reg2_shift = data_shift + reg_bits
 246 
 247   };
 248 
 249   enum OprSize {
 250       single_size = 0 << size_shift
 251     , double_size = 1 << size_shift
 252   };
 253 
 254   enum OprMask {
 255       kind_mask      = right_n_bits(kind_bits)
 256     , type_mask      = right_n_bits(type_bits) << type_shift
 257     , size_mask      = right_n_bits(size_bits) << size_shift
 258     , last_use_mask  = right_n_bits(last_use_bits) << last_use_shift
 259     , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
 260     , virtual_mask   = right_n_bits(virtual_bits) << virtual_shift
 261     , is_xmm_mask    = right_n_bits(is_xmm_bits) << is_xmm_shift
 262     , pointer_mask   = right_n_bits(pointer_bits)
 263     , lower_reg_mask = right_n_bits(reg_bits)
 264     , no_type_mask   = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
 265   };
 266 
 267   uintptr_t data() const                         { return value() >> data_shift; }
 268   int lo_reg_half() const                        { return data() & lower_reg_mask; }
 269   int hi_reg_half() const                        { return (data() >> reg_bits) & lower_reg_mask; }
 270   OprKind kind_field() const                     { return (OprKind)(value() & kind_mask); }
 271   OprSize size_field() const                     { return (OprSize)(value() & size_mask); }
 272 
 273   static char type_char(BasicType t);
 274 
 275  public:
 276   enum {
 277     vreg_base = ConcreteRegisterImpl::number_of_registers,
 278     vreg_max = (1 << data_bits) - 1
 279   };
 280 
 281   static inline LIR_Opr illegalOpr();
 282 
 283   enum OprType {
 284       unknown_type  = 0 << type_shift    // means: not set (catch uninitialized types)
 285     , int_type      = 1 << type_shift
 286     , long_type     = 2 << type_shift
 287     , object_type   = 3 << type_shift
 288     , address_type  = 4 << type_shift
 289     , float_type    = 5 << type_shift
 290     , double_type   = 6 << type_shift
 291   };
 292   friend OprType as_OprType(BasicType t);
 293   friend BasicType as_BasicType(OprType t);
 294 
 295   OprType type_field_valid() const               { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
 296   OprType type_field() const                     { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
 297 
 298   static OprSize size_for(BasicType t) {
 299     switch (t) {
 300       case T_LONG:
 301       case T_DOUBLE:
 302         return double_size;
 303         break;
 304 
 305       case T_FLOAT:
 306       case T_BOOLEAN:
 307       case T_CHAR:
 308       case T_BYTE:
 309       case T_SHORT:
 310       case T_INT:
 311       case T_ADDRESS:
 312       case T_OBJECT:
 313       case T_ARRAY:
 314         return single_size;
 315         break;
 316 
 317       default:
 318         ShouldNotReachHere();
 319         return single_size;
 320       }
 321   }
 322 
 323 
 324   void validate_type() const PRODUCT_RETURN;
 325 
 326   BasicType type() const {
 327     if (is_pointer()) {
 328       return pointer()->type();
 329     }
 330     return as_BasicType(type_field());
 331   }
 332 
 333 
 334   ValueType* value_type() const                  { return as_ValueType(type()); }
 335 
 336   char type_char() const                         { return type_char((is_pointer()) ? pointer()->type() : type()); }
 337 
 338   bool is_equal(LIR_Opr opr) const         { return this == opr; }
 339   // checks whether types are same
 340   bool is_same_type(LIR_Opr opr) const     {
 341     assert(type_field() != unknown_type &&
 342            opr->type_field() != unknown_type, "shouldn't see unknown_type");
 343     return type_field() == opr->type_field();
 344   }
 345   bool is_same_register(LIR_Opr opr) {
 346     return (is_register() && opr->is_register() &&
 347             kind_field() == opr->kind_field() &&
 348             (value() & no_type_mask) == (opr->value() & no_type_mask));
 349   }
 350 
 351   bool is_pointer() const      { return check_value_mask(pointer_mask, pointer_value); }
 352   bool is_illegal() const      { return kind_field() == illegal_value; }
 353   bool is_valid() const        { return kind_field() != illegal_value; }
 354 
 355   bool is_register() const     { return is_cpu_register() || is_fpu_register(); }
 356   bool is_virtual() const      { return is_virtual_cpu()  || is_virtual_fpu();  }
 357 
 358   bool is_constant() const     { return is_pointer() && pointer()->as_constant() != NULL; }
 359   bool is_address() const      { return is_pointer() && pointer()->as_address() != NULL; }
 360 
 361   bool is_float_kind() const   { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
 362   bool is_oop() const;
 363 
 364   // semantic for fpu- and xmm-registers:
 365   // * is_float and is_double return true for xmm_registers
 366   //   (so is_single_fpu and is_single_xmm are true)
 367   // * So you must always check for is_???_xmm prior to is_???_fpu to
 368   //   distinguish between fpu- and xmm-registers
 369 
 370   bool is_stack() const        { validate_type(); return check_value_mask(kind_mask,                stack_value);                 }
 371   bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | single_size);  }
 372   bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | double_size);  }
 373 
 374   bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask,                cpu_register);                }
 375   bool is_virtual_cpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
 376   bool is_fixed_cpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register);                }
 377   bool is_single_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | single_size);  }
 378   bool is_double_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | double_size);  }
 379 
 380   bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask,                fpu_register);                }
 381   bool is_virtual_fpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
 382   bool is_fixed_fpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register);                }
 383   bool is_single_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | single_size);  }
 384   bool is_double_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | double_size);  }
 385 
 386   bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask,             fpu_register | is_xmm_mask); }
 387   bool is_single_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
 388   bool is_double_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
 389 
 390   // fast accessor functions for special bits that do not work for pointers
 391   // (in this functions, the check for is_pointer() is omitted)
 392   bool is_single_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
 393   bool is_double_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
 394   bool is_virtual_register() const { assert(is_register(),               "type check"); return check_value_mask(virtual_mask, virtual_mask); }
 395   bool is_oop_register() const     { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
 396   BasicType type_register() const  { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid());  }
 397 
 398   bool is_last_use() const         { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
 399   bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
 400   LIR_Opr make_last_use()          { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
 401   LIR_Opr make_fpu_stack_offset()  { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
 402 
 403 
 404   int single_stack_ix() const  { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
 405   int double_stack_ix() const  { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
 406   RegNr cpu_regnr() const      { assert(is_single_cpu()   && !is_virtual(), "type check"); return (RegNr)data(); }
 407   RegNr cpu_regnrLo() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
 408   RegNr cpu_regnrHi() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
 409   RegNr fpu_regnr() const      { assert(is_single_fpu()   && !is_virtual(), "type check"); return (RegNr)data(); }
 410   RegNr fpu_regnrLo() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
 411   RegNr fpu_regnrHi() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
 412   RegNr xmm_regnr() const      { assert(is_single_xmm()   && !is_virtual(), "type check"); return (RegNr)data(); }
 413   RegNr xmm_regnrLo() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
 414   RegNr xmm_regnrHi() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
 415   int   vreg_number() const    { assert(is_virtual(),                       "type check"); return (RegNr)data(); }
 416 
 417   LIR_OprPtr* pointer()  const                   { assert(is_pointer(), "type check");      return (LIR_OprPtr*)this; }
 418   LIR_Const* as_constant_ptr() const             { return pointer()->as_constant(); }
 419   LIR_Address* as_address_ptr() const            { return pointer()->as_address(); }
 420 
 421   Register as_register()    const;
 422   Register as_register_lo() const;
 423   Register as_register_hi() const;
 424 
 425   Register as_pointer_register() {
 426 #ifdef _LP64
 427     if (is_double_cpu()) {
 428       assert(as_register_lo() == as_register_hi(), "should be a single register");
 429       return as_register_lo();
 430     }
 431 #endif
 432     return as_register();
 433   }
 434 
 435 #ifdef X86
 436   XMMRegister as_xmm_float_reg() const;
 437   XMMRegister as_xmm_double_reg() const;
 438   // for compatibility with RInfo
 439   int fpu () const                                  { return lo_reg_half(); }
 440 #endif // X86
 441 #if defined(SPARC) || defined(ARM) || defined(PPC)
 442   FloatRegister as_float_reg   () const;
 443   FloatRegister as_double_reg  () const;
 444 #endif
 445 
 446   jint      as_jint()    const { return as_constant_ptr()->as_jint(); }
 447   jlong     as_jlong()   const { return as_constant_ptr()->as_jlong(); }
 448   jfloat    as_jfloat()  const { return as_constant_ptr()->as_jfloat(); }
 449   jdouble   as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
 450   jobject   as_jobject() const { return as_constant_ptr()->as_jobject(); }
 451 
 452   void print() const PRODUCT_RETURN;
 453   void print(outputStream* out) const PRODUCT_RETURN;
 454 };
 455 
 456 
 457 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
 458   switch (type) {
 459   case T_INT:      return LIR_OprDesc::int_type;
 460   case T_LONG:     return LIR_OprDesc::long_type;
 461   case T_FLOAT:    return LIR_OprDesc::float_type;
 462   case T_DOUBLE:   return LIR_OprDesc::double_type;
 463   case T_OBJECT:
 464   case T_ARRAY:    return LIR_OprDesc::object_type;
 465   case T_ADDRESS:  return LIR_OprDesc::address_type;
 466   case T_ILLEGAL:  // fall through
 467   default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
 468   }
 469 }
 470 
 471 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
 472   switch (t) {
 473   case LIR_OprDesc::int_type:     return T_INT;
 474   case LIR_OprDesc::long_type:    return T_LONG;
 475   case LIR_OprDesc::float_type:   return T_FLOAT;
 476   case LIR_OprDesc::double_type:  return T_DOUBLE;
 477   case LIR_OprDesc::object_type:  return T_OBJECT;
 478   case LIR_OprDesc::address_type: return T_ADDRESS;
 479   case LIR_OprDesc::unknown_type: // fall through
 480   default: ShouldNotReachHere();  return T_ILLEGAL;
 481   }
 482 }
 483 
 484 
 485 // LIR_Address
 486 class LIR_Address: public LIR_OprPtr {
 487  friend class LIR_OpVisitState;
 488 
 489  public:
 490   // NOTE: currently these must be the log2 of the scale factor (and
 491   // must also be equivalent to the ScaleFactor enum in
 492   // assembler_i486.hpp)
 493   enum Scale {
 494     times_1  =  0,
 495     times_2  =  1,
 496     times_4  =  2,
 497     times_8  =  3
 498   };
 499 
 500  private:
 501   LIR_Opr   _base;
 502   LIR_Opr   _index;
 503   Scale     _scale;
 504   intx      _disp;
 505   BasicType _type;
 506 
 507  public:
 508   LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
 509        _base(base)
 510      , _index(index)
 511      , _scale(times_1)
 512      , _type(type)
 513      , _disp(0) { verify(); }
 514 
 515   LIR_Address(LIR_Opr base, intx disp, BasicType type):
 516        _base(base)
 517      , _index(LIR_OprDesc::illegalOpr())
 518      , _scale(times_1)
 519      , _type(type)
 520      , _disp(disp) { verify(); }
 521 
 522   LIR_Address(LIR_Opr base, BasicType type):
 523        _base(base)
 524      , _index(LIR_OprDesc::illegalOpr())
 525      , _scale(times_1)
 526      , _type(type)
 527      , _disp(0) { verify(); }
 528 
 529 #if defined(X86) || defined(ARM)
 530   LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
 531        _base(base)
 532      , _index(index)
 533      , _scale(scale)
 534      , _type(type)
 535      , _disp(disp) { verify(); }
 536 #endif // X86 || ARM
 537 
 538   LIR_Opr base()  const                          { return _base;  }
 539   LIR_Opr index() const                          { return _index; }
 540   Scale   scale() const                          { return _scale; }
 541   intx    disp()  const                          { return _disp;  }
 542 
 543   bool equals(LIR_Address* other) const          { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
 544 
 545   virtual LIR_Address* as_address()              { return this;   }
 546   virtual BasicType type() const                 { return _type; }
 547   virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
 548 
 549   void verify() const PRODUCT_RETURN;
 550 
 551   static Scale scale(BasicType type);
 552 };
 553 
 554 
 555 // operand factory
 556 class LIR_OprFact: public AllStatic {
 557  public:
 558 
 559   static LIR_Opr illegalOpr;
 560 
 561   static LIR_Opr single_cpu(int reg) {
 562     return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 563                                LIR_OprDesc::int_type             |
 564                                LIR_OprDesc::cpu_register         |
 565                                LIR_OprDesc::single_size);
 566   }
 567   static LIR_Opr single_cpu_oop(int reg) {
 568     return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 569                                LIR_OprDesc::object_type          |
 570                                LIR_OprDesc::cpu_register         |
 571                                LIR_OprDesc::single_size);
 572   }
 573   static LIR_Opr single_cpu_address(int reg) {
 574     return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 575                                LIR_OprDesc::address_type         |
 576                                LIR_OprDesc::cpu_register         |
 577                                LIR_OprDesc::single_size);
 578   }
 579   static LIR_Opr double_cpu(int reg1, int reg2) {
 580     LP64_ONLY(assert(reg1 == reg2, "must be identical"));
 581     return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
 582                                (reg2 << LIR_OprDesc::reg2_shift) |
 583                                LIR_OprDesc::long_type            |
 584                                LIR_OprDesc::cpu_register         |
 585                                LIR_OprDesc::double_size);
 586   }
 587 
 588   static LIR_Opr single_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 589                                                                              LIR_OprDesc::float_type           |
 590                                                                              LIR_OprDesc::fpu_register         |
 591                                                                              LIR_OprDesc::single_size); }
 592 #if defined(ARM)
 593   static LIR_Opr double_fpu(int reg1, int reg2)    { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
 594   static LIR_Opr single_softfp(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::float_type  | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
 595   static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
 596 #endif
 597 #ifdef SPARC
 598   static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
 599                                                                              (reg2 << LIR_OprDesc::reg2_shift) |
 600                                                                              LIR_OprDesc::double_type          |
 601                                                                              LIR_OprDesc::fpu_register         |
 602                                                                              LIR_OprDesc::double_size); }
 603 #endif
 604 #ifdef X86
 605   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 606                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 607                                                                              LIR_OprDesc::double_type          |
 608                                                                              LIR_OprDesc::fpu_register         |
 609                                                                              LIR_OprDesc::double_size); }
 610 
 611   static LIR_Opr single_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 612                                                                              LIR_OprDesc::float_type           |
 613                                                                              LIR_OprDesc::fpu_register         |
 614                                                                              LIR_OprDesc::single_size          |
 615                                                                              LIR_OprDesc::is_xmm_mask); }
 616   static LIR_Opr double_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 617                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 618                                                                              LIR_OprDesc::double_type          |
 619                                                                              LIR_OprDesc::fpu_register         |
 620                                                                              LIR_OprDesc::double_size          |
 621                                                                              LIR_OprDesc::is_xmm_mask); }
 622 #endif // X86
 623 #ifdef PPC
 624   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 625                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 626                                                                              LIR_OprDesc::double_type          |
 627                                                                              LIR_OprDesc::fpu_register         |
 628                                                                              LIR_OprDesc::double_size); }
 629   static LIR_Opr single_softfp(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift)        |
 630                                                                              LIR_OprDesc::float_type           |
 631                                                                              LIR_OprDesc::cpu_register         |
 632                                                                              LIR_OprDesc::single_size); }
 633   static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift)        |
 634                                                                              (reg1 << LIR_OprDesc::reg2_shift) |
 635                                                                              LIR_OprDesc::double_type          |
 636                                                                              LIR_OprDesc::cpu_register         |
 637                                                                              LIR_OprDesc::double_size); }
 638 #endif // PPC
 639 
 640   static LIR_Opr virtual_register(int index, BasicType type) {
 641     LIR_Opr res;
 642     switch (type) {
 643       case T_OBJECT: // fall through
 644       case T_ARRAY:
 645         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
 646                                             LIR_OprDesc::object_type  |
 647                                             LIR_OprDesc::cpu_register |
 648                                             LIR_OprDesc::single_size  |
 649                                             LIR_OprDesc::virtual_mask);
 650         break;
 651 
 652       case T_INT:
 653         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 654                                   LIR_OprDesc::int_type              |
 655                                   LIR_OprDesc::cpu_register          |
 656                                   LIR_OprDesc::single_size           |
 657                                   LIR_OprDesc::virtual_mask);
 658         break;
 659 
 660       case T_ADDRESS:
 661         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 662                                   LIR_OprDesc::address_type          |
 663                                   LIR_OprDesc::cpu_register          |
 664                                   LIR_OprDesc::single_size           |
 665                                   LIR_OprDesc::virtual_mask);
 666         break;
 667 
 668       case T_LONG:
 669         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 670                                   LIR_OprDesc::long_type             |
 671                                   LIR_OprDesc::cpu_register          |
 672                                   LIR_OprDesc::double_size           |
 673                                   LIR_OprDesc::virtual_mask);
 674         break;
 675 
 676 #ifdef __SOFTFP__
 677       case T_FLOAT:
 678         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 679                                   LIR_OprDesc::float_type  |
 680                                   LIR_OprDesc::cpu_register |
 681                                   LIR_OprDesc::single_size |
 682                                   LIR_OprDesc::virtual_mask);
 683         break;
 684       case T_DOUBLE:
 685         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 686                                   LIR_OprDesc::double_type |
 687                                   LIR_OprDesc::cpu_register |
 688                                   LIR_OprDesc::double_size |
 689                                   LIR_OprDesc::virtual_mask);
 690         break;
 691 #else // __SOFTFP__
 692       case T_FLOAT:
 693         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 694                                   LIR_OprDesc::float_type           |
 695                                   LIR_OprDesc::fpu_register         |
 696                                   LIR_OprDesc::single_size          |
 697                                   LIR_OprDesc::virtual_mask);
 698         break;
 699 
 700       case
 701         T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 702                                             LIR_OprDesc::double_type           |
 703                                             LIR_OprDesc::fpu_register          |
 704                                             LIR_OprDesc::double_size           |
 705                                             LIR_OprDesc::virtual_mask);
 706         break;
 707 #endif // __SOFTFP__
 708       default:       ShouldNotReachHere(); res = illegalOpr;
 709     }
 710 
 711 #ifdef ASSERT
 712     res->validate_type();
 713     assert(res->vreg_number() == index, "conversion check");
 714     assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
 715     assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
 716 
 717     // old-style calculation; check if old and new method are equal
 718     LIR_OprDesc::OprType t = as_OprType(type);
 719 #ifdef __SOFTFP__
 720     LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 721                                t |
 722                                LIR_OprDesc::cpu_register |
 723                                LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
 724 #else // __SOFTFP__
 725     LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
 726                                           ((type == T_FLOAT || type == T_DOUBLE) ?  LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
 727                                LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
 728     assert(res == old_res, "old and new method not equal");
 729 #endif // __SOFTFP__
 730 #endif // ASSERT
 731 
 732     return res;
 733   }
 734 
 735   // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
 736   // the index is platform independent; a double stack useing indeces 2 and 3 has always
 737   // index 2.
 738   static LIR_Opr stack(int index, BasicType type) {
 739     LIR_Opr res;
 740     switch (type) {
 741       case T_OBJECT: // fall through
 742       case T_ARRAY:
 743         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 744                                   LIR_OprDesc::object_type           |
 745                                   LIR_OprDesc::stack_value           |
 746                                   LIR_OprDesc::single_size);
 747         break;
 748 
 749       case T_INT:
 750         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 751                                   LIR_OprDesc::int_type              |
 752                                   LIR_OprDesc::stack_value           |
 753                                   LIR_OprDesc::single_size);
 754         break;
 755 
 756       case T_ADDRESS:
 757         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 758                                   LIR_OprDesc::address_type          |
 759                                   LIR_OprDesc::stack_value           |
 760                                   LIR_OprDesc::single_size);
 761         break;
 762 
 763       case T_LONG:
 764         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 765                                   LIR_OprDesc::long_type             |
 766                                   LIR_OprDesc::stack_value           |
 767                                   LIR_OprDesc::double_size);
 768         break;
 769 
 770       case T_FLOAT:
 771         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 772                                   LIR_OprDesc::float_type            |
 773                                   LIR_OprDesc::stack_value           |
 774                                   LIR_OprDesc::single_size);
 775         break;
 776       case T_DOUBLE:
 777         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 778                                   LIR_OprDesc::double_type           |
 779                                   LIR_OprDesc::stack_value           |
 780                                   LIR_OprDesc::double_size);
 781         break;
 782 
 783       default:       ShouldNotReachHere(); res = illegalOpr;
 784     }
 785 
 786 #ifdef ASSERT
 787     assert(index >= 0, "index must be positive");
 788     assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
 789 
 790     LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 791                                           LIR_OprDesc::stack_value           |
 792                                           as_OprType(type)                   |
 793                                           LIR_OprDesc::size_for(type));
 794     assert(res == old_res, "old and new method not equal");
 795 #endif
 796 
 797     return res;
 798   }
 799 
 800   static LIR_Opr intConst(jint i)                { return (LIR_Opr)(new LIR_Const(i)); }
 801   static LIR_Opr longConst(jlong l)              { return (LIR_Opr)(new LIR_Const(l)); }
 802   static LIR_Opr floatConst(jfloat f)            { return (LIR_Opr)(new LIR_Const(f)); }
 803   static LIR_Opr doubleConst(jdouble d)          { return (LIR_Opr)(new LIR_Const(d)); }
 804   static LIR_Opr oopConst(jobject o)             { return (LIR_Opr)(new LIR_Const(o)); }
 805   static LIR_Opr address(LIR_Address* a)         { return (LIR_Opr)a; }
 806   static LIR_Opr intptrConst(void* p)            { return (LIR_Opr)(new LIR_Const(p)); }
 807   static LIR_Opr intptrConst(intptr_t v)         { return (LIR_Opr)(new LIR_Const((void*)v)); }
 808   static LIR_Opr illegal()                       { return (LIR_Opr)-1; }
 809   static LIR_Opr addressConst(jint i)            { return (LIR_Opr)(new LIR_Const(i, true)); }
 810 
 811   static LIR_Opr value_type(ValueType* type);
 812   static LIR_Opr dummy_value_type(ValueType* type);
 813 };
 814 
 815 
 816 //-------------------------------------------------------------------------------
 817 //                   LIR Instructions
 818 //-------------------------------------------------------------------------------
 819 //
 820 // Note:
 821 //  - every instruction has a result operand
 822 //  - every instruction has an CodeEmitInfo operand (can be revisited later)
 823 //  - every instruction has a LIR_OpCode operand
 824 //  - LIR_OpN, means an instruction that has N input operands
 825 //
 826 // class hierarchy:
 827 //
 828 class  LIR_Op;
 829 class    LIR_Op0;
 830 class      LIR_OpLabel;
 831 class    LIR_Op1;
 832 class      LIR_OpBranch;
 833 class      LIR_OpConvert;
 834 class      LIR_OpAllocObj;
 835 class      LIR_OpRoundFP;
 836 class    LIR_Op2;
 837 class    LIR_OpDelay;
 838 class    LIR_Op3;
 839 class      LIR_OpAllocArray;
 840 class    LIR_OpCall;
 841 class      LIR_OpJavaCall;
 842 class      LIR_OpRTCall;
 843 class    LIR_OpArrayCopy;
 844 class    LIR_OpLock;
 845 class    LIR_OpTypeCheck;
 846 class    LIR_OpCompareAndSwap;
 847 class    LIR_OpProfileCall;
 848 
 849 
 850 // LIR operation codes
 851 enum LIR_Code {
 852     lir_none
 853   , begin_op0
 854       , lir_word_align
 855       , lir_label
 856       , lir_nop
 857       , lir_backwardbranch_target
 858       , lir_std_entry
 859       , lir_osr_entry
 860       , lir_build_frame
 861       , lir_fpop_raw
 862       , lir_24bit_FPU
 863       , lir_reset_FPU
 864       , lir_breakpoint
 865       , lir_rtcall
 866       , lir_membar
 867       , lir_membar_acquire
 868       , lir_membar_release
 869       , lir_get_thread
 870   , end_op0
 871   , begin_op1
 872       , lir_fxch
 873       , lir_fld
 874       , lir_ffree
 875       , lir_push
 876       , lir_pop
 877       , lir_null_check
 878       , lir_return
 879       , lir_leal
 880       , lir_neg
 881       , lir_branch
 882       , lir_cond_float_branch
 883       , lir_move
 884       , lir_prefetchr
 885       , lir_prefetchw
 886       , lir_convert
 887       , lir_alloc_object
 888       , lir_monaddr
 889       , lir_roundfp
 890       , lir_safepoint
 891       , lir_pack64
 892       , lir_unpack64
 893       , lir_unwind
 894   , end_op1
 895   , begin_op2
 896       , lir_cmp
 897       , lir_cmp_l2i
 898       , lir_ucmp_fd2i
 899       , lir_cmp_fd2i
 900       , lir_cmove
 901       , lir_add
 902       , lir_sub
 903       , lir_mul
 904       , lir_mul_strictfp
 905       , lir_div
 906       , lir_div_strictfp
 907       , lir_rem
 908       , lir_sqrt
 909       , lir_abs
 910       , lir_sin
 911       , lir_cos
 912       , lir_tan
 913       , lir_log
 914       , lir_log10
 915       , lir_logic_and
 916       , lir_logic_or
 917       , lir_logic_xor
 918       , lir_shl
 919       , lir_shr
 920       , lir_ushr
 921       , lir_alloc_array
 922       , lir_throw
 923       , lir_compare_to
 924   , end_op2
 925   , begin_op3
 926       , lir_idiv
 927       , lir_irem
 928   , end_op3
 929   , begin_opJavaCall
 930       , lir_static_call
 931       , lir_optvirtual_call
 932       , lir_icvirtual_call
 933       , lir_virtual_call
 934       , lir_dynamic_call
 935   , end_opJavaCall
 936   , begin_opArrayCopy
 937       , lir_arraycopy
 938   , end_opArrayCopy
 939   , begin_opLock
 940     , lir_lock
 941     , lir_unlock
 942   , end_opLock
 943   , begin_delay_slot
 944     , lir_delay_slot
 945   , end_delay_slot
 946   , begin_opTypeCheck
 947     , lir_instanceof
 948     , lir_checkcast
 949     , lir_store_check
 950   , end_opTypeCheck
 951   , begin_opCompareAndSwap
 952     , lir_cas_long
 953     , lir_cas_obj
 954     , lir_cas_int
 955   , end_opCompareAndSwap
 956   , begin_opMDOProfile
 957     , lir_profile_call
 958   , end_opMDOProfile
 959 };
 960 
 961 
 962 enum LIR_Condition {
 963     lir_cond_equal
 964   , lir_cond_notEqual
 965   , lir_cond_less
 966   , lir_cond_lessEqual
 967   , lir_cond_greaterEqual
 968   , lir_cond_greater
 969   , lir_cond_belowEqual
 970   , lir_cond_aboveEqual
 971   , lir_cond_always
 972   , lir_cond_unknown = -1
 973 };
 974 
 975 
 976 enum LIR_PatchCode {
 977   lir_patch_none,
 978   lir_patch_low,
 979   lir_patch_high,
 980   lir_patch_normal
 981 };
 982 
 983 
 984 enum LIR_MoveKind {
 985   lir_move_normal,
 986   lir_move_volatile,
 987   lir_move_unaligned,
 988   lir_move_wide,
 989   lir_move_max_flag
 990 };
 991 
 992 
 993 // --------------------------------------------------
 994 // LIR_Op
 995 // --------------------------------------------------
 996 class LIR_Op: public CompilationResourceObj {
 997  friend class LIR_OpVisitState;
 998 
 999 #ifdef ASSERT
1000  private:
1001   const char *  _file;
1002   int           _line;
1003 #endif
1004 
1005  protected:
1006   LIR_Opr       _result;
1007   unsigned short _code;
1008   unsigned short _flags;
1009   CodeEmitInfo* _info;
1010   int           _id;     // value id for register allocation
1011   int           _fpu_pop_count;
1012   Instruction*  _source; // for debugging
1013 
1014   static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1015 
1016  protected:
1017   static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end)  { return start < test && test < end; }
1018 
1019  public:
1020   LIR_Op()
1021     : _result(LIR_OprFact::illegalOpr)
1022     , _code(lir_none)
1023     , _flags(0)
1024     , _info(NULL)
1025 #ifdef ASSERT
1026     , _file(NULL)
1027     , _line(0)
1028 #endif
1029     , _fpu_pop_count(0)
1030     , _source(NULL)
1031     , _id(-1)                             {}
1032 
1033   LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1034     : _result(result)
1035     , _code(code)
1036     , _flags(0)
1037     , _info(info)
1038 #ifdef ASSERT
1039     , _file(NULL)
1040     , _line(0)
1041 #endif
1042     , _fpu_pop_count(0)
1043     , _source(NULL)
1044     , _id(-1)                             {}
1045 
1046   CodeEmitInfo* info() const                  { return _info;   }
1047   LIR_Code code()      const                  { return (LIR_Code)_code;   }
1048   LIR_Opr result_opr() const                  { return _result; }
1049   void    set_result_opr(LIR_Opr opr)         { _result = opr;  }
1050 
1051 #ifdef ASSERT
1052   void set_file_and_line(const char * file, int line) {
1053     _file = file;
1054     _line = line;
1055   }
1056 #endif
1057 
1058   virtual const char * name() const PRODUCT_RETURN0;
1059 
1060   int id()             const                  { return _id;     }
1061   void set_id(int id)                         { _id = id; }
1062 
1063   // FPU stack simulation helpers -- only used on Intel
1064   void set_fpu_pop_count(int count)           { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1065   int  fpu_pop_count() const                  { return _fpu_pop_count; }
1066   bool pop_fpu_stack()                        { return _fpu_pop_count > 0; }
1067 
1068   Instruction* source() const                 { return _source; }
1069   void set_source(Instruction* ins)           { _source = ins; }
1070 
1071   virtual void emit_code(LIR_Assembler* masm) = 0;
1072   virtual void print_instr(outputStream* out) const   = 0;
1073   virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1074 
1075   virtual LIR_OpCall* as_OpCall() { return NULL; }
1076   virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1077   virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1078   virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1079   virtual LIR_OpLock* as_OpLock() { return NULL; }
1080   virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1081   virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1082   virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1083   virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1084   virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1085   virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1086   virtual LIR_Op0* as_Op0() { return NULL; }
1087   virtual LIR_Op1* as_Op1() { return NULL; }
1088   virtual LIR_Op2* as_Op2() { return NULL; }
1089   virtual LIR_Op3* as_Op3() { return NULL; }
1090   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1091   virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1092   virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1093   virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1094 
1095   virtual void verify() const {}
1096 };
1097 
1098 // for calls
1099 class LIR_OpCall: public LIR_Op {
1100  friend class LIR_OpVisitState;
1101 
1102  protected:
1103   address      _addr;
1104   LIR_OprList* _arguments;
1105  protected:
1106   LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1107              LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1108     : LIR_Op(code, result, info)
1109     , _arguments(arguments)
1110     , _addr(addr) {}
1111 
1112  public:
1113   address addr() const                           { return _addr; }
1114   const LIR_OprList* arguments() const           { return _arguments; }
1115   virtual LIR_OpCall* as_OpCall()                { return this; }
1116 };
1117 
1118 
1119 // --------------------------------------------------
1120 // LIR_OpJavaCall
1121 // --------------------------------------------------
1122 class LIR_OpJavaCall: public LIR_OpCall {
1123  friend class LIR_OpVisitState;
1124 
1125  private:
1126   ciMethod* _method;
1127   LIR_Opr   _receiver;
1128   LIR_Opr   _method_handle_invoke_SP_save_opr;  // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1129 
1130  public:
1131   LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1132                  LIR_Opr receiver, LIR_Opr result,
1133                  address addr, LIR_OprList* arguments,
1134                  CodeEmitInfo* info)
1135   : LIR_OpCall(code, addr, result, arguments, info)
1136   , _receiver(receiver)
1137   , _method(method)
1138   , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1139   { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1140 
1141   LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1142                  LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1143                  LIR_OprList* arguments, CodeEmitInfo* info)
1144   : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1145   , _receiver(receiver)
1146   , _method(method)
1147   , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1148   { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1149 
1150   LIR_Opr receiver() const                       { return _receiver; }
1151   ciMethod* method() const                       { return _method;   }
1152 
1153   // JSR 292 support.
1154   bool is_invokedynamic() const                  { return code() == lir_dynamic_call; }
1155   bool is_method_handle_invoke() const {
1156     return
1157       is_invokedynamic()  // An invokedynamic is always a MethodHandle call site.
1158       ||
1159       (method()->holder()->name() == ciSymbol::java_dyn_MethodHandle() &&
1160        methodOopDesc::is_method_handle_invoke_name(method()->name()->sid()));
1161   }
1162 
1163   intptr_t vtable_offset() const {
1164     assert(_code == lir_virtual_call, "only have vtable for real vcall");
1165     return (intptr_t) addr();
1166   }
1167 
1168   virtual void emit_code(LIR_Assembler* masm);
1169   virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1170   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1171 };
1172 
1173 // --------------------------------------------------
1174 // LIR_OpLabel
1175 // --------------------------------------------------
1176 // Location where a branch can continue
1177 class LIR_OpLabel: public LIR_Op {
1178  friend class LIR_OpVisitState;
1179 
1180  private:
1181   Label* _label;
1182  public:
1183   LIR_OpLabel(Label* lbl)
1184    : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1185    , _label(lbl)                                 {}
1186   Label* label() const                           { return _label; }
1187 
1188   virtual void emit_code(LIR_Assembler* masm);
1189   virtual LIR_OpLabel* as_OpLabel() { return this; }
1190   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1191 };
1192 
1193 // LIR_OpArrayCopy
1194 class LIR_OpArrayCopy: public LIR_Op {
1195  friend class LIR_OpVisitState;
1196 
1197  private:
1198   ArrayCopyStub*  _stub;
1199   LIR_Opr   _src;
1200   LIR_Opr   _src_pos;
1201   LIR_Opr   _dst;
1202   LIR_Opr   _dst_pos;
1203   LIR_Opr   _length;
1204   LIR_Opr   _tmp;
1205   ciArrayKlass* _expected_type;
1206   int       _flags;
1207 
1208 public:
1209   enum Flags {
1210     src_null_check         = 1 << 0,
1211     dst_null_check         = 1 << 1,
1212     src_pos_positive_check = 1 << 2,
1213     dst_pos_positive_check = 1 << 3,
1214     length_positive_check  = 1 << 4,
1215     src_range_check        = 1 << 5,
1216     dst_range_check        = 1 << 6,
1217     type_check             = 1 << 7,
1218     all_flags              = (1 << 8) - 1
1219   };
1220 
1221   LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1222                   ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1223 
1224   LIR_Opr src() const                            { return _src; }
1225   LIR_Opr src_pos() const                        { return _src_pos; }
1226   LIR_Opr dst() const                            { return _dst; }
1227   LIR_Opr dst_pos() const                        { return _dst_pos; }
1228   LIR_Opr length() const                         { return _length; }
1229   LIR_Opr tmp() const                            { return _tmp; }
1230   int flags() const                              { return _flags; }
1231   ciArrayKlass* expected_type() const            { return _expected_type; }
1232   ArrayCopyStub* stub() const                    { return _stub; }
1233 
1234   virtual void emit_code(LIR_Assembler* masm);
1235   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1236   void print_instr(outputStream* out) const PRODUCT_RETURN;
1237 };
1238 
1239 
1240 // --------------------------------------------------
1241 // LIR_Op0
1242 // --------------------------------------------------
1243 class LIR_Op0: public LIR_Op {
1244  friend class LIR_OpVisitState;
1245 
1246  public:
1247   LIR_Op0(LIR_Code code)
1248    : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1249   LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1250    : LIR_Op(code, result, info)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1251 
1252   virtual void emit_code(LIR_Assembler* masm);
1253   virtual LIR_Op0* as_Op0() { return this; }
1254   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1255 };
1256 
1257 
1258 // --------------------------------------------------
1259 // LIR_Op1
1260 // --------------------------------------------------
1261 
1262 class LIR_Op1: public LIR_Op {
1263  friend class LIR_OpVisitState;
1264 
1265  protected:
1266   LIR_Opr         _opr;   // input operand
1267   BasicType       _type;  // Operand types
1268   LIR_PatchCode   _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1269 
1270   static void print_patch_code(outputStream* out, LIR_PatchCode code);
1271 
1272   void set_kind(LIR_MoveKind kind) {
1273     assert(code() == lir_move, "must be");
1274     _flags = kind;
1275   }
1276 
1277  public:
1278   LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1279     : LIR_Op(code, result, info)
1280     , _opr(opr)
1281     , _patch(patch)
1282     , _type(type)                      { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1283 
1284   LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1285     : LIR_Op(code, result, info)
1286     , _opr(opr)
1287     , _patch(patch)
1288     , _type(type)                      {
1289     assert(code == lir_move, "must be");
1290     set_kind(kind);
1291   }
1292 
1293   LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1294     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1295     , _opr(opr)
1296     , _patch(lir_patch_none)
1297     , _type(T_ILLEGAL)                 { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1298 
1299   LIR_Opr in_opr()           const               { return _opr;   }
1300   LIR_PatchCode patch_code() const               { return _patch; }
1301   BasicType type()           const               { return _type;  }
1302 
1303   LIR_MoveKind move_kind() const {
1304     assert(code() == lir_move, "must be");
1305     return (LIR_MoveKind)_flags;
1306   }
1307 
1308   virtual void emit_code(LIR_Assembler* masm);
1309   virtual LIR_Op1* as_Op1() { return this; }
1310   virtual const char * name() const PRODUCT_RETURN0;
1311 
1312   void set_in_opr(LIR_Opr opr) { _opr = opr; }
1313 
1314   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1315   virtual void verify() const;
1316 };
1317 
1318 
1319 // for runtime calls
1320 class LIR_OpRTCall: public LIR_OpCall {
1321  friend class LIR_OpVisitState;
1322 
1323  private:
1324   LIR_Opr _tmp;
1325  public:
1326   LIR_OpRTCall(address addr, LIR_Opr tmp,
1327                LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1328     : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1329     , _tmp(tmp) {}
1330 
1331   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1332   virtual void emit_code(LIR_Assembler* masm);
1333   virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1334 
1335   LIR_Opr tmp() const                            { return _tmp; }
1336 
1337   virtual void verify() const;
1338 };
1339 
1340 
1341 class LIR_OpBranch: public LIR_Op {
1342  friend class LIR_OpVisitState;
1343 
1344  private:
1345   LIR_Condition _cond;
1346   BasicType     _type;
1347   Label*        _label;
1348   BlockBegin*   _block;  // if this is a branch to a block, this is the block
1349   BlockBegin*   _ublock; // if this is a float-branch, this is the unorderd block
1350   CodeStub*     _stub;   // if this is a branch to a stub, this is the stub
1351 
1352  public:
1353   LIR_OpBranch(LIR_Condition cond, Label* lbl)
1354     : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1355     , _cond(cond)
1356     , _label(lbl)
1357     , _block(NULL)
1358     , _ublock(NULL)
1359     , _stub(NULL) { }
1360 
1361   LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1362   LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1363 
1364   // for unordered comparisons
1365   LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1366 
1367   LIR_Condition cond()        const              { return _cond;        }
1368   BasicType     type()        const              { return _type;        }
1369   Label*        label()       const              { return _label;       }
1370   BlockBegin*   block()       const              { return _block;       }
1371   BlockBegin*   ublock()      const              { return _ublock;      }
1372   CodeStub*     stub()        const              { return _stub;       }
1373 
1374   void          change_block(BlockBegin* b);
1375   void          change_ublock(BlockBegin* b);
1376   void          negate_cond();
1377 
1378   virtual void emit_code(LIR_Assembler* masm);
1379   virtual LIR_OpBranch* as_OpBranch() { return this; }
1380   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1381 };
1382 
1383 
1384 class ConversionStub;
1385 
1386 class LIR_OpConvert: public LIR_Op1 {
1387  friend class LIR_OpVisitState;
1388 
1389  private:
1390    Bytecodes::Code _bytecode;
1391    ConversionStub* _stub;
1392 #ifdef PPC
1393   LIR_Opr _tmp1;
1394   LIR_Opr _tmp2;
1395 #endif
1396 
1397  public:
1398    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1399      : LIR_Op1(lir_convert, opr, result)
1400      , _stub(stub)
1401 #ifdef PPC
1402      , _tmp1(LIR_OprDesc::illegalOpr())
1403      , _tmp2(LIR_OprDesc::illegalOpr())
1404 #endif
1405      , _bytecode(code)                           {}
1406 
1407 #ifdef PPC
1408    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1409                  ,LIR_Opr tmp1, LIR_Opr tmp2)
1410      : LIR_Op1(lir_convert, opr, result)
1411      , _stub(stub)
1412      , _tmp1(tmp1)
1413      , _tmp2(tmp2)
1414      , _bytecode(code)                           {}
1415 #endif
1416 
1417   Bytecodes::Code bytecode() const               { return _bytecode; }
1418   ConversionStub* stub() const                   { return _stub; }
1419 #ifdef PPC
1420   LIR_Opr tmp1() const                           { return _tmp1; }
1421   LIR_Opr tmp2() const                           { return _tmp2; }
1422 #endif
1423 
1424   virtual void emit_code(LIR_Assembler* masm);
1425   virtual LIR_OpConvert* as_OpConvert() { return this; }
1426   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1427 
1428   static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1429 };
1430 
1431 
1432 // LIR_OpAllocObj
1433 class LIR_OpAllocObj : public LIR_Op1 {
1434  friend class LIR_OpVisitState;
1435 
1436  private:
1437   LIR_Opr _tmp1;
1438   LIR_Opr _tmp2;
1439   LIR_Opr _tmp3;
1440   LIR_Opr _tmp4;
1441   int     _hdr_size;
1442   int     _obj_size;
1443   CodeStub* _stub;
1444   bool    _init_check;
1445 
1446  public:
1447   LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1448                  LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1449                  int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1450     : LIR_Op1(lir_alloc_object, klass, result)
1451     , _tmp1(t1)
1452     , _tmp2(t2)
1453     , _tmp3(t3)
1454     , _tmp4(t4)
1455     , _hdr_size(hdr_size)
1456     , _obj_size(obj_size)
1457     , _init_check(init_check)
1458     , _stub(stub)                                { }
1459 
1460   LIR_Opr klass()        const                   { return in_opr();     }
1461   LIR_Opr obj()          const                   { return result_opr(); }
1462   LIR_Opr tmp1()         const                   { return _tmp1;        }
1463   LIR_Opr tmp2()         const                   { return _tmp2;        }
1464   LIR_Opr tmp3()         const                   { return _tmp3;        }
1465   LIR_Opr tmp4()         const                   { return _tmp4;        }
1466   int     header_size()  const                   { return _hdr_size;    }
1467   int     object_size()  const                   { return _obj_size;    }
1468   bool    init_check()   const                   { return _init_check;  }
1469   CodeStub* stub()       const                   { return _stub;        }
1470 
1471   virtual void emit_code(LIR_Assembler* masm);
1472   virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1473   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1474 };
1475 
1476 
1477 // LIR_OpRoundFP
1478 class LIR_OpRoundFP : public LIR_Op1 {
1479  friend class LIR_OpVisitState;
1480 
1481  private:
1482   LIR_Opr _tmp;
1483 
1484  public:
1485   LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1486     : LIR_Op1(lir_roundfp, reg, result)
1487     , _tmp(stack_loc_temp) {}
1488 
1489   LIR_Opr tmp() const                            { return _tmp; }
1490   virtual LIR_OpRoundFP* as_OpRoundFP()          { return this; }
1491   void print_instr(outputStream* out) const PRODUCT_RETURN;
1492 };
1493 
1494 // LIR_OpTypeCheck
1495 class LIR_OpTypeCheck: public LIR_Op {
1496  friend class LIR_OpVisitState;
1497 
1498  private:
1499   LIR_Opr       _object;
1500   LIR_Opr       _array;
1501   ciKlass*      _klass;
1502   LIR_Opr       _tmp1;
1503   LIR_Opr       _tmp2;
1504   LIR_Opr       _tmp3;
1505   bool          _fast_check;
1506   CodeEmitInfo* _info_for_patch;
1507   CodeEmitInfo* _info_for_exception;
1508   CodeStub*     _stub;
1509   ciMethod*     _profiled_method;
1510   int           _profiled_bci;
1511   bool          _should_profile;
1512 
1513 public:
1514   LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1515                   LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1516                   CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1517   LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1518                   LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1519 
1520   LIR_Opr object() const                         { return _object;         }
1521   LIR_Opr array() const                          { assert(code() == lir_store_check, "not valid"); return _array;         }
1522   LIR_Opr tmp1() const                           { return _tmp1;           }
1523   LIR_Opr tmp2() const                           { return _tmp2;           }
1524   LIR_Opr tmp3() const                           { return _tmp3;           }
1525   ciKlass* klass() const                         { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass;          }
1526   bool fast_check() const                        { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check;     }
1527   CodeEmitInfo* info_for_patch() const           { return _info_for_patch;  }
1528   CodeEmitInfo* info_for_exception() const       { return _info_for_exception; }
1529   CodeStub* stub() const                         { return _stub;           }
1530 
1531   // methodDataOop profiling
1532   void set_profiled_method(ciMethod *method)     { _profiled_method = method; }
1533   void set_profiled_bci(int bci)                 { _profiled_bci = bci;       }
1534   void set_should_profile(bool b)                { _should_profile = b;       }
1535   ciMethod* profiled_method() const              { return _profiled_method;   }
1536   int       profiled_bci() const                 { return _profiled_bci;      }
1537   bool      should_profile() const               { return _should_profile;    }
1538 
1539   virtual void emit_code(LIR_Assembler* masm);
1540   virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1541   void print_instr(outputStream* out) const PRODUCT_RETURN;
1542 };
1543 
1544 // LIR_Op2
1545 class LIR_Op2: public LIR_Op {
1546  friend class LIR_OpVisitState;
1547 
1548   int  _fpu_stack_size; // for sin/cos implementation on Intel
1549 
1550  protected:
1551   LIR_Opr   _opr1;
1552   LIR_Opr   _opr2;
1553   BasicType _type;
1554   LIR_Opr   _tmp;
1555   LIR_Condition _condition;
1556 
1557   void verify() const;
1558 
1559  public:
1560   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1561     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1562     , _opr1(opr1)
1563     , _opr2(opr2)
1564     , _type(T_ILLEGAL)
1565     , _condition(condition)
1566     , _fpu_stack_size(0)
1567     , _tmp(LIR_OprFact::illegalOpr) {
1568     assert(code == lir_cmp, "code check");
1569   }
1570 
1571   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result)
1572     : LIR_Op(code, result, NULL)
1573     , _opr1(opr1)
1574     , _opr2(opr2)
1575     , _type(T_ILLEGAL)
1576     , _condition(condition)
1577     , _fpu_stack_size(0)
1578     , _tmp(LIR_OprFact::illegalOpr) {
1579     assert(code == lir_cmove, "code check");
1580   }
1581 
1582   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1583           CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1584     : LIR_Op(code, result, info)
1585     , _opr1(opr1)
1586     , _opr2(opr2)
1587     , _type(type)
1588     , _condition(lir_cond_unknown)
1589     , _fpu_stack_size(0)
1590     , _tmp(LIR_OprFact::illegalOpr) {
1591     assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1592   }
1593 
1594   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp)
1595     : LIR_Op(code, result, NULL)
1596     , _opr1(opr1)
1597     , _opr2(opr2)
1598     , _type(T_ILLEGAL)
1599     , _condition(lir_cond_unknown)
1600     , _fpu_stack_size(0)
1601     , _tmp(tmp) {
1602     assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1603   }
1604 
1605   LIR_Opr in_opr1() const                        { return _opr1; }
1606   LIR_Opr in_opr2() const                        { return _opr2; }
1607   BasicType type()  const                        { return _type; }
1608   LIR_Opr tmp_opr() const                        { return _tmp; }
1609   LIR_Condition condition() const  {
1610     assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition;
1611   }
1612   void set_condition(LIR_Condition condition) {
1613     assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove");  _condition = condition;
1614   }
1615 
1616   void set_fpu_stack_size(int size)              { _fpu_stack_size = size; }
1617   int  fpu_stack_size() const                    { return _fpu_stack_size; }
1618 
1619   void set_in_opr1(LIR_Opr opr)                  { _opr1 = opr; }
1620   void set_in_opr2(LIR_Opr opr)                  { _opr2 = opr; }
1621 
1622   virtual void emit_code(LIR_Assembler* masm);
1623   virtual LIR_Op2* as_Op2() { return this; }
1624   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1625 };
1626 
1627 class LIR_OpAllocArray : public LIR_Op {
1628  friend class LIR_OpVisitState;
1629 
1630  private:
1631   LIR_Opr   _klass;
1632   LIR_Opr   _len;
1633   LIR_Opr   _tmp1;
1634   LIR_Opr   _tmp2;
1635   LIR_Opr   _tmp3;
1636   LIR_Opr   _tmp4;
1637   BasicType _type;
1638   CodeStub* _stub;
1639 
1640  public:
1641   LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1642     : LIR_Op(lir_alloc_array, result, NULL)
1643     , _klass(klass)
1644     , _len(len)
1645     , _tmp1(t1)
1646     , _tmp2(t2)
1647     , _tmp3(t3)
1648     , _tmp4(t4)
1649     , _type(type)
1650     , _stub(stub) {}
1651 
1652   LIR_Opr   klass()   const                      { return _klass;       }
1653   LIR_Opr   len()     const                      { return _len;         }
1654   LIR_Opr   obj()     const                      { return result_opr(); }
1655   LIR_Opr   tmp1()    const                      { return _tmp1;        }
1656   LIR_Opr   tmp2()    const                      { return _tmp2;        }
1657   LIR_Opr   tmp3()    const                      { return _tmp3;        }
1658   LIR_Opr   tmp4()    const                      { return _tmp4;        }
1659   BasicType type()    const                      { return _type;        }
1660   CodeStub* stub()    const                      { return _stub;        }
1661 
1662   virtual void emit_code(LIR_Assembler* masm);
1663   virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1664   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1665 };
1666 
1667 
1668 class LIR_Op3: public LIR_Op {
1669  friend class LIR_OpVisitState;
1670 
1671  private:
1672   LIR_Opr _opr1;
1673   LIR_Opr _opr2;
1674   LIR_Opr _opr3;
1675  public:
1676   LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1677     : LIR_Op(code, result, info)
1678     , _opr1(opr1)
1679     , _opr2(opr2)
1680     , _opr3(opr3)                                { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1681   LIR_Opr in_opr1() const                        { return _opr1; }
1682   LIR_Opr in_opr2() const                        { return _opr2; }
1683   LIR_Opr in_opr3() const                        { return _opr3; }
1684 
1685   virtual void emit_code(LIR_Assembler* masm);
1686   virtual LIR_Op3* as_Op3() { return this; }
1687   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1688 };
1689 
1690 
1691 //--------------------------------
1692 class LabelObj: public CompilationResourceObj {
1693  private:
1694   Label _label;
1695  public:
1696   LabelObj()                                     {}
1697   Label* label()                                 { return &_label; }
1698 };
1699 
1700 
1701 class LIR_OpLock: public LIR_Op {
1702  friend class LIR_OpVisitState;
1703 
1704  private:
1705   LIR_Opr _hdr;
1706   LIR_Opr _obj;
1707   LIR_Opr _lock;
1708   LIR_Opr _scratch;
1709   CodeStub* _stub;
1710  public:
1711   LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1712     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1713     , _hdr(hdr)
1714     , _obj(obj)
1715     , _lock(lock)
1716     , _scratch(scratch)
1717     , _stub(stub)                      {}
1718 
1719   LIR_Opr hdr_opr() const                        { return _hdr; }
1720   LIR_Opr obj_opr() const                        { return _obj; }
1721   LIR_Opr lock_opr() const                       { return _lock; }
1722   LIR_Opr scratch_opr() const                    { return _scratch; }
1723   CodeStub* stub() const                         { return _stub; }
1724 
1725   virtual void emit_code(LIR_Assembler* masm);
1726   virtual LIR_OpLock* as_OpLock() { return this; }
1727   void print_instr(outputStream* out) const PRODUCT_RETURN;
1728 };
1729 
1730 
1731 class LIR_OpDelay: public LIR_Op {
1732  friend class LIR_OpVisitState;
1733 
1734  private:
1735   LIR_Op* _op;
1736 
1737  public:
1738   LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1739     LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1740     _op(op) {
1741     assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1742   }
1743   virtual void emit_code(LIR_Assembler* masm);
1744   virtual LIR_OpDelay* as_OpDelay() { return this; }
1745   void print_instr(outputStream* out) const PRODUCT_RETURN;
1746   LIR_Op* delay_op() const { return _op; }
1747   CodeEmitInfo* call_info() const { return info(); }
1748 };
1749 
1750 
1751 // LIR_OpCompareAndSwap
1752 class LIR_OpCompareAndSwap : public LIR_Op {
1753  friend class LIR_OpVisitState;
1754 
1755  private:
1756   LIR_Opr _addr;
1757   LIR_Opr _cmp_value;
1758   LIR_Opr _new_value;
1759   LIR_Opr _tmp1;
1760   LIR_Opr _tmp2;
1761 
1762  public:
1763   LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1764                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1765     : LIR_Op(code, result, NULL)  // no result, no info
1766     , _addr(addr)
1767     , _cmp_value(cmp_value)
1768     , _new_value(new_value)
1769     , _tmp1(t1)
1770     , _tmp2(t2)                                  { }
1771 
1772   LIR_Opr addr()        const                    { return _addr;  }
1773   LIR_Opr cmp_value()   const                    { return _cmp_value; }
1774   LIR_Opr new_value()   const                    { return _new_value; }
1775   LIR_Opr tmp1()        const                    { return _tmp1;      }
1776   LIR_Opr tmp2()        const                    { return _tmp2;      }
1777 
1778   virtual void emit_code(LIR_Assembler* masm);
1779   virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1780   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1781 };
1782 
1783 // LIR_OpProfileCall
1784 class LIR_OpProfileCall : public LIR_Op {
1785  friend class LIR_OpVisitState;
1786 
1787  private:
1788   ciMethod* _profiled_method;
1789   int _profiled_bci;
1790   LIR_Opr _mdo;
1791   LIR_Opr _recv;
1792   LIR_Opr _tmp1;
1793   ciKlass* _known_holder;
1794 
1795  public:
1796   // Destroys recv
1797   LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1798     : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)  // no result, no info
1799     , _profiled_method(profiled_method)
1800     , _profiled_bci(profiled_bci)
1801     , _mdo(mdo)
1802     , _recv(recv)
1803     , _tmp1(t1)
1804     , _known_holder(known_holder)                { }
1805 
1806   ciMethod* profiled_method() const              { return _profiled_method;  }
1807   int       profiled_bci()    const              { return _profiled_bci;     }
1808   LIR_Opr   mdo()             const              { return _mdo;              }
1809   LIR_Opr   recv()            const              { return _recv;             }
1810   LIR_Opr   tmp1()            const              { return _tmp1;             }
1811   ciKlass*  known_holder()    const              { return _known_holder;     }
1812 
1813   virtual void emit_code(LIR_Assembler* masm);
1814   virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1815   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1816 };
1817 
1818 class LIR_InsertionBuffer;
1819 
1820 //--------------------------------LIR_List---------------------------------------------------
1821 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1822 // The LIR instructions are appended by the LIR_List class itself;
1823 //
1824 // Notes:
1825 // - all offsets are(should be) in bytes
1826 // - local positions are specified with an offset, with offset 0 being local 0
1827 
1828 class LIR_List: public CompilationResourceObj {
1829  private:
1830   LIR_OpList  _operations;
1831 
1832   Compilation*  _compilation;
1833 #ifndef PRODUCT
1834   BlockBegin*   _block;
1835 #endif
1836 #ifdef ASSERT
1837   const char *  _file;
1838   int           _line;
1839 #endif
1840 
1841   void append(LIR_Op* op) {
1842     if (op->source() == NULL)
1843       op->set_source(_compilation->current_instruction());
1844 #ifndef PRODUCT
1845     if (PrintIRWithLIR) {
1846       _compilation->maybe_print_current_instruction();
1847       op->print(); tty->cr();
1848     }
1849 #endif // PRODUCT
1850 
1851     _operations.append(op);
1852 
1853 #ifdef ASSERT
1854     op->verify();
1855     op->set_file_and_line(_file, _line);
1856     _file = NULL;
1857     _line = 0;
1858 #endif
1859   }
1860 
1861  public:
1862   LIR_List(Compilation* compilation, BlockBegin* block = NULL);
1863 
1864 #ifdef ASSERT
1865   void set_file_and_line(const char * file, int line);
1866 #endif
1867 
1868   //---------- accessors ---------------
1869   LIR_OpList* instructions_list()                { return &_operations; }
1870   int         length() const                     { return _operations.length(); }
1871   LIR_Op*     at(int i) const                    { return _operations.at(i); }
1872 
1873   NOT_PRODUCT(BlockBegin* block() const          { return _block; });
1874 
1875   // insert LIR_Ops in buffer to right places in LIR_List
1876   void append(LIR_InsertionBuffer* buffer);
1877 
1878   //---------- mutators ---------------
1879   void insert_before(int i, LIR_List* op_list)   { _operations.insert_before(i, op_list->instructions_list()); }
1880   void insert_before(int i, LIR_Op* op)          { _operations.insert_before(i, op); }
1881   void remove_at(int i)                          { _operations.remove_at(i); }
1882 
1883   //---------- printing -------------
1884   void print_instructions() PRODUCT_RETURN;
1885 
1886 
1887   //---------- instructions -------------
1888   void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1889                         address dest, LIR_OprList* arguments,
1890                         CodeEmitInfo* info) {
1891     append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
1892   }
1893   void call_static(ciMethod* method, LIR_Opr result,
1894                    address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1895     append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
1896   }
1897   void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1898                       address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1899     append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
1900   }
1901   void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1902                     intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
1903     append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
1904   }
1905   void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1906                     address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1907     append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
1908   }
1909 
1910   void get_thread(LIR_Opr result)                { append(new LIR_Op0(lir_get_thread, result)); }
1911   void word_align()                              { append(new LIR_Op0(lir_word_align)); }
1912   void membar()                                  { append(new LIR_Op0(lir_membar)); }
1913   void membar_acquire()                          { append(new LIR_Op0(lir_membar_acquire)); }
1914   void membar_release()                          { append(new LIR_Op0(lir_membar_release)); }
1915 
1916   void nop()                                     { append(new LIR_Op0(lir_nop)); }
1917   void build_frame()                             { append(new LIR_Op0(lir_build_frame)); }
1918 
1919   void std_entry(LIR_Opr receiver)               { append(new LIR_Op0(lir_std_entry, receiver)); }
1920   void osr_entry(LIR_Opr osrPointer)             { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
1921 
1922   void branch_destination(Label* lbl)            { append(new LIR_OpLabel(lbl)); }
1923 
1924   void negate(LIR_Opr from, LIR_Opr to)          { append(new LIR_Op1(lir_neg, from, to)); }
1925   void leal(LIR_Opr from, LIR_Opr result_reg)    { append(new LIR_Op1(lir_leal, from, result_reg)); }
1926 
1927   // result is a stack location for old backend and vreg for UseLinearScan
1928   // stack_loc_temp is an illegal register for old backend
1929   void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
1930   void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1931   void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1932   void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1933   void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
1934   void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
1935   void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
1936   void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
1937     if (UseCompressedOops) {
1938       append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
1939     } else {
1940       move(src, dst, info);
1941     }
1942   }
1943   void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
1944     if (UseCompressedOops) {
1945       append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
1946     } else {
1947       move(src, dst, info);
1948     }
1949   }
1950   void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
1951 
1952   void oop2reg  (jobject o, LIR_Opr reg)         { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),    reg));   }
1953   void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
1954 
1955   void return_op(LIR_Opr result)                 { append(new LIR_Op1(lir_return, result)); }
1956 
1957   void safepoint(LIR_Opr tmp, CodeEmitInfo* info)  { append(new LIR_Op1(lir_safepoint, tmp, info)); }
1958 
1959 #ifdef PPC
1960   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
1961 #endif
1962   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
1963 
1964   void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and,  left, right, dst)); }
1965   void logical_or  (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or,   left, right, dst)); }
1966   void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor,  left, right, dst)); }
1967 
1968   void   pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64,   src, dst, T_LONG, lir_patch_none, NULL)); }
1969   void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
1970 
1971   void null_check(LIR_Opr opr, CodeEmitInfo* info)         { append(new LIR_Op1(lir_null_check, opr, info)); }
1972   void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
1973     append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
1974   }
1975   void unwind_exception(LIR_Opr exceptionOop) {
1976     append(new LIR_Op1(lir_unwind, exceptionOop));
1977   }
1978 
1979   void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
1980     append(new LIR_Op2(lir_compare_to,  left, right, dst));
1981   }
1982 
1983   void push(LIR_Opr opr)                                   { append(new LIR_Op1(lir_push, opr)); }
1984   void pop(LIR_Opr reg)                                    { append(new LIR_Op1(lir_pop,  reg)); }
1985 
1986   void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
1987     append(new LIR_Op2(lir_cmp, condition, left, right, info));
1988   }
1989   void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
1990     cmp(condition, left, LIR_OprFact::intConst(right), info);
1991   }
1992 
1993   void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
1994   void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
1995 
1996   void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) {
1997     append(new LIR_Op2(lir_cmove, condition, src1, src2, dst));
1998   }
1999 
2000   void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2001                 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2002   void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2003                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2004   void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2005                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2006 
2007   void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2008   void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2009   void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_log,  from, LIR_OprFact::illegalOpr, to, tmp)); }
2010   void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)              { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2011   void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2012   void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2013   void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2014 
2015   void add (LIR_Opr left, LIR_Opr right, LIR_Opr res)      { append(new LIR_Op2(lir_add, left, right, res)); }
2016   void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2017   void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2018   void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2019   void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL)      { append(new LIR_Op2(lir_div, left, right, res, info)); }
2020   void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2021   void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL)      { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2022 
2023   void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2024   void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2025 
2026   void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2027 
2028   void prefetch(LIR_Address* addr, bool is_store);
2029 
2030   void store_mem_int(jint v,    LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2031   void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2032   void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2033   void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2034   void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2035 
2036   void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2037   void idiv(LIR_Opr left, int   right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2038   void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2039   void irem(LIR_Opr left, int   right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2040 
2041   void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2042   void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2043 
2044   // jump is an unconditional branch
2045   void jump(BlockBegin* block) {
2046     append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2047   }
2048   void jump(CodeStub* stub) {
2049     append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2050   }
2051   void branch(LIR_Condition cond, Label* lbl)        { append(new LIR_OpBranch(cond, lbl)); }
2052   void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2053     assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2054     append(new LIR_OpBranch(cond, type, block));
2055   }
2056   void branch(LIR_Condition cond, BasicType type, CodeStub* stub)    {
2057     assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2058     append(new LIR_OpBranch(cond, type, stub));
2059   }
2060   void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2061     assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2062     append(new LIR_OpBranch(cond, type, block, unordered));
2063   }
2064 
2065   void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2066   void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2067   void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2068 
2069   void shift_left(LIR_Opr value, int count, LIR_Opr dst)       { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2070   void shift_right(LIR_Opr value, int count, LIR_Opr dst)      { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2071   void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2072 
2073   void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst)        { append(new LIR_Op2(lir_cmp_l2i,  left, right, dst)); }
2074   void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2075 
2076   void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2077     append(new LIR_OpRTCall(routine, tmp, result, arguments));
2078   }
2079 
2080   void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2081                     LIR_OprList* arguments, CodeEmitInfo* info) {
2082     append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2083   }
2084 
2085   void load_stack_address_monitor(int monitor_ix, LIR_Opr dst)  { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2086   void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2087   void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2088 
2089   void set_24bit_fpu()                                               { append(new LIR_Op0(lir_24bit_FPU )); }
2090   void restore_fpu()                                                 { append(new LIR_Op0(lir_reset_FPU )); }
2091   void breakpoint()                                                  { append(new LIR_Op0(lir_breakpoint)); }
2092 
2093   void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2094 
2095   void fpop_raw()                                { append(new LIR_Op0(lir_fpop_raw)); }
2096 
2097   void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2098   void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
2099 
2100   void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2101                   LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2102                   CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2103                   ciMethod* profiled_method, int profiled_bci);
2104   // methodDataOop profiling
2105   void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2106     append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass));
2107   }
2108 };
2109 
2110 void print_LIR(BlockList* blocks);
2111 
2112 class LIR_InsertionBuffer : public CompilationResourceObj {
2113  private:
2114   LIR_List*   _lir;   // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2115 
2116   // list of insertion points. index and count are stored alternately:
2117   // _index_and_count[i * 2]:     the index into lir list where "count" ops should be inserted
2118   // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2119   intStack    _index_and_count;
2120 
2121   // the LIR_Ops to be inserted
2122   LIR_OpList  _ops;
2123 
2124   void append_new(int index, int count)  { _index_and_count.append(index); _index_and_count.append(count); }
2125   void set_index_at(int i, int value)    { _index_and_count.at_put((i << 1),     value); }
2126   void set_count_at(int i, int value)    { _index_and_count.at_put((i << 1) + 1, value); }
2127 
2128 #ifdef ASSERT
2129   void verify();
2130 #endif
2131  public:
2132   LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2133 
2134   // must be called before using the insertion buffer
2135   void init(LIR_List* lir)  { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2136   bool initialized() const  { return _lir != NULL; }
2137   // called automatically when the buffer is appended to the LIR_List
2138   void finish()             { _lir = NULL; }
2139 
2140   // accessors
2141   LIR_List*  lir_list() const             { return _lir; }
2142   int number_of_insertion_points() const  { return _index_and_count.length() >> 1; }
2143   int index_at(int i) const               { return _index_and_count.at((i << 1));     }
2144   int count_at(int i) const               { return _index_and_count.at((i << 1) + 1); }
2145 
2146   int number_of_ops() const               { return _ops.length(); }
2147   LIR_Op* op_at(int i) const              { return _ops.at(i); }
2148 
2149   // append an instruction to the buffer
2150   void append(int index, LIR_Op* op);
2151 
2152   // instruction
2153   void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2154 };
2155 
2156 
2157 //
2158 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2159 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2160 // information about the input, output and temporaries used by the
2161 // op to be recorded.  It also records whether the op has call semantics
2162 // and also records all the CodeEmitInfos used by this op.
2163 //
2164 
2165 
2166 class LIR_OpVisitState: public StackObj {
2167  public:
2168   typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2169 
2170   enum {
2171     maxNumberOfOperands = 16,
2172     maxNumberOfInfos = 4
2173   };
2174 
2175  private:
2176   LIR_Op*          _op;
2177 
2178   // optimization: the operands and infos are not stored in a variable-length
2179   //               list, but in a fixed-size array to save time of size checks and resizing
2180   int              _oprs_len[numModes];
2181   LIR_Opr*         _oprs_new[numModes][maxNumberOfOperands];
2182   int _info_len;
2183   CodeEmitInfo*    _info_new[maxNumberOfInfos];
2184 
2185   bool             _has_call;
2186   bool             _has_slow_case;
2187 
2188 
2189   // only include register operands
2190   // addresses are decomposed to the base and index registers
2191   // constants and stack operands are ignored
2192   void append(LIR_Opr& opr, OprMode mode) {
2193     assert(opr->is_valid(), "should not call this otherwise");
2194     assert(mode >= 0 && mode < numModes, "bad mode");
2195 
2196     if (opr->is_register()) {
2197        assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2198       _oprs_new[mode][_oprs_len[mode]++] = &opr;
2199 
2200     } else if (opr->is_pointer()) {
2201       LIR_Address* address = opr->as_address_ptr();
2202       if (address != NULL) {
2203         // special handling for addresses: add base and index register of the address
2204         // both are always input operands!
2205         if (address->_base->is_valid()) {
2206           assert(address->_base->is_register(), "must be");
2207           assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2208           _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base;
2209         }
2210         if (address->_index->is_valid()) {
2211           assert(address->_index->is_register(), "must be");
2212           assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2213           _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index;
2214         }
2215 
2216       } else {
2217         assert(opr->is_constant(), "constant operands are not processed");
2218       }
2219     } else {
2220       assert(opr->is_stack(), "stack operands are not processed");
2221     }
2222   }
2223 
2224   void append(CodeEmitInfo* info) {
2225     assert(info != NULL, "should not call this otherwise");
2226     assert(_info_len < maxNumberOfInfos, "array overflow");
2227     _info_new[_info_len++] = info;
2228   }
2229 
2230  public:
2231   LIR_OpVisitState()         { reset(); }
2232 
2233   LIR_Op* op() const         { return _op; }
2234   void set_op(LIR_Op* op)    { reset(); _op = op; }
2235 
2236   bool has_call() const      { return _has_call; }
2237   bool has_slow_case() const { return _has_slow_case; }
2238 
2239   void reset() {
2240     _op = NULL;
2241     _has_call = false;
2242     _has_slow_case = false;
2243 
2244     _oprs_len[inputMode] = 0;
2245     _oprs_len[tempMode] = 0;
2246     _oprs_len[outputMode] = 0;
2247     _info_len = 0;
2248   }
2249 
2250 
2251   int opr_count(OprMode mode) const {
2252     assert(mode >= 0 && mode < numModes, "bad mode");
2253     return _oprs_len[mode];
2254   }
2255 
2256   LIR_Opr opr_at(OprMode mode, int index) const {
2257     assert(mode >= 0 && mode < numModes, "bad mode");
2258     assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2259     return *_oprs_new[mode][index];
2260   }
2261 
2262   void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2263     assert(mode >= 0 && mode < numModes, "bad mode");
2264     assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2265     *_oprs_new[mode][index] = opr;
2266   }
2267 
2268   int info_count() const {
2269     return _info_len;
2270   }
2271 
2272   CodeEmitInfo* info_at(int index) const {
2273     assert(index < _info_len, "index out of bounds");
2274     return _info_new[index];
2275   }
2276 
2277   XHandlers* all_xhandler();
2278 
2279   // collects all register operands of the instruction
2280   void visit(LIR_Op* op);
2281 
2282 #if ASSERT
2283   // check that an operation has no operands
2284   bool no_operands(LIR_Op* op);
2285 #endif
2286 
2287   // LIR_Op visitor functions use these to fill in the state
2288   void do_input(LIR_Opr& opr)             { append(opr, LIR_OpVisitState::inputMode); }
2289   void do_output(LIR_Opr& opr)            { append(opr, LIR_OpVisitState::outputMode); }
2290   void do_temp(LIR_Opr& opr)              { append(opr, LIR_OpVisitState::tempMode); }
2291   void do_info(CodeEmitInfo* info)        { append(info); }
2292 
2293   void do_stub(CodeStub* stub);
2294   void do_call()                          { _has_call = true; }
2295   void do_slow_case()                     { _has_slow_case = true; }
2296   void do_slow_case(CodeEmitInfo* info) {
2297     _has_slow_case = true;
2298     append(info);
2299   }
2300 };
2301 
2302 
2303 inline LIR_Opr LIR_OprDesc::illegalOpr()   { return LIR_OprFact::illegalOpr; };
2304 
2305 #endif // SHARE_VM_C1_C1_LIR_HPP