src/share/vm/c1/c1_LinearScan.cpp
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*** old/src/share/vm/c1/c1_LinearScan.cpp	Thu Nov 25 07:06:10 2010
--- new/src/share/vm/c1/c1_LinearScan.cpp	Thu Nov 25 07:06:10 2010

*** 1271,1281 **** --- 1271,1281 ---- // when an instruction is a call, a temp range is created for all these registers int num_caller_save_registers = 0; int caller_save_registers[LinearScan::nof_regs]; int i; ! for (i = 0; i < FrameMap::nof_caller_save_cpu_regs(); i++) { LIR_Opr opr = FrameMap::caller_save_cpu_reg_at(i); assert(opr->is_valid() && opr->is_register(), "FrameMap should not return invalid operands"); assert(reg_numHi(opr) == -1, "missing addition of range for hi-register"); caller_save_registers[num_caller_save_registers++] = reg_num(opr); }
*** 3555,3565 **** --- 3555,3565 ---- } } // invalidate all caller save registers at calls if (visitor.has_call()) { ! for (j = 0; j < FrameMap::nof_caller_save_cpu_regs(); j++) { state_put(input_state, reg_num(FrameMap::caller_save_cpu_reg_at(j)), NULL); } for (j = 0; j < FrameMap::nof_caller_save_fpu_regs; j++) { state_put(input_state, reg_num(FrameMap::caller_save_fpu_reg_at(j)), NULL); }
*** 5594,5604 **** --- 5594,5604 ---- } else if (type == T_FLOAT || type == T_DOUBLE) { _first_reg = pd_first_fpu_reg; _last_reg = pd_last_fpu_reg; } else { _first_reg = pd_first_cpu_reg; ! _last_reg = pd_last_cpu_reg; ! _last_reg = FrameMap::last_cpu_reg(); } assert(0 <= _first_reg && _first_reg < LinearScan::nof_regs, "out of range"); assert(0 <= _last_reg && _last_reg < LinearScan::nof_regs, "out of range"); }

src/share/vm/c1/c1_LinearScan.cpp
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