src/cpu/x86/vm/c1_LIRGenerator_x86.cpp
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src/cpu/x86/vm/c1_LIRGenerator_x86.cpp

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*** 1466,1488 **** #endif } else { addr = new LIR_Address(src.result(), offset, type); } ! if (data != dst) { __ move(data, dst); ! data = dst; ! } if (x->is_add()) { ! __ xadd(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr); } else { if (is_obj) { // Do the pre-write barrier, if any. pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, true /* do_load */, false /* patch */, NULL); } ! __ xchg(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr); if (is_obj) { // Seems to be a precise address post_barrier(LIR_OprFact::address(addr), data); } } --- 1466,1487 ---- #endif } else { addr = new LIR_Address(src.result(), offset, type); } ! // Because we want a 2-arg form of xchg and xadd __ move(data, dst); ! if (x->is_add()) { ! __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); } else { if (is_obj) { // Do the pre-write barrier, if any. pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, true /* do_load */, false /* patch */, NULL); } ! __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); if (is_obj) { // Seems to be a precise address post_barrier(LIR_OprFact::address(addr), data); } }
src/cpu/x86/vm/c1_LIRGenerator_x86.cpp
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