1451 
1452   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1453   LIR_Address* addr;
1454   if (offset->is_constant()) {
1455 #ifdef _LP64
1456     jlong c = offset->as_jlong();
1457     if ((jlong)((jint)c) == c) {
1458       addr = new LIR_Address(src.result(), (jint)c, type);
1459     } else {
1460       LIR_Opr tmp = new_register(T_LONG);
1461       __ move(offset, tmp);
1462       addr = new LIR_Address(src.result(), tmp, type);
1463     }
1464 #else
1465     addr = new LIR_Address(src.result(), offset->as_jint(), type);
1466 #endif
1467   } else {
1468     addr = new LIR_Address(src.result(), offset, type);
1469   }
1470 
1471   if (data != dst) {
1472     __ move(data, dst);
1473     data = dst;
1474   }
1475   if (x->is_add()) {
1476     __ xadd(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr);
1477   } else {
1478     if (is_obj) {
1479       // Do the pre-write barrier, if any.
1480       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1481                   true /* do_load */, false /* patch */, NULL);
1482     }
1483     __ xchg(LIR_OprFact::address(addr), data, dst, LIR_OprFact::illegalOpr);
1484     if (is_obj) {
1485       // Seems to be a precise address
1486       post_barrier(LIR_OprFact::address(addr), data);
1487     }
1488   }
1489 }

1451 
1452   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1453   LIR_Address* addr;
1454   if (offset->is_constant()) {
1455 #ifdef _LP64
1456     jlong c = offset->as_jlong();
1457     if ((jlong)((jint)c) == c) {
1458       addr = new LIR_Address(src.result(), (jint)c, type);
1459     } else {
1460       LIR_Opr tmp = new_register(T_LONG);
1461       __ move(offset, tmp);
1462       addr = new LIR_Address(src.result(), tmp, type);
1463     }
1464 #else
1465     addr = new LIR_Address(src.result(), offset->as_jint(), type);
1466 #endif
1467   } else {
1468     addr = new LIR_Address(src.result(), offset, type);
1469   }
1470 
1471   // Because we want a 2-arg form of xchg and xadd
1472   __ move(data, dst);
1473 

1474   if (x->is_add()) {
1475     __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1476   } else {
1477     if (is_obj) {
1478       // Do the pre-write barrier, if any.
1479       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1480                   true /* do_load */, false /* patch */, NULL);
1481     }
1482     __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1483     if (is_obj) {
1484       // Seems to be a precise address
1485       post_barrier(LIR_OprFact::address(addr), data);
1486     }
1487   }
1488 }