src/cpu/x86/vm/vm_version_x86.cpp
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src/cpu/x86/vm/vm_version_x86.cpp

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*** 598,614 **** if( supports_sse4_2() && UseSSE >= 4 ) { UseSSE42Intrinsics = true; } } - // Use count leading zeros count instruction if available. - if (supports_lzcnt()) { - if (FLAG_IS_DEFAULT(UseCountLeadingZerosInstruction)) { - UseCountLeadingZerosInstruction = true; - } - } - // some defaults for AMD family 15h if ( cpu_family() == 0x15 ) { // On family 15h processors default is no sw prefetch if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { AllocatePrefetchStyle = 0; --- 598,607 ----
*** 690,699 **** --- 683,715 ---- // from signal handler. FLAG_SET_DEFAULT(MaxVectorSize, 16); } #endif // COMPILER2 + // Use count leading zeros count instruction if available. + if (supports_lzcnt()) { + if (FLAG_IS_DEFAULT(UseCountLeadingZerosInstruction)) { + UseCountLeadingZerosInstruction = true; + } + } + + //Use count trailing zeros instruction if available + if (FLAG_IS_DEFAULT(UseCountTrailingZerosInstruction)) { + if (supports_bmi1()) { + UseCountTrailingZerosInstruction = true; + } + } + + if (supports_bmi1()) { + if (FLAG_IS_DEFAULT(UseBMI1Instructions)) { + UseBMI1Instructions = true; + } + } else if (UseBMI1Instructions) { + warning("BMI1 instructions are not available on this CPU"); + FLAG_SET_DEFAULT(UseBMI1Instructions, false); + } + // Use population count instruction if available. if (supports_popcnt()) { if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { UsePopCountInstruction = true; }
src/cpu/x86/vm/vm_version_x86.cpp
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