573 void rex_prefix(Address adr, XMMRegister xreg,
574 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
575 int rex_prefix_and_encode(int dst_enc, int src_enc,
576 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
577
578 void vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w,
579 int nds_enc, VexSimdPrefix pre, VexOpcode opc,
580 bool vector256);
581
582 void vex_prefix(Address adr, int nds_enc, int xreg_enc,
583 VexSimdPrefix pre, VexOpcode opc,
584 bool vex_w, bool vector256);
585
586 void vex_prefix(XMMRegister dst, XMMRegister nds, Address src,
587 VexSimdPrefix pre, bool vector256 = false) {
588 int dst_enc = dst->encoding();
589 int nds_enc = nds->is_valid() ? nds->encoding() : 0;
590 vex_prefix(src, nds_enc, dst_enc, pre, VEX_OPCODE_0F, false, vector256);
591 }
592
593 int vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc,
594 VexSimdPrefix pre, VexOpcode opc,
595 bool vex_w, bool vector256);
596
597 int vex_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src,
598 VexSimdPrefix pre, bool vector256 = false,
599 VexOpcode opc = VEX_OPCODE_0F) {
600 int src_enc = src->encoding();
601 int dst_enc = dst->encoding();
602 int nds_enc = nds->is_valid() ? nds->encoding() : 0;
603 return vex_prefix_and_encode(dst_enc, nds_enc, src_enc, pre, opc, false, vector256);
604 }
605
606 void simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr,
607 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F,
608 bool rex_w = false, bool vector256 = false);
609
610 void simd_prefix(XMMRegister dst, Address src,
611 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
612 simd_prefix(dst, xnoreg, src, pre, opc);
613 }
614
615 void simd_prefix(Address dst, XMMRegister src, VexSimdPrefix pre) {
616 simd_prefix(src, dst, pre);
880 void aesdec(XMMRegister dst, Address src);
881 void aesdec(XMMRegister dst, XMMRegister src);
882 void aesdeclast(XMMRegister dst, Address src);
883 void aesdeclast(XMMRegister dst, XMMRegister src);
884 void aesenc(XMMRegister dst, Address src);
885 void aesenc(XMMRegister dst, XMMRegister src);
886 void aesenclast(XMMRegister dst, Address src);
887 void aesenclast(XMMRegister dst, XMMRegister src);
888
889
890 void andl(Address dst, int32_t imm32);
891 void andl(Register dst, int32_t imm32);
892 void andl(Register dst, Address src);
893 void andl(Register dst, Register src);
894
895 void andq(Address dst, int32_t imm32);
896 void andq(Register dst, int32_t imm32);
897 void andq(Register dst, Address src);
898 void andq(Register dst, Register src);
899
900 void bsfl(Register dst, Register src);
901 void bsrl(Register dst, Register src);
902
903 #ifdef _LP64
904 void bsfq(Register dst, Register src);
905 void bsrq(Register dst, Register src);
906 #endif
907
908 void bswapl(Register reg);
909
910 void bswapq(Register reg);
911
912 void call(Label& L, relocInfo::relocType rtype);
913 void call(Register reg); // push pc; pc <- reg
914 void call(Address adr); // push pc; pc <- adr
915
916 void cdql();
917
918 void cdqq();
919
1557 void subl_imm32(Register dst, int32_t imm32);
1558 void subq_imm32(Register dst, int32_t imm32);
1559
1560 // Subtract Scalar Double-Precision Floating-Point Values
1561 void subsd(XMMRegister dst, Address src);
1562 void subsd(XMMRegister dst, XMMRegister src);
1563
1564 // Subtract Scalar Single-Precision Floating-Point Values
1565 void subss(XMMRegister dst, Address src);
1566 void subss(XMMRegister dst, XMMRegister src);
1567
1568 void testb(Register dst, int imm8);
1569
1570 void testl(Register dst, int32_t imm32);
1571 void testl(Register dst, Register src);
1572 void testl(Register dst, Address src);
1573
1574 void testq(Register dst, int32_t imm32);
1575 void testq(Register dst, Register src);
1576
1577
1578 // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1579 void ucomisd(XMMRegister dst, Address src);
1580 void ucomisd(XMMRegister dst, XMMRegister src);
1581
1582 // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1583 void ucomiss(XMMRegister dst, Address src);
1584 void ucomiss(XMMRegister dst, XMMRegister src);
1585
1586 void xaddl(Address dst, Register src);
1587
1588 void xaddq(Address dst, Register src);
1589
1590 void xchgl(Register reg, Address adr);
1591 void xchgl(Register dst, Register src);
1592
1593 void xchgq(Register reg, Address adr);
1594 void xchgq(Register dst, Register src);
1595
1596 // Get Value of Extended Control Register
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573 void rex_prefix(Address adr, XMMRegister xreg,
574 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
575 int rex_prefix_and_encode(int dst_enc, int src_enc,
576 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
577
578 void vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w,
579 int nds_enc, VexSimdPrefix pre, VexOpcode opc,
580 bool vector256);
581
582 void vex_prefix(Address adr, int nds_enc, int xreg_enc,
583 VexSimdPrefix pre, VexOpcode opc,
584 bool vex_w, bool vector256);
585
586 void vex_prefix(XMMRegister dst, XMMRegister nds, Address src,
587 VexSimdPrefix pre, bool vector256 = false) {
588 int dst_enc = dst->encoding();
589 int nds_enc = nds->is_valid() ? nds->encoding() : 0;
590 vex_prefix(src, nds_enc, dst_enc, pre, VEX_OPCODE_0F, false, vector256);
591 }
592
593 void vex_prefix_0F38(Register dst, Register nds, Address src) {
594 bool vex_w = false;
595 bool vector256 = false;
596 vex_prefix(src, nds->encoding(), dst->encoding(),
597 VEX_SIMD_NONE, VEX_OPCODE_0F_38, vex_w, vector256);
598 }
599
600 void vex_prefix_0F38_q(Register dst, Register nds, Address src) {
601 bool vex_w = true;
602 bool vector256 = false;
603 vex_prefix(src, nds->encoding(), dst->encoding(),
604 VEX_SIMD_NONE, VEX_OPCODE_0F_38, vex_w, vector256);
605 }
606 int vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc,
607 VexSimdPrefix pre, VexOpcode opc,
608 bool vex_w, bool vector256);
609
610 int vex_prefix_0F38_and_encode(Register dst, Register nds, Register src) {
611 bool vex_w = false;
612 bool vector256 = false;
613 return vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(),
614 VEX_SIMD_NONE, VEX_OPCODE_0F_38, vex_w, vector256);
615 }
616 int vex_prefix_0F38_and_encode_q(Register dst, Register nds, Register src) {
617 bool vex_w = true;
618 bool vector256 = false;
619 return vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(),
620 VEX_SIMD_NONE, VEX_OPCODE_0F_38, vex_w, vector256);
621 }
622 int vex_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src,
623 VexSimdPrefix pre, bool vector256 = false,
624 VexOpcode opc = VEX_OPCODE_0F) {
625 int src_enc = src->encoding();
626 int dst_enc = dst->encoding();
627 int nds_enc = nds->is_valid() ? nds->encoding() : 0;
628 return vex_prefix_and_encode(dst_enc, nds_enc, src_enc, pre, opc, false, vector256);
629 }
630
631 void simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr,
632 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F,
633 bool rex_w = false, bool vector256 = false);
634
635 void simd_prefix(XMMRegister dst, Address src,
636 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
637 simd_prefix(dst, xnoreg, src, pre, opc);
638 }
639
640 void simd_prefix(Address dst, XMMRegister src, VexSimdPrefix pre) {
641 simd_prefix(src, dst, pre);
905 void aesdec(XMMRegister dst, Address src);
906 void aesdec(XMMRegister dst, XMMRegister src);
907 void aesdeclast(XMMRegister dst, Address src);
908 void aesdeclast(XMMRegister dst, XMMRegister src);
909 void aesenc(XMMRegister dst, Address src);
910 void aesenc(XMMRegister dst, XMMRegister src);
911 void aesenclast(XMMRegister dst, Address src);
912 void aesenclast(XMMRegister dst, XMMRegister src);
913
914
915 void andl(Address dst, int32_t imm32);
916 void andl(Register dst, int32_t imm32);
917 void andl(Register dst, Address src);
918 void andl(Register dst, Register src);
919
920 void andq(Address dst, int32_t imm32);
921 void andq(Register dst, int32_t imm32);
922 void andq(Register dst, Address src);
923 void andq(Register dst, Register src);
924
925 // BMI instructions
926 void andnl(Register dst, Register src1, Register src2);
927 void andnl(Register dst, Register src1, Address src2);
928 void andnq(Register dst, Register src1, Register src2);
929 void andnq(Register dst, Register src1, Address src2);
930
931 void blsil(Register dst, Register src);
932 void blsil(Register dst, Address src);
933 void blsiq(Register dst, Register src);
934 void blsiq(Register dst, Address src);
935
936 void blsmskl(Register dst, Register src);
937 void blsmskl(Register dst, Address src);
938 void blsmskq(Register dst, Register src);
939 void blsmskq(Register dst, Address src);
940
941 void blsrl(Register dst, Register src);
942 void blsrl(Register dst, Address src);
943 void blsrq(Register dst, Register src);
944 void blsrq(Register dst, Address src);
945
946 void bsfl(Register dst, Register src);
947 void bsrl(Register dst, Register src);
948
949 #ifdef _LP64
950 void bsfq(Register dst, Register src);
951 void bsrq(Register dst, Register src);
952 #endif
953
954 void bswapl(Register reg);
955
956 void bswapq(Register reg);
957
958 void call(Label& L, relocInfo::relocType rtype);
959 void call(Register reg); // push pc; pc <- reg
960 void call(Address adr); // push pc; pc <- adr
961
962 void cdql();
963
964 void cdqq();
965
1603 void subl_imm32(Register dst, int32_t imm32);
1604 void subq_imm32(Register dst, int32_t imm32);
1605
1606 // Subtract Scalar Double-Precision Floating-Point Values
1607 void subsd(XMMRegister dst, Address src);
1608 void subsd(XMMRegister dst, XMMRegister src);
1609
1610 // Subtract Scalar Single-Precision Floating-Point Values
1611 void subss(XMMRegister dst, Address src);
1612 void subss(XMMRegister dst, XMMRegister src);
1613
1614 void testb(Register dst, int imm8);
1615
1616 void testl(Register dst, int32_t imm32);
1617 void testl(Register dst, Register src);
1618 void testl(Register dst, Address src);
1619
1620 void testq(Register dst, int32_t imm32);
1621 void testq(Register dst, Register src);
1622
1623 // BMI - count trailing zeros
1624 void tzcntl(Register dst, Register src);
1625 void tzcntq(Register dst, Register src);
1626
1627 // Unordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1628 void ucomisd(XMMRegister dst, Address src);
1629 void ucomisd(XMMRegister dst, XMMRegister src);
1630
1631 // Unordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1632 void ucomiss(XMMRegister dst, Address src);
1633 void ucomiss(XMMRegister dst, XMMRegister src);
1634
1635 void xaddl(Address dst, Register src);
1636
1637 void xaddq(Address dst, Register src);
1638
1639 void xchgl(Register reg, Address adr);
1640 void xchgl(Register dst, Register src);
1641
1642 void xchgq(Register reg, Address adr);
1643 void xchgq(Register dst, Register src);
1644
1645 // Get Value of Extended Control Register
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