src/cpu/sparc/vm/sparc.ad

*** 3396,3405 ****
--- 3396,3416 ----
    op_cost(0);
    format %{ %}
    interface(CONST_INTER);
  %}
  
+ // Int Immediate positive
+ operand immU32()
+ %{
+   predicate(n->get_int() >= 0);
+   match(ConI);
+ 
+   op_cost(0);
+   format %{ %}
+   interface(CONST_INTER);
+ %}
+ 
  // Integer Immediate: 0-bit
  operand immI0() %{
    predicate(n->get_int() == 0);
    match(ConI);
    op_cost(0);
*** 5845,5877 ****
      __ lduh($mem$$Address, $dst$$Register, 2);  // LSW is index+2 on BE
    %}
    ins_pipe(iload_mem);
  %}
  
! // Load Integer with a 13-bit mask into a Long Register
! instruct loadI2L_immI13(iRegL dst, memory mem, immI13 mask) %{
    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    ins_cost(MEMORY_REF_COST + DEFAULT_COST);
  
    size(2*4);
!   format %{ "LDUW   $mem,$dst\t! int & 13-bit mask -> long\n\t"
              "AND    $dst,$mask,$dst" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
      __ lduw($mem$$Address, Rdst);
      __ and3(Rdst, $mask$$constant, Rdst);
    %}
    ins_pipe(iload_mem);
  %}
  
! // Load Integer with a 32-bit mask into a Long Register
! instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{
    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    effect(TEMP dst, TEMP tmp);
    ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
  
!   format %{ "LDUW   $mem,$dst\t! int & 32-bit mask -> long\n\t"
              "SET    $mask,$tmp\n\t"
              "AND    $dst,$tmp,$dst" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
      Register Rtmp = $tmp$$Register;
--- 5856,5888 ----
      __ lduh($mem$$Address, $dst$$Register, 2);  // LSW is index+2 on BE
    %}
    ins_pipe(iload_mem);
  %}
  
! // Load Integer with a 12-bit mask into a Long Register
! instruct loadI2L_immU13(iRegL dst, memory mem, immU13 mask) %{
    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    ins_cost(MEMORY_REF_COST + DEFAULT_COST);
  
    size(2*4);
!   format %{ "LDUW   $mem,$dst\t! int & 12-bit mask -> long\n\t"
              "AND    $dst,$mask,$dst" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
      __ lduw($mem$$Address, Rdst);
      __ and3(Rdst, $mask$$constant, Rdst);
    %}
    ins_pipe(iload_mem);
  %}
  
! // Load Integer with a 31-bit mask into a Long Register
! instruct loadI2L_immU32(iRegL dst, memory mem, immU32 mask, iRegL tmp) %{
    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    effect(TEMP dst, TEMP tmp);
    ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
  
!   format %{ "LDUW   $mem,$dst\t! int & 31-bit mask -> long\n\t"
              "SET    $mask,$tmp\n\t"
              "AND    $dst,$tmp,$dst" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
      Register Rtmp = $tmp$$Register;