src/cpu/x86/vm/x86_32.ad

*** 3887,3896 ****
--- 3887,3907 ----
    op_cost(10);
    format %{ %}
    interface(CONST_INTER);
  %}
  
+ // Int Immediate positive
+ operand immU32()
+ %{
+   predicate(n->get_int() >= 0);
+   match(ConI);
+ 
+   op_cost(0);
+   format %{ %}
+   interface(CONST_INTER);
+ %}
+ 
  // Constant for long shifts
  operand immI_32() %{
    predicate( n->get_int() == 32 );
    match(ConI);
  
*** 6117,6132 ****
      __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
    %}
    ins_pipe(ialu_reg_mem);
  %}
  
! // Load Integer with 32-bit mask into Long Register
! instruct loadI2L_immI(eRegL dst, memory mem, immI mask, eFlagsReg cr) %{
    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    effect(KILL cr);
  
!   format %{ "MOV    $dst.lo,$mem\t# int & 32-bit mask -> long\n\t"
              "XOR    $dst.hi,$dst.hi\n\t"
              "AND    $dst.lo,$mask" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
      __ movl(Rdst, $mem$$Address);
--- 6128,6143 ----
      __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
    %}
    ins_pipe(ialu_reg_mem);
  %}
  
! // Load Integer with 31-bit mask into Long Register
! instruct loadI2L_immU32(eRegL dst, memory mem, immU32 mask, eFlagsReg cr) %{
    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    effect(KILL cr);
  
!   format %{ "MOV    $dst.lo,$mem\t# int & 31-bit mask -> long\n\t"
              "XOR    $dst.hi,$dst.hi\n\t"
              "AND    $dst.lo,$mask" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
      __ movl(Rdst, $mem$$Address);