3872 %}
3873
3874 operand immI8() %{
3875 predicate((-128 <= n->get_int()) && (n->get_int() <= 127));
3876 match(ConI);
3877
3878 op_cost(5);
3879 format %{ %}
3880 interface(CONST_INTER);
3881 %}
3882
3883 operand immI16() %{
3884 predicate((-32768 <= n->get_int()) && (n->get_int() <= 32767));
3885 match(ConI);
3886
3887 op_cost(10);
3888 format %{ %}
3889 interface(CONST_INTER);
3890 %}
3891
3892 // Constant for long shifts
3893 operand immI_32() %{
3894 predicate( n->get_int() == 32 );
3895 match(ConI);
3896
3897 op_cost(0);
3898 format %{ %}
3899 interface(CONST_INTER);
3900 %}
3901
3902 operand immI_1_31() %{
3903 predicate( n->get_int() >= 1 && n->get_int() <= 31 );
3904 match(ConI);
3905
3906 op_cost(0);
3907 format %{ %}
3908 interface(CONST_INTER);
3909 %}
3910
3911 operand immI_32_63() %{
6102 __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
6103 %}
6104 ins_pipe(ialu_reg_mem);
6105 %}
6106
6107 // Load Integer with mask 0xFFFF into Long Register
6108 instruct loadI2L_immI_65535(eRegL dst, memory mem, immI_65535 mask, eFlagsReg cr) %{
6109 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
6110 effect(KILL cr);
6111
6112 format %{ "MOVZX $dst.lo,$mem\t# int & 0xFFFF -> long\n\t"
6113 "XOR $dst.hi,$dst.hi" %}
6114 ins_encode %{
6115 Register Rdst = $dst$$Register;
6116 __ movzwl(Rdst, $mem$$Address);
6117 __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
6118 %}
6119 ins_pipe(ialu_reg_mem);
6120 %}
6121
6122 // Load Integer with 32-bit mask into Long Register
6123 instruct loadI2L_immI(eRegL dst, memory mem, immI mask, eFlagsReg cr) %{
6124 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
6125 effect(KILL cr);
6126
6127 format %{ "MOV $dst.lo,$mem\t# int & 32-bit mask -> long\n\t"
6128 "XOR $dst.hi,$dst.hi\n\t"
6129 "AND $dst.lo,$mask" %}
6130 ins_encode %{
6131 Register Rdst = $dst$$Register;
6132 __ movl(Rdst, $mem$$Address);
6133 __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
6134 __ andl(Rdst, $mask$$constant);
6135 %}
6136 ins_pipe(ialu_reg_mem);
6137 %}
6138
6139 // Load Unsigned Integer into Long Register
6140 instruct loadUI2L(eRegL dst, memory mem, immL_32bits mask, eFlagsReg cr) %{
6141 match(Set dst (AndL (ConvI2L (LoadI mem)) mask));
6142 effect(KILL cr);
6143
6144 ins_cost(250);
6145 format %{ "MOV $dst.lo,$mem\t# uint -> long\n\t"
6146 "XOR $dst.hi,$dst.hi" %}
6147
|
3872 %}
3873
3874 operand immI8() %{
3875 predicate((-128 <= n->get_int()) && (n->get_int() <= 127));
3876 match(ConI);
3877
3878 op_cost(5);
3879 format %{ %}
3880 interface(CONST_INTER);
3881 %}
3882
3883 operand immI16() %{
3884 predicate((-32768 <= n->get_int()) && (n->get_int() <= 32767));
3885 match(ConI);
3886
3887 op_cost(10);
3888 format %{ %}
3889 interface(CONST_INTER);
3890 %}
3891
3892 // Int Immediate non-negative
3893 operand immU31()
3894 %{
3895 predicate(n->get_int() >= 0);
3896 match(ConI);
3897
3898 op_cost(0);
3899 format %{ %}
3900 interface(CONST_INTER);
3901 %}
3902
3903 // Constant for long shifts
3904 operand immI_32() %{
3905 predicate( n->get_int() == 32 );
3906 match(ConI);
3907
3908 op_cost(0);
3909 format %{ %}
3910 interface(CONST_INTER);
3911 %}
3912
3913 operand immI_1_31() %{
3914 predicate( n->get_int() >= 1 && n->get_int() <= 31 );
3915 match(ConI);
3916
3917 op_cost(0);
3918 format %{ %}
3919 interface(CONST_INTER);
3920 %}
3921
3922 operand immI_32_63() %{
6113 __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
6114 %}
6115 ins_pipe(ialu_reg_mem);
6116 %}
6117
6118 // Load Integer with mask 0xFFFF into Long Register
6119 instruct loadI2L_immI_65535(eRegL dst, memory mem, immI_65535 mask, eFlagsReg cr) %{
6120 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
6121 effect(KILL cr);
6122
6123 format %{ "MOVZX $dst.lo,$mem\t# int & 0xFFFF -> long\n\t"
6124 "XOR $dst.hi,$dst.hi" %}
6125 ins_encode %{
6126 Register Rdst = $dst$$Register;
6127 __ movzwl(Rdst, $mem$$Address);
6128 __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
6129 %}
6130 ins_pipe(ialu_reg_mem);
6131 %}
6132
6133 // Load Integer with 31-bit mask into Long Register
6134 instruct loadI2L_immU31(eRegL dst, memory mem, immU31 mask, eFlagsReg cr) %{
6135 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
6136 effect(KILL cr);
6137
6138 format %{ "MOV $dst.lo,$mem\t# int & 31-bit mask -> long\n\t"
6139 "XOR $dst.hi,$dst.hi\n\t"
6140 "AND $dst.lo,$mask" %}
6141 ins_encode %{
6142 Register Rdst = $dst$$Register;
6143 __ movl(Rdst, $mem$$Address);
6144 __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
6145 __ andl(Rdst, $mask$$constant);
6146 %}
6147 ins_pipe(ialu_reg_mem);
6148 %}
6149
6150 // Load Unsigned Integer into Long Register
6151 instruct loadUI2L(eRegL dst, memory mem, immL_32bits mask, eFlagsReg cr) %{
6152 match(Set dst (AndL (ConvI2L (LoadI mem)) mask));
6153 effect(KILL cr);
6154
6155 ins_cost(250);
6156 format %{ "MOV $dst.lo,$mem\t# uint -> long\n\t"
6157 "XOR $dst.hi,$dst.hi" %}
6158
|