src/cpu/x86/vm/x86_64.ad
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hs-comp-convi2l Cdiff src/cpu/x86/vm/x86_64.ad
src/cpu/x86/vm/x86_64.ad
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*** 3084,3093 ****
--- 3084,3104 ----
op_cost(10);
format %{ %}
interface(CONST_INTER);
%}
+ // Int Immediate non-negative
+ operand immU31()
+ %{
+ predicate(n->get_int() >= 0);
+ match(ConI);
+
+ op_cost(0);
+ format %{ %}
+ interface(CONST_INTER);
+ %}
+
// Constant for long shifts
operand immI_32()
%{
predicate( n->get_int() == 32 );
match(ConI);
*** 5040,5055 ****
__ movzwq($dst$$Register, $mem$$Address);
%}
ins_pipe(ialu_reg_mem);
%}
! // Load Integer with a 32-bit mask into Long Register
! instruct loadI2L_immI(rRegL dst, memory mem, immI mask, rFlagsReg cr) %{
match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
effect(KILL cr);
! format %{ "movl $dst, $mem\t# int & 32-bit mask -> long\n\t"
"andl $dst, $mask" %}
ins_encode %{
Register Rdst = $dst$$Register;
__ movl(Rdst, $mem$$Address);
__ andl(Rdst, $mask$$constant);
--- 5051,5066 ----
__ movzwq($dst$$Register, $mem$$Address);
%}
ins_pipe(ialu_reg_mem);
%}
! // Load Integer with a 31-bit mask into Long Register
! instruct loadI2L_immU31(rRegL dst, memory mem, immU31 mask, rFlagsReg cr) %{
match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
effect(KILL cr);
! format %{ "movl $dst, $mem\t# int & 31-bit mask -> long\n\t"
"andl $dst, $mask" %}
ins_encode %{
Register Rdst = $dst$$Register;
__ movl(Rdst, $mem$$Address);
__ andl(Rdst, $mask$$constant);
src/cpu/x86/vm/x86_64.ad
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