3069 operand immI8() 3070 %{ 3071 predicate((-0x80 <= n->get_int()) && (n->get_int() < 0x80)); 3072 match(ConI); 3073 3074 op_cost(5); 3075 format %{ %} 3076 interface(CONST_INTER); 3077 %} 3078 3079 operand immI16() 3080 %{ 3081 predicate((-32768 <= n->get_int()) && (n->get_int() <= 32767)); 3082 match(ConI); 3083 3084 op_cost(10); 3085 format %{ %} 3086 interface(CONST_INTER); 3087 %} 3088 3089 // Constant for long shifts 3090 operand immI_32() 3091 %{ 3092 predicate( n->get_int() == 32 ); 3093 match(ConI); 3094 3095 op_cost(0); 3096 format %{ %} 3097 interface(CONST_INTER); 3098 %} 3099 3100 // Constant for long shifts 3101 operand immI_64() 3102 %{ 3103 predicate( n->get_int() == 64 ); 3104 match(ConI); 3105 3106 op_cost(0); 3107 format %{ %} 3108 interface(CONST_INTER); 5025 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); 5026 5027 format %{ "movzbq $dst, $mem\t# int & 0xFF -> long" %} 5028 ins_encode %{ 5029 __ movzbq($dst$$Register, $mem$$Address); 5030 %} 5031 ins_pipe(ialu_reg_mem); 5032 %} 5033 5034 // Load Integer with mask 0xFFFF into Long Register 5035 instruct loadI2L_immI_65535(rRegL dst, memory mem, immI_65535 mask) %{ 5036 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); 5037 5038 format %{ "movzwq $dst, $mem\t# int & 0xFFFF -> long" %} 5039 ins_encode %{ 5040 __ movzwq($dst$$Register, $mem$$Address); 5041 %} 5042 ins_pipe(ialu_reg_mem); 5043 %} 5044 5045 // Load Integer with a 32-bit mask into Long Register 5046 instruct loadI2L_immI(rRegL dst, memory mem, immI mask, rFlagsReg cr) %{ 5047 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); 5048 effect(KILL cr); 5049 5050 format %{ "movl $dst, $mem\t# int & 32-bit mask -> long\n\t" 5051 "andl $dst, $mask" %} 5052 ins_encode %{ 5053 Register Rdst = $dst$$Register; 5054 __ movl(Rdst, $mem$$Address); 5055 __ andl(Rdst, $mask$$constant); 5056 %} 5057 ins_pipe(ialu_reg_mem); 5058 %} 5059 5060 // Load Unsigned Integer into Long Register 5061 instruct loadUI2L(rRegL dst, memory mem, immL_32bits mask) 5062 %{ 5063 match(Set dst (AndL (ConvI2L (LoadI mem)) mask)); 5064 5065 ins_cost(125); 5066 format %{ "movl $dst, $mem\t# uint -> long" %} 5067 5068 ins_encode %{ 5069 __ movl($dst$$Register, $mem$$Address); 5070 %} | 3069 operand immI8() 3070 %{ 3071 predicate((-0x80 <= n->get_int()) && (n->get_int() < 0x80)); 3072 match(ConI); 3073 3074 op_cost(5); 3075 format %{ %} 3076 interface(CONST_INTER); 3077 %} 3078 3079 operand immI16() 3080 %{ 3081 predicate((-32768 <= n->get_int()) && (n->get_int() <= 32767)); 3082 match(ConI); 3083 3084 op_cost(10); 3085 format %{ %} 3086 interface(CONST_INTER); 3087 %} 3088 3089 // Int Immediate non-negative 3090 operand immU31() 3091 %{ 3092 predicate(n->get_int() >= 0); 3093 match(ConI); 3094 3095 op_cost(0); 3096 format %{ %} 3097 interface(CONST_INTER); 3098 %} 3099 3100 // Constant for long shifts 3101 operand immI_32() 3102 %{ 3103 predicate( n->get_int() == 32 ); 3104 match(ConI); 3105 3106 op_cost(0); 3107 format %{ %} 3108 interface(CONST_INTER); 3109 %} 3110 3111 // Constant for long shifts 3112 operand immI_64() 3113 %{ 3114 predicate( n->get_int() == 64 ); 3115 match(ConI); 3116 3117 op_cost(0); 3118 format %{ %} 3119 interface(CONST_INTER); 5036 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); 5037 5038 format %{ "movzbq $dst, $mem\t# int & 0xFF -> long" %} 5039 ins_encode %{ 5040 __ movzbq($dst$$Register, $mem$$Address); 5041 %} 5042 ins_pipe(ialu_reg_mem); 5043 %} 5044 5045 // Load Integer with mask 0xFFFF into Long Register 5046 instruct loadI2L_immI_65535(rRegL dst, memory mem, immI_65535 mask) %{ 5047 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); 5048 5049 format %{ "movzwq $dst, $mem\t# int & 0xFFFF -> long" %} 5050 ins_encode %{ 5051 __ movzwq($dst$$Register, $mem$$Address); 5052 %} 5053 ins_pipe(ialu_reg_mem); 5054 %} 5055 5056 // Load Integer with a 31-bit mask into Long Register 5057 instruct loadI2L_immU31(rRegL dst, memory mem, immU31 mask, rFlagsReg cr) %{ 5058 match(Set dst (ConvI2L (AndI (LoadI mem) mask))); 5059 effect(KILL cr); 5060 5061 format %{ "movl $dst, $mem\t# int & 31-bit mask -> long\n\t" 5062 "andl $dst, $mask" %} 5063 ins_encode %{ 5064 Register Rdst = $dst$$Register; 5065 __ movl(Rdst, $mem$$Address); 5066 __ andl(Rdst, $mask$$constant); 5067 %} 5068 ins_pipe(ialu_reg_mem); 5069 %} 5070 5071 // Load Unsigned Integer into Long Register 5072 instruct loadUI2L(rRegL dst, memory mem, immL_32bits mask) 5073 %{ 5074 match(Set dst (AndL (ConvI2L (LoadI mem)) mask)); 5075 5076 ins_cost(125); 5077 format %{ "movl $dst, $mem\t# uint -> long" %} 5078 5079 ins_encode %{ 5080 __ movl($dst$$Register, $mem$$Address); 5081 %} |