src/cpu/sparc/vm/sparc.ad

*** 5724,5734 ****
  instruct loadUS2L_immI16(iRegL dst, memory mem, immI16 mask, iRegL tmp) %{
    match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
    effect(TEMP dst, TEMP tmp);
    ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
  
-   size((3+1)*4);  // set may use two instructions.
    format %{ "LDUH   $mem,$dst\t! ushort/char & 16-bit mask -> long\n\t"
              "SET    $mask,$tmp\n\t"
              "AND    $dst,$tmp,$dst" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
--- 5724,5733 ----
*** 5868,5878 ****
  instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{
    match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
    effect(TEMP dst, TEMP tmp);
    ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
  
-   size((3+1)*4);  // set may use two instructions.
    format %{ "LDUW   $mem,$dst\t! int & 32-bit mask -> long\n\t"
              "SET    $mask,$tmp\n\t"
              "AND    $dst,$tmp,$dst" %}
    ins_encode %{
      Register Rdst = $dst$$Register;
--- 5867,5876 ----