src/share/vm/opto/machnode.hpp
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src/share/vm/opto/machnode.hpp

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 193   // Generally at least 1, to skip the Control input
 194   virtual uint oper_input_base() const { return 1; }
 195   // Position of constant base node in node's inputs. -1 if
 196   // no constant base node input.
 197   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 198 
 199   // Copy inputs and operands to new node of instruction.
 200   // Called from cisc_version() and short_branch_version().
 201   // !!!! The method's body is defined in ad_<arch>.cpp file.
 202   void fill_new_machnode(MachNode *n, Compile* C) const;
 203 
 204   // Return an equivalent instruction using memory for cisc_operand position
 205   virtual MachNode *cisc_version(int offset, Compile* C);
 206   // Modify this instruction's register mask to use stack version for cisc_operand
 207   virtual void use_cisc_RegMask();
 208 
 209   // Support for short branches
 210   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 211 
 212   // Avoid back to back some instructions on some CPUs.
 213   bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }







 214 
 215   // instruction implemented with a call
 216   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 217 
 218   // First index in _in[] corresponding to operand, or -1 if there is none
 219   int  operand_index(uint operand) const;
 220   int  operand_index(const MachOper *oper) const;
 221 
 222   // Register class input is expected in
 223   virtual const RegMask &in_RegMask(uint) const;
 224 
 225   // cisc-spillable instructions redefine for use by in_RegMask
 226   virtual const RegMask *cisc_RegMask() const { return NULL; }
 227 
 228   // If this instruction is a 2-address instruction, then return the
 229   // index of the input which must match the output.  Not nessecary
 230   // for instructions which bind the input and output register to the
 231   // same singleton regiser (e.g., Intel IDIV which binds AX to be
 232   // both an input and an output).  It is nessecary when the input and
 233   // output have choices - but they must use the same choice.




 193   // Generally at least 1, to skip the Control input
 194   virtual uint oper_input_base() const { return 1; }
 195   // Position of constant base node in node's inputs. -1 if
 196   // no constant base node input.
 197   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 198 
 199   // Copy inputs and operands to new node of instruction.
 200   // Called from cisc_version() and short_branch_version().
 201   // !!!! The method's body is defined in ad_<arch>.cpp file.
 202   void fill_new_machnode(MachNode *n, Compile* C) const;
 203 
 204   // Return an equivalent instruction using memory for cisc_operand position
 205   virtual MachNode *cisc_version(int offset, Compile* C);
 206   // Modify this instruction's register mask to use stack version for cisc_operand
 207   virtual void use_cisc_RegMask();
 208 
 209   // Support for short branches
 210   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 211 
 212   // Avoid back to back some instructions on some CPUs.
 213   enum AvoidBackToBackFlag { AVOID_NONE = 0,
 214                              AVOID_BEFORE = Flag_avoid_back_to_back_before,
 215                              AVOID_AFTER = Flag_avoid_back_to_back_after,
 216                              AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
 217 
 218   bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
 219     return (flags() & flag_value) == flag_value;
 220   }
 221 
 222   // instruction implemented with a call
 223   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 224 
 225   // First index in _in[] corresponding to operand, or -1 if there is none
 226   int  operand_index(uint operand) const;
 227   int  operand_index(const MachOper *oper) const;
 228 
 229   // Register class input is expected in
 230   virtual const RegMask &in_RegMask(uint) const;
 231 
 232   // cisc-spillable instructions redefine for use by in_RegMask
 233   virtual const RegMask *cisc_RegMask() const { return NULL; }
 234 
 235   // If this instruction is a 2-address instruction, then return the
 236   // index of the input which must match the output.  Not nessecary
 237   // for instructions which bind the input and output register to the
 238   // same singleton regiser (e.g., Intel IDIV which binds AX to be
 239   // both an input and an output).  It is nessecary when the input and
 240   // output have choices - but they must use the same choice.


src/share/vm/opto/machnode.hpp
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