src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp
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hs-comp Cdiff src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp
src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp
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*** 1219,1232 ****
LIR_Opr dst = rlock_result(x, type);
LIR_Opr data = value.result();
bool is_obj = (type == T_ARRAY || type == T_OBJECT);
LIR_Opr offset = off.result();
! if (data != dst) {
__ move(data, dst);
- data = dst;
- }
assert (!x->is_add() && (type == T_INT || (is_obj LP64_ONLY(&& UseCompressedOops))), "unexpected type");
LIR_Address* addr;
if (offset->is_constant()) {
--- 1219,1230 ----
LIR_Opr dst = rlock_result(x, type);
LIR_Opr data = value.result();
bool is_obj = (type == T_ARRAY || type == T_OBJECT);
LIR_Opr offset = off.result();
! // Because we want a 2-arg form of xchg
__ move(data, dst);
assert (!x->is_add() && (type == T_INT || (is_obj LP64_ONLY(&& UseCompressedOops))), "unexpected type");
LIR_Address* addr;
if (offset->is_constant()) {
*** 1252,1262 ****
ptr = new_pointer_register();
__ add(src.result(), off.result(), ptr);
pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
true /* do_load */, false /* patch */, NULL);
}
! __ xchg(LIR_OprFact::address(addr), data, dst, tmp);
if (is_obj) {
// Seems to be a precise address
post_barrier(ptr, data);
}
}
--- 1250,1260 ----
ptr = new_pointer_register();
__ add(src.result(), off.result(), ptr);
pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
true /* do_load */, false /* patch */, NULL);
}
! __ xchg(LIR_OprFact::address(addr), dst, dst, tmp);
if (is_obj) {
// Seems to be a precise address
post_barrier(ptr, data);
}
}
src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp
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