2052   LIRItem idx(this);
2053 
2054   base.load_item();
2055   if (x->has_index()) {
2056     idx.set_instruction(x->index());
2057     idx.load_nonconstant();
2058   }
2059 
2060   LIR_Opr reg = rlock_result(x, x->basic_type());
2061 
2062   int   log2_scale = 0;
2063   if (x->has_index()) {
2064     log2_scale = x->log2_scale();
2065   }
2066 
2067   assert(!x->has_index() || idx.value() == x->index(), "should match");
2068 
2069   LIR_Opr base_op = base.result();
2070   LIR_Opr index_op = idx.result();
2071 #ifndef _LP64
2072   if (x->base()->type()->tag() == longTag) {
2073     base_op = new_register(T_INT);
2074     __ convert(Bytecodes::_l2i, base.result(), base_op);
2075   }
2076   if (x->has_index()) {
2077     if (x->index()->type()->tag() == longTag) {
2078       LIR_Opr long_index_op = index_op;
2079       if (x->index()->type()->is_constant()) {
2080         long_index_op = new_register(T_LONG);
2081         __ move(index_op, long_index_op);
2082       }
2083       index_op = new_register(T_INT);
2084       __ convert(Bytecodes::_l2i, long_index_op, index_op);
2085     } else {
2086       assert(x->index()->type()->tag() == intTag, "must be");
2087     }
2088   }
2089   // At this point base and index should be all ints.
2090   assert(base_op->type() == T_INT && !base_op->is_constant(), "base should be an non-constant int");
2091   assert(!x->has_index() || index_op->type() == T_INT, "index should be an int");
2092 #else
2093   if (x->has_index()) {
2094     if (x->index()->type()->tag() == intTag) {
2095       if (!x->index()->type()->is_constant()) {
2096         index_op = new_register(T_LONG);
2097         __ convert(Bytecodes::_i2l, idx.result(), index_op);
2098       }
2099     } else {
2100       assert(x->index()->type()->tag() == longTag, "must be");
2101       if (x->index()->type()->is_constant()) {
2102         index_op = new_register(T_LONG);
2103         __ move(idx.result(), index_op);
2104       }
2105     }
2106   }
2107   // At this point base is a long non-constant
2108   // Index is a long register or a int constant.
2109   // We allow the constant to stay an int because that would allow us a more compact encoding by
2110   // embedding an immediate offset in the address expression. If we have a long constant, we have to
2111   // move it into a register first.
2112   assert(base_op->type() == T_LONG && !base_op->is_constant(), "base must be a long non-constant");
2113   assert(!x->has_index() || (index_op->type() == T_INT && index_op->is_constant()) ||
2114                             (index_op->type() == T_LONG && !index_op->is_constant()), "unexpected index type");
2115 #endif
2116 
2117   BasicType dst_type = x->basic_type();
2118 
2119   LIR_Address* addr;
2120   if (index_op->is_constant()) {
2121     assert(log2_scale == 0, "must not have a scale");

2162   LIRItem idx(this);
2163 
2164   base.load_item();
2165   if (x->has_index()) {
2166     idx.set_instruction(x->index());
2167     idx.load_item();
2168   }
2169 
2170   if (type == T_BYTE || type == T_BOOLEAN) {
2171     value.load_byte_item();
2172   } else {
2173     value.load_item();
2174   }
2175 
2176   set_no_result(x);
2177 
2178   LIR_Opr base_op = base.result();
2179   LIR_Opr index_op = idx.result();
2180 
2181 #ifndef _LP64
2182   if (x->base()->type()->tag() == longTag) {
2183     base_op = new_register(T_INT);
2184     __ convert(Bytecodes::_l2i, base.result(), base_op);
2185   }
2186   if (x->has_index()) {
2187     if (x->index()->type()->tag() == longTag) {
2188       index_op = new_register(T_INT);
2189       __ convert(Bytecodes::_l2i, idx.result(), index_op);
2190     }
2191   }
2192   // At this point base and index should be all ints and not constants
2193   assert(base_op->type() == T_INT && !base_op->is_constant(), "base should be an non-constant int");
2194   assert(!x->has_index() || (index_op->type() == T_INT && !index_op->is_constant()), "index should be an non-constant int");
2195 #else
2196   if (x->has_index()) {
2197     if (x->index()->type()->tag() == intTag) {
2198       index_op = new_register(T_LONG);
2199       __ convert(Bytecodes::_i2l, idx.result(), index_op);
2200     }
2201   }
2202   // At this point base and index are long and non-constant
2203   assert(base_op->type() == T_LONG && !base_op->is_constant(), "base must be a non-constant long");
2204   assert(!x->has_index() || (index_op->type() == T_LONG && !index_op->is_constant()), "index must be a non-constant long");
2205 #endif
2206 
2207   if (log2_scale != 0) {
2208     // temporary fix (platform dependent code without shift on Intel would be better)
2209     // TODO: ARM also allows embedded shift in the address
2210     __ shift_left(index_op, log2_scale, index_op);
2211   }
2212 
2213   LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());
2214   __ move(value.result(), addr);
2215 }
2216 
2217 

2052   LIRItem idx(this);
2053 
2054   base.load_item();
2055   if (x->has_index()) {
2056     idx.set_instruction(x->index());
2057     idx.load_nonconstant();
2058   }
2059 
2060   LIR_Opr reg = rlock_result(x, x->basic_type());
2061 
2062   int   log2_scale = 0;
2063   if (x->has_index()) {
2064     log2_scale = x->log2_scale();
2065   }
2066 
2067   assert(!x->has_index() || idx.value() == x->index(), "should match");
2068 
2069   LIR_Opr base_op = base.result();
2070   LIR_Opr index_op = idx.result();
2071 #ifndef _LP64
2072   if (base_op->type() == T_LONG) {
2073     base_op = new_register(T_INT);
2074     __ convert(Bytecodes::_l2i, base.result(), base_op);
2075   }
2076   if (x->has_index()) {
2077     if (index_op->type() == T_LONG) {
2078       LIR_Opr long_index_op = index_op;
2079       if (index_op->is_constant()) {
2080         long_index_op = new_register(T_LONG);
2081         __ move(index_op, long_index_op);
2082       }
2083       index_op = new_register(T_INT);
2084       __ convert(Bytecodes::_l2i, long_index_op, index_op);
2085     } else {
2086       assert(x->index()->type()->tag() == intTag, "must be");
2087     }
2088   }
2089   // At this point base and index should be all ints.
2090   assert(base_op->type() == T_INT && !base_op->is_constant(), "base should be an non-constant int");
2091   assert(!x->has_index() || index_op->type() == T_INT, "index should be an int");
2092 #else
2093   if (x->has_index()) {
2094     if (index_op->type() == T_INT) {
2095       if (!index_op->is_constant()) {
2096         index_op = new_register(T_LONG);
2097         __ convert(Bytecodes::_i2l, idx.result(), index_op);
2098       }
2099     } else {
2100       assert(index_op->type() == T_LONG, "must be");
2101       if (index_op->is_constant()) {
2102         index_op = new_register(T_LONG);
2103         __ move(idx.result(), index_op);
2104       }
2105     }
2106   }
2107   // At this point base is a long non-constant
2108   // Index is a long register or a int constant.
2109   // We allow the constant to stay an int because that would allow us a more compact encoding by
2110   // embedding an immediate offset in the address expression. If we have a long constant, we have to
2111   // move it into a register first.
2112   assert(base_op->type() == T_LONG && !base_op->is_constant(), "base must be a long non-constant");
2113   assert(!x->has_index() || (index_op->type() == T_INT && index_op->is_constant()) ||
2114                             (index_op->type() == T_LONG && !index_op->is_constant()), "unexpected index type");
2115 #endif
2116 
2117   BasicType dst_type = x->basic_type();
2118 
2119   LIR_Address* addr;
2120   if (index_op->is_constant()) {
2121     assert(log2_scale == 0, "must not have a scale");

2162   LIRItem idx(this);
2163 
2164   base.load_item();
2165   if (x->has_index()) {
2166     idx.set_instruction(x->index());
2167     idx.load_item();
2168   }
2169 
2170   if (type == T_BYTE || type == T_BOOLEAN) {
2171     value.load_byte_item();
2172   } else {
2173     value.load_item();
2174   }
2175 
2176   set_no_result(x);
2177 
2178   LIR_Opr base_op = base.result();
2179   LIR_Opr index_op = idx.result();
2180 
2181 #ifndef _LP64
2182   if (base_op->type() == T_LONG) {
2183     base_op = new_register(T_INT);
2184     __ convert(Bytecodes::_l2i, base.result(), base_op);
2185   }
2186   if (x->has_index()) {
2187     if (index_op->type() == T_LONG) {
2188       index_op = new_register(T_INT);
2189       __ convert(Bytecodes::_l2i, idx.result(), index_op);
2190     }
2191   }
2192   // At this point base and index should be all ints and not constants
2193   assert(base_op->type() == T_INT && !base_op->is_constant(), "base should be an non-constant int");
2194   assert(!x->has_index() || (index_op->type() == T_INT && !index_op->is_constant()), "index should be an non-constant int");
2195 #else
2196   if (x->has_index()) {
2197     if (index_op->type() == T_INT) {
2198       index_op = new_register(T_LONG);
2199       __ convert(Bytecodes::_i2l, idx.result(), index_op);
2200     }
2201   }
2202   // At this point base and index are long and non-constant
2203   assert(base_op->type() == T_LONG && !base_op->is_constant(), "base must be a non-constant long");
2204   assert(!x->has_index() || (index_op->type() == T_LONG && !index_op->is_constant()), "index must be a non-constant long");
2205 #endif
2206 
2207   if (log2_scale != 0) {
2208     // temporary fix (platform dependent code without shift on Intel would be better)
2209     // TODO: ARM also allows embedded shift in the address
2210     __ shift_left(index_op, log2_scale, index_op);
2211   }
2212 
2213   LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());
2214   __ move(value.result(), addr);
2215 }
2216 
2217