1 /*
   2  * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/chaitin.hpp"
  28 #include "opto/machnode.hpp"
  29 
  30 // See if this register (or pairs, or vector) already contains the value.
  31 static bool register_contains_value(Node* val, OptoReg::Name reg, int n_regs,
  32                                     Node_List& value) {
  33   for (int i = 0; i < n_regs; i++) {
  34     OptoReg::Name nreg = OptoReg::add(reg,-i);
  35     if (value[nreg] != val)
  36       return false;
  37   }
  38   return true;
  39 }
  40 
  41 //---------------------------may_be_copy_of_callee-----------------------------
  42 // Check to see if we can possibly be a copy of a callee-save value.
  43 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
  44   // Short circuit if there are no callee save registers
  45   if (_matcher.number_of_saved_registers() == 0) return false;
  46 
  47   // Expect only a spill-down and reload on exit for callee-save spills.
  48   // Chains of copies cannot be deep.
  49   // 5008997 - This is wishful thinking. Register allocator seems to
  50   // be splitting live ranges for callee save registers to such
  51   // an extent that in large methods the chains can be very long
  52   // (50+). The conservative answer is to return true if we don't
  53   // know as this prevents optimizations from occurring.
  54 
  55   const int limit = 60;
  56   int i;
  57   for( i=0; i < limit; i++ ) {
  58     if( def->is_Proj() && def->in(0)->is_Start() &&
  59         _matcher.is_save_on_entry(lrgs(_lrg_map.live_range_id(def)).reg()))
  60       return true;              // Direct use of callee-save proj
  61     if( def->is_Copy() )        // Copies carry value through
  62       def = def->in(def->is_Copy());
  63     else if( def->is_Phi() )    // Phis can merge it from any direction
  64       def = def->in(1);
  65     else
  66       break;
  67     guarantee(def != NULL, "must not resurrect dead copy");
  68   }
  69   // If we reached the end and didn't find a callee save proj
  70   // then this may be a callee save proj so we return true
  71   // as the conservative answer. If we didn't reach then end
  72   // we must have discovered that it was not a callee save
  73   // else we would have returned.
  74   return i == limit;
  75 }
  76 
  77 //------------------------------yank-----------------------------------
  78 // Helper function for yank_if_dead
  79 int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
  80   int blk_adjust=0;
  81   Block *oldb = _cfg.get_block_for_node(old);
  82   oldb->find_remove(old);
  83   // Count 1 if deleting an instruction from the current block
  84   if (oldb == current_block) {
  85     blk_adjust++;
  86   }
  87   _cfg.unmap_node_from_block(old);
  88   OptoReg::Name old_reg = lrgs(_lrg_map.live_range_id(old)).reg();
  89   if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
  90     value->map(old_reg,NULL);  // Yank from value/regnd maps
  91     regnd->map(old_reg,NULL);  // This register's value is now unknown
  92   }
  93   return blk_adjust;
  94 }
  95 
  96 #ifdef ASSERT
  97 static bool expected_yanked_node(Node *old, Node *orig_old) {
  98   // This code is expected only next original nodes:
  99   // - load from constant table node which may have next data input nodes:
 100   //     MachConstantBase, MachTemp, MachSpillCopy
 101   // - Phi nodes that are considered Junk
 102   // - load constant node which may have next data input nodes:
 103   //     MachTemp, MachSpillCopy
 104   // - MachSpillCopy
 105   // - MachProj and Copy dead nodes
 106   if (old->is_MachSpillCopy()) {
 107     return true;
 108   } else if (old->is_Con()) {
 109     return true;
 110   } else if (old->is_MachProj()) { // Dead kills projection of Con node
 111     return (old == orig_old);
 112   } else if (old->is_Copy()) {     // Dead copy of a callee-save value
 113     return (old == orig_old);
 114   } else if (old->is_MachTemp()) {
 115     return orig_old->is_Con();
 116   } else if (old->is_Phi()) { // Junk phi's
 117     return true;
 118   } else if (old->is_MachConstantBase()) {
 119     return (orig_old->is_Con() && orig_old->is_MachConstant());
 120   }
 121   return false;
 122 }
 123 #endif
 124 
 125 //------------------------------yank_if_dead-----------------------------------
 126 // Removed edges from 'old'.  Yank if dead.  Return adjustment counts to
 127 // iterators in the current block.
 128 int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
 129                                        Node_List *value, Node_List *regnd) {
 130   int blk_adjust=0;
 131   if (old->outcnt() == 0 && old != C->top()) {
 132 #ifdef ASSERT
 133     if (!expected_yanked_node(old, orig_old)) {
 134       tty->print_cr("==============================================");
 135       tty->print_cr("orig_old:");
 136       orig_old->dump();
 137       tty->print_cr("old:");
 138       old->dump();
 139       assert(false, "unexpected yanked node");
 140     }
 141     if (old->is_Con())
 142       orig_old = old; // Reset to satisfy expected nodes checks.
 143 #endif
 144     blk_adjust += yank(old, current_block, value, regnd);
 145 
 146     for (uint i = 1; i < old->req(); i++) {
 147       Node* n = old->in(i);
 148       if (n != NULL) {
 149         old->set_req(i, NULL);
 150         blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd);
 151       }
 152     }
 153     // Disconnect control and remove precedence edges if any exist
 154     old->disconnect_inputs(NULL, C);
 155   }
 156   return blk_adjust;
 157 }
 158 
 159 //------------------------------use_prior_register-----------------------------
 160 // Use the prior value instead of the current value, in an effort to make
 161 // the current value go dead.  Return block iterator adjustment, in case
 162 // we yank some instructions from this block.
 163 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List &regnd ) {
 164   // No effect?
 165   if( def == n->in(idx) ) return 0;
 166   // Def is currently dead and can be removed?  Do not resurrect
 167   if( def->outcnt() == 0 ) return 0;
 168 
 169   // Not every pair of physical registers are assignment compatible,
 170   // e.g. on sparc floating point registers are not assignable to integer
 171   // registers.
 172   const LRG &def_lrg = lrgs(_lrg_map.live_range_id(def));
 173   OptoReg::Name def_reg = def_lrg.reg();
 174   const RegMask &use_mask = n->in_RegMask(idx);
 175   bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
 176                                                    : (use_mask.is_AllStack() != 0));
 177   if (!RegMask::is_vector(def->ideal_reg())) {
 178     // Check for a copy to or from a misaligned pair.
 179     // It is workaround for a sparc with misaligned pairs.
 180     can_use = can_use && !use_mask.is_misaligned_pair() && !def_lrg.mask().is_misaligned_pair();
 181   }
 182   if (!can_use)
 183     return 0;
 184 
 185   // Capture the old def in case it goes dead...
 186   Node *old = n->in(idx);
 187 
 188   // Save-on-call copies can only be elided if the entire copy chain can go
 189   // away, lest we get the same callee-save value alive in 2 locations at
 190   // once.  We check for the obvious trivial case here.  Although it can
 191   // sometimes be elided with cooperation outside our scope, here we will just
 192   // miss the opportunity.  :-(
 193   if( may_be_copy_of_callee(def) ) {
 194     if( old->outcnt() > 1 ) return 0; // We're the not last user
 195     int idx = old->is_Copy();
 196     assert( idx, "chain of copies being removed" );
 197     Node *old2 = old->in(idx);  // Chain of copies
 198     if( old2->outcnt() > 1 ) return 0; // old is not the last user
 199     int idx2 = old2->is_Copy();
 200     if( !idx2 ) return 0;       // Not a chain of 2 copies
 201     if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
 202   }
 203 
 204   // Use the new def
 205   n->set_req(idx,def);
 206   _post_alloc++;
 207 
 208   // Is old def now dead?  We successfully yanked a copy?
 209   return yank_if_dead(old,current_block,&value,&regnd);
 210 }
 211 
 212 
 213 //------------------------------skip_copies------------------------------------
 214 // Skip through any number of copies (that don't mod oop-i-ness)
 215 Node *PhaseChaitin::skip_copies( Node *c ) {
 216   int idx = c->is_Copy();
 217   uint is_oop = lrgs(_lrg_map.live_range_id(c))._is_oop;
 218   while (idx != 0) {
 219     guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
 220     if (lrgs(_lrg_map.live_range_id(c->in(idx)))._is_oop != is_oop) {
 221       break;  // casting copy, not the same value
 222     }
 223     c = c->in(idx);
 224     idx = c->is_Copy();
 225   }
 226   return c;
 227 }
 228 
 229 //------------------------------elide_copy-------------------------------------
 230 // Remove (bypass) copies along Node n, edge k.
 231 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List &regnd, bool can_change_regs ) {
 232   int blk_adjust = 0;
 233 
 234   uint nk_idx = _lrg_map.live_range_id(n->in(k));
 235   OptoReg::Name nk_reg = lrgs(nk_idx).reg();
 236 
 237   // Remove obvious same-register copies
 238   Node *x = n->in(k);
 239   int idx;
 240   while( (idx=x->is_Copy()) != 0 ) {
 241     Node *copy = x->in(idx);
 242     guarantee(copy != NULL, "must not resurrect dead copy");
 243     if(lrgs(_lrg_map.live_range_id(copy)).reg() != nk_reg) {
 244       break;
 245     }
 246     blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
 247     if (n->in(k) != copy) {
 248       break; // Failed for some cutout?
 249     }
 250     x = copy;                   // Progress, try again
 251   }
 252 
 253   // Phis and 2-address instructions cannot change registers so easily - their
 254   // outputs must match their input.
 255   if( !can_change_regs )
 256     return blk_adjust;          // Only check stupid copies!
 257 
 258   // Loop backedges won't have a value-mapping yet
 259   if( &value == NULL ) return blk_adjust;
 260 
 261   // Skip through all copies to the _value_ being used.  Do not change from
 262   // int to pointer.  This attempts to jump through a chain of copies, where
 263   // intermediate copies might be illegal, i.e., value is stored down to stack
 264   // then reloaded BUT survives in a register the whole way.
 265   Node *val = skip_copies(n->in(k));
 266   if (val == x) return blk_adjust; // No progress?
 267 
 268   int n_regs = RegMask::num_registers(val->ideal_reg());
 269   uint val_idx = _lrg_map.live_range_id(val);
 270   OptoReg::Name val_reg = lrgs(val_idx).reg();
 271 
 272   // See if it happens to already be in the correct register!
 273   // (either Phi's direct register, or the common case of the name
 274   // never-clobbered original-def register)
 275   if (register_contains_value(val, val_reg, n_regs, value)) {
 276     blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
 277     if( n->in(k) == regnd[val_reg] ) // Success!  Quit trying
 278       return blk_adjust;
 279   }
 280 
 281   // See if we can skip the copy by changing registers.  Don't change from
 282   // using a register to using the stack unless we know we can remove a
 283   // copy-load.  Otherwise we might end up making a pile of Intel cisc-spill
 284   // ops reading from memory instead of just loading once and using the
 285   // register.
 286 
 287   // Also handle duplicate copies here.
 288   const Type *t = val->is_Con() ? val->bottom_type() : NULL;
 289 
 290   // Scan all registers to see if this value is around already
 291   for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
 292     if (reg == (uint)nk_reg) {
 293       // Found ourselves so check if there is only one user of this
 294       // copy and keep on searching for a better copy if so.
 295       bool ignore_self = true;
 296       x = n->in(k);
 297       DUIterator_Fast imax, i = x->fast_outs(imax);
 298       Node* first = x->fast_out(i); i++;
 299       while (i < imax && ignore_self) {
 300         Node* use = x->fast_out(i); i++;
 301         if (use != first) ignore_self = false;
 302       }
 303       if (ignore_self) continue;
 304     }
 305 
 306     Node *vv = value[reg];
 307     if (n_regs > 1) { // Doubles and vectors check for aligned-adjacent set
 308       uint last = (n_regs-1); // Looking for the last part of a set
 309       if ((reg&last) != last) continue; // Wrong part of a set
 310       if (!register_contains_value(vv, reg, n_regs, value)) continue; // Different value
 311     }
 312     if( vv == val ||            // Got a direct hit?
 313         (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
 314          vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
 315       assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
 316       if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
 317           OptoReg::is_reg(reg) || // turning into a register use OR
 318           regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
 319         blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
 320         if( n->in(k) == regnd[reg] ) // Success!  Quit trying
 321           return blk_adjust;
 322       } // End of if not degrading to a stack
 323     } // End of if found value in another register
 324   } // End of scan all machine registers
 325   return blk_adjust;
 326 }
 327 
 328 
 329 //
 330 // Check if nreg already contains the constant value val.  Normal copy
 331 // elimination doesn't doesn't work on constants because multiple
 332 // nodes can represent the same constant so the type and rule of the
 333 // MachNode must be checked to ensure equivalence.
 334 //
 335 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
 336                                               Block *current_block,
 337                                               Node_List& value, Node_List& regnd,
 338                                               OptoReg::Name nreg, OptoReg::Name nreg2) {
 339   if (value[nreg] != val && val->is_Con() &&
 340       value[nreg] != NULL && value[nreg]->is_Con() &&
 341       (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
 342       value[nreg]->bottom_type() == val->bottom_type() &&
 343       value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
 344     // This code assumes that two MachNodes representing constants
 345     // which have the same rule and the same bottom type will produce
 346     // identical effects into a register.  This seems like it must be
 347     // objectively true unless there are hidden inputs to the nodes
 348     // but if that were to change this code would need to updated.
 349     // Since they are equivalent the second one if redundant and can
 350     // be removed.
 351     //
 352     // n will be replaced with the old value but n might have
 353     // kills projections associated with it so remove them now so that
 354     // yank_if_dead will be able to eliminate the copy once the uses
 355     // have been transferred to the old[value].
 356     for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
 357       Node* use = n->fast_out(i);
 358       if (use->is_Proj() && use->outcnt() == 0) {
 359         // Kill projections have no users and one input
 360         use->set_req(0, C->top());
 361         yank_if_dead(use, current_block, &value, &regnd);
 362         --i; --imax;
 363       }
 364     }
 365     _post_alloc++;
 366     return true;
 367   }
 368   return false;
 369 }
 370 
 371 // The algorithms works as follows:
 372 // We traverse the block top to bottom. possibly_merge_multidef() is invoked for every input edge k
 373 // of the instruction n. We check to see if the input is a multidef lrg. If it is, we record the fact that we've
 374 // seen a definition (coming as an input) and add that fact to the reg2defuse array. The array maps registers to their
 375 // current reaching definitions (we track only multidefs though). With each definition we also associate the first
 376 // instruction we saw use it. If we encounter the situation when we observe an def (an input) that is a part of the
 377 // same lrg but is different from the previous seen def we merge the two with a MachMerge node and substitute
 378 // all the uses that we've seen so far to use the merge. After that we keep replacing the new defs in the same lrg
 379 // as they get encountered with the merge node and keep adding these defs to the merge inputs.
 380 void PhaseChaitin::merge_multidefs() {
 381   Compile::TracePhase tp("mergeMultidefs", &timers[_t_mergeMultidefs]);
 382   ResourceMark rm;
 383   // Keep track of the defs seen in registers and collect their uses in the block.
 384   RegToDefUseMap reg2defuse(_max_reg, _max_reg, RegDefUse());
 385   for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
 386     Block* block = _cfg.get_block(i);
 387     for (uint j = 1; j < block->number_of_nodes(); j++) {
 388       Node* n = block->get_node(j);
 389       if (n->is_Phi()) continue;
 390       for (uint k = 1; k < n->req(); k++) {
 391         j += possibly_merge_multidef(n, k, block, reg2defuse);
 392       }
 393       // Null out the value produced by the instruction itself, since we're only interested in defs
 394       // implicitly defined by the uses. We are actually interested in tracking only redefinitions
 395       // of the multidef lrgs in the same register. For that matter it's enough to track changes in
 396       // the base register only and ignore other effects of multi-register lrgs and fat projections.
 397       // It is also ok to ignore defs coming from singledefs. After an implicit overwrite by one of
 398       // those our register is guaranteed to be used by another lrg and we won't attempt to merge it.
 399       uint lrg = _lrg_map.live_range_id(n);
 400       if (lrg > 0 && lrgs(lrg).is_multidef()) {
 401         OptoReg::Name reg = lrgs(lrg).reg();
 402         reg2defuse.at(reg).clear();
 403       }
 404     }
 405     // Clear reg->def->use tracking for the next block
 406     for (int j = 0; j < reg2defuse.length(); j++) {
 407       reg2defuse.at(j).clear();
 408     }
 409   }
 410 }
 411 
 412 int PhaseChaitin::possibly_merge_multidef(Node *n, uint k, Block *block, RegToDefUseMap& reg2defuse) {
 413   int blk_adjust = 0;
 414 
 415   uint lrg = _lrg_map.live_range_id(n->in(k));
 416   if (lrg > 0 && lrgs(lrg).is_multidef()) {
 417     OptoReg::Name reg = lrgs(lrg).reg();
 418 
 419     Node* def = reg2defuse.at(reg).def();
 420     if (def != NULL && lrg == _lrg_map.live_range_id(def) && def != n->in(k)) {
 421       // Same lrg but different node, we have to merge.
 422       MachMergeNode* merge;
 423       if (def->is_MachMerge()) { // is it already a merge?
 424         merge = def->as_MachMerge();
 425       } else {
 426         merge = new MachMergeNode(def);
 427 
 428         // Insert the merge node into the block before the first use.
 429         uint use_index = block->find_node(reg2defuse.at(reg).first_use());
 430         block->insert_node(merge, use_index++);
 431 
 432         // Let the allocator know about the new node, use the same lrg
 433         _lrg_map.extend(merge->_idx, lrg);
 434         blk_adjust++;
 435 
 436         // Fixup all the uses (there is at least one) that happened between the first
 437         // use and before the current one.
 438         for (; use_index < block->number_of_nodes(); use_index++) {
 439           Node* use = block->get_node(use_index);
 440           if (use == n) {
 441             break;
 442           }
 443           use->replace_edge(def, merge);
 444         }
 445       }
 446       if (merge->find_edge(n->in(k)) == -1) {
 447         merge->add_req(n->in(k));
 448       }
 449       n->set_req(k, merge);
 450     }
 451 
 452     // update the uses
 453     reg2defuse.at(reg).update(n->in(k), n);
 454   }
 455 
 456   return blk_adjust;
 457 }
 458 
 459 
 460 //------------------------------post_allocate_copy_removal---------------------
 461 // Post-Allocation peephole copy removal.  We do this in 1 pass over the
 462 // basic blocks.  We maintain a mapping of registers to Nodes (an  array of
 463 // Nodes indexed by machine register or stack slot number).  NULL means that a
 464 // register is not mapped to any Node.  We can (want to have!) have several
 465 // registers map to the same Node.  We walk forward over the instructions
 466 // updating the mapping as we go.  At merge points we force a NULL if we have
 467 // to merge 2 different Nodes into the same register.  Phi functions will give
 468 // us a new Node if there is a proper value merging.  Since the blocks are
 469 // arranged in some RPO, we will visit all parent blocks before visiting any
 470 // successor blocks (except at loops).
 471 //
 472 // If we find a Copy we look to see if the Copy's source register is a stack
 473 // slot and that value has already been loaded into some machine register; if
 474 // so we use machine register directly.  This turns a Load into a reg-reg
 475 // Move.  We also look for reloads of identical constants.
 476 //
 477 // When we see a use from a reg-reg Copy, we will attempt to use the copy's
 478 // source directly and make the copy go dead.
 479 void PhaseChaitin::post_allocate_copy_removal() {
 480   Compile::TracePhase tp("postAllocCopyRemoval", &timers[_t_postAllocCopyRemoval]);
 481   ResourceMark rm;
 482 
 483   // Need a mapping from basic block Node_Lists.  We need a Node_List to
 484   // map from register number to value-producing Node.
 485   Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1);
 486   memset(blk2value, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1));
 487   // Need a mapping from basic block Node_Lists.  We need a Node_List to
 488   // map from register number to register-defining Node.
 489   Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1);
 490   memset(blk2regnd, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1));
 491 
 492   // We keep unused Node_Lists on a free_list to avoid wasting
 493   // memory.
 494   GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
 495 
 496   // For all blocks
 497   for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
 498     uint j;
 499     Block* block = _cfg.get_block(i);
 500 
 501     // Count of Phis in block
 502     uint phi_dex;
 503     for (phi_dex = 1; phi_dex < block->number_of_nodes(); phi_dex++) {
 504       Node* phi = block->get_node(phi_dex);
 505       if (!phi->is_Phi()) {
 506         break;
 507       }
 508     }
 509 
 510     // If any predecessor has not been visited, we do not know the state
 511     // of registers at the start.  Check for this, while updating copies
 512     // along Phi input edges
 513     bool missing_some_inputs = false;
 514     Block *freed = NULL;
 515     for (j = 1; j < block->num_preds(); j++) {
 516       Block* pb = _cfg.get_block_for_node(block->pred(j));
 517       // Remove copies along phi edges
 518       for (uint k = 1; k < phi_dex; k++) {
 519         elide_copy(block->get_node(k), j, block, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false);
 520       }
 521       if (blk2value[pb->_pre_order]) { // Have a mapping on this edge?
 522         // See if this predecessor's mappings have been used by everybody
 523         // who wants them.  If so, free 'em.
 524         uint k;
 525         for (k = 0; k < pb->_num_succs; k++) {
 526           Block* pbsucc = pb->_succs[k];
 527           if (!blk2value[pbsucc->_pre_order] && pbsucc != block) {
 528             break;              // Found a future user
 529           }
 530         }
 531         if (k >= pb->_num_succs) { // No more uses, free!
 532           freed = pb;           // Record last block freed
 533           free_list.push(blk2value[pb->_pre_order]);
 534           free_list.push(blk2regnd[pb->_pre_order]);
 535         }
 536       } else {                  // This block has unvisited (loopback) inputs
 537         missing_some_inputs = true;
 538       }
 539     }
 540 
 541 
 542     // Extract Node_List mappings.  If 'freed' is non-zero, we just popped
 543     // 'freed's blocks off the list
 544     Node_List &regnd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
 545     Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
 546     assert( !freed || blk2value[freed->_pre_order] == &value, "" );
 547     value.map(_max_reg,NULL);
 548     regnd.map(_max_reg,NULL);
 549     // Set mappings as OUR mappings
 550     blk2value[block->_pre_order] = &value;
 551     blk2regnd[block->_pre_order] = &regnd;
 552 
 553     // Initialize value & regnd for this block
 554     if (missing_some_inputs) {
 555       // Some predecessor has not yet been visited; zap map to empty
 556       for (uint k = 0; k < (uint)_max_reg; k++) {
 557         value.map(k,NULL);
 558         regnd.map(k,NULL);
 559       }
 560     } else {
 561       if( !freed ) {            // Didn't get a freebie prior block
 562         // Must clone some data
 563         freed = _cfg.get_block_for_node(block->pred(1));
 564         Node_List &f_value = *blk2value[freed->_pre_order];
 565         Node_List &f_regnd = *blk2regnd[freed->_pre_order];
 566         for( uint k = 0; k < (uint)_max_reg; k++ ) {
 567           value.map(k,f_value[k]);
 568           regnd.map(k,f_regnd[k]);
 569         }
 570       }
 571       // Merge all inputs together, setting to NULL any conflicts.
 572       for (j = 1; j < block->num_preds(); j++) {
 573         Block* pb = _cfg.get_block_for_node(block->pred(j));
 574         if (pb == freed) {
 575           continue; // Did self already via freelist
 576         }
 577         Node_List &p_regnd = *blk2regnd[pb->_pre_order];
 578         for( uint k = 0; k < (uint)_max_reg; k++ ) {
 579           if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
 580             value.map(k,NULL); // Then no value handy
 581             regnd.map(k,NULL);
 582           }
 583         }
 584       }
 585     }
 586 
 587     // For all Phi's
 588     for (j = 1; j < phi_dex; j++) {
 589       uint k;
 590       Node *phi = block->get_node(j);
 591       uint pidx = _lrg_map.live_range_id(phi);
 592       OptoReg::Name preg = lrgs(_lrg_map.live_range_id(phi)).reg();
 593 
 594       // Remove copies remaining on edges.  Check for junk phi.
 595       Node *u = NULL;
 596       for (k = 1; k < phi->req(); k++) {
 597         Node *x = phi->in(k);
 598         if( phi != x && u != x ) // Found a different input
 599           u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
 600       }
 601       if (u != NodeSentinel) {    // Junk Phi.  Remove
 602         phi->replace_by(u);
 603         j -= yank_if_dead(phi, block, &value, &regnd);
 604         phi_dex--;
 605         continue;
 606       }
 607       // Note that if value[pidx] exists, then we merged no new values here
 608       // and the phi is useless.  This can happen even with the above phi
 609       // removal for complex flows.  I cannot keep the better known value here
 610       // because locally the phi appears to define a new merged value.  If I
 611       // keep the better value then a copy of the phi, being unable to use the
 612       // global flow analysis, can't "peek through" the phi to the original
 613       // reaching value and so will act like it's defining a new value.  This
 614       // can lead to situations where some uses are from the old and some from
 615       // the new values.  Not illegal by itself but throws the over-strong
 616       // assert in scheduling.
 617       if( pidx ) {
 618         value.map(preg,phi);
 619         regnd.map(preg,phi);
 620         int n_regs = RegMask::num_registers(phi->ideal_reg());
 621         for (int l = 1; l < n_regs; l++) {
 622           OptoReg::Name preg_lo = OptoReg::add(preg,-l);
 623           value.map(preg_lo,phi);
 624           regnd.map(preg_lo,phi);
 625         }
 626       }
 627     }
 628 
 629     // For all remaining instructions
 630     for (j = phi_dex; j < block->number_of_nodes(); j++) {
 631       Node* n = block->get_node(j);
 632 
 633       if(n->outcnt() == 0 &&   // Dead?
 634          n != C->top() &&      // (ignore TOP, it has no du info)
 635          !n->is_Proj() ) {     // fat-proj kills
 636         j -= yank_if_dead(n, block, &value, &regnd);
 637         continue;
 638       }
 639 
 640       // Improve reaching-def info.  Occasionally post-alloc's liveness gives
 641       // up (at loop backedges, because we aren't doing a full flow pass).
 642       // The presence of a live use essentially asserts that the use's def is
 643       // alive and well at the use (or else the allocator fubar'd).  Take
 644       // advantage of this info to set a reaching def for the use-reg.
 645       uint k;
 646       for (k = 1; k < n->req(); k++) {
 647         Node *def = n->in(k);   // n->in(k) is a USE; def is the DEF for this USE
 648         guarantee(def != NULL, "no disconnected nodes at this point");
 649         uint useidx = _lrg_map.live_range_id(def); // useidx is the live range index for this USE
 650 
 651         if( useidx ) {
 652           OptoReg::Name ureg = lrgs(useidx).reg();
 653           if( !value[ureg] ) {
 654             int idx;            // Skip occasional useless copy
 655             while( (idx=def->is_Copy()) != 0 &&
 656                    def->in(idx) != NULL &&  // NULL should not happen
 657                    ureg == lrgs(_lrg_map.live_range_id(def->in(idx))).reg())
 658               def = def->in(idx);
 659             Node *valdef = skip_copies(def); // tighten up val through non-useless copies
 660             value.map(ureg,valdef); // record improved reaching-def info
 661             regnd.map(ureg,   def);
 662             // Record other half of doubles
 663             uint def_ideal_reg = def->ideal_reg();
 664             int n_regs = RegMask::num_registers(def_ideal_reg);
 665             for (int l = 1; l < n_regs; l++) {
 666               OptoReg::Name ureg_lo = OptoReg::add(ureg,-l);
 667               if (!value[ureg_lo] &&
 668                   (!RegMask::can_represent(ureg_lo) ||
 669                    lrgs(useidx).mask().Member(ureg_lo))) { // Nearly always adjacent
 670                 value.map(ureg_lo,valdef); // record improved reaching-def info
 671                 regnd.map(ureg_lo,   def);
 672               }
 673             }
 674           }
 675         }
 676       }
 677 
 678       const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
 679 
 680       // Remove copies along input edges
 681       for (k = 1; k < n->req(); k++) {
 682         j -= elide_copy(n, k, block, value, regnd, two_adr != k);
 683       }
 684 
 685       // Unallocated Nodes define no registers
 686       uint lidx = _lrg_map.live_range_id(n);
 687       if (!lidx) {
 688         continue;
 689       }
 690 
 691       // Update the register defined by this instruction
 692       OptoReg::Name nreg = lrgs(lidx).reg();
 693       // Skip through all copies to the _value_ being defined.
 694       // Do not change from int to pointer
 695       Node *val = skip_copies(n);
 696 
 697       // Clear out a dead definition before starting so that the
 698       // elimination code doesn't have to guard against it.  The
 699       // definition could in fact be a kill projection with a count of
 700       // 0 which is safe but since those are uninteresting for copy
 701       // elimination just delete them as well.
 702       if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) {
 703         regnd.map(nreg, NULL);
 704         value.map(nreg, NULL);
 705       }
 706 
 707       uint n_ideal_reg = n->ideal_reg();
 708       int n_regs = RegMask::num_registers(n_ideal_reg);
 709       if (n_regs == 1) {
 710         // If Node 'n' does not change the value mapped by the register,
 711         // then 'n' is a useless copy.  Do not update the register->node
 712         // mapping so 'n' will go dead.
 713         if( value[nreg] != val ) {
 714           if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, OptoReg::Bad)) {
 715             j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
 716           } else {
 717             // Update the mapping: record new Node defined by the register
 718             regnd.map(nreg,n);
 719             // Update mapping for defined *value*, which is the defined
 720             // Node after skipping all copies.
 721             value.map(nreg,val);
 722           }
 723         } else if( !may_be_copy_of_callee(n) ) {
 724           assert(n->is_Copy(), "");
 725           j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
 726         }
 727       } else if (RegMask::is_vector(n_ideal_reg)) {
 728         // If Node 'n' does not change the value mapped by the register,
 729         // then 'n' is a useless copy.  Do not update the register->node
 730         // mapping so 'n' will go dead.
 731         if (!register_contains_value(val, nreg, n_regs, value)) {
 732           // Update the mapping: record new Node defined by the register
 733           regnd.map(nreg,n);
 734           // Update mapping for defined *value*, which is the defined
 735           // Node after skipping all copies.
 736           value.map(nreg,val);
 737           for (int l = 1; l < n_regs; l++) {
 738             OptoReg::Name nreg_lo = OptoReg::add(nreg,-l);
 739             regnd.map(nreg_lo, n );
 740             value.map(nreg_lo,val);
 741           }
 742         } else if (n->is_Copy()) {
 743           // Note: vector can't be constant and can't be copy of calee.
 744           j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
 745         }
 746       } else {
 747         // If the value occupies a register pair, record same info
 748         // in both registers.
 749         OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
 750         if( RegMask::can_represent(nreg_lo) &&     // Either a spill slot, or
 751             !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
 752           // Sparc occasionally has non-adjacent pairs.
 753           // Find the actual other value
 754           RegMask tmp = lrgs(lidx).mask();
 755           tmp.Remove(nreg);
 756           nreg_lo = tmp.find_first_elem();
 757         }
 758         if (value[nreg] != val || value[nreg_lo] != val) {
 759           if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, nreg_lo)) {
 760             j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
 761           } else {
 762             regnd.map(nreg   , n );
 763             regnd.map(nreg_lo, n );
 764             value.map(nreg   ,val);
 765             value.map(nreg_lo,val);
 766           }
 767         } else if (!may_be_copy_of_callee(n)) {
 768           assert(n->is_Copy(), "");
 769           j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
 770         }
 771       }
 772 
 773       // Fat projections kill many registers
 774       if( n_ideal_reg == MachProjNode::fat_proj ) {
 775         RegMask rm = n->out_RegMask();
 776         // wow, what an expensive iterator...
 777         nreg = rm.find_first_elem();
 778         while( OptoReg::is_valid(nreg)) {
 779           rm.Remove(nreg);
 780           value.map(nreg,n);
 781           regnd.map(nreg,n);
 782           nreg = rm.find_first_elem();
 783         }
 784       }
 785 
 786     } // End of for all instructions in the block
 787 
 788   } // End for all blocks
 789 }