src/cpu/sparc/vm/vm_version_sparc.hpp
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src/cpu/sparc/vm/vm_version_sparc.hpp

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 104   static void print_features();
 105   static int  determine_features();
 106   static int  platform_features(int features);
 107 
 108   // Returns true if the platform is in the niagara line (T series)
 109   static bool is_M_family(int features) { return (features & M_family_m) != 0; }
 110   static bool is_T_family(int features) { return (features & T_family_m) != 0; }
 111   static bool is_niagara() { return is_T_family(_features); }
 112 #ifdef ASSERT
 113   static bool is_niagara(int features)  {
 114     // 'sun4v_m' may be defined on both Sun/Oracle Sparc CPUs as well as
 115     // on Fujitsu Sparc64 CPUs, but only Sun/Oracle Sparcs can be 'niagaras'.
 116     return (features & sun4v_m) != 0 && (features & sparc64_family_m) == 0;
 117   }
 118 #endif
 119 
 120   // Returns true if it is niagara1 (T1).
 121   static bool is_T1_model(int features) { return is_T_family(features) && ((features & T1_model_m) != 0); }
 122 
 123   static int maximum_niagara1_processor_count() { return 32; }
 124 
 125 public:
 126   // Initialization
 127   static void initialize();
 128 
 129   static void init_before_ergo()        { _features = determine_features(); }
 130 
 131   // Instruction support
 132   static bool has_v8()                  { return (_features & v8_instructions_m) != 0; }
 133   static bool has_v9()                  { return (_features & v9_instructions_m) != 0; }
 134   static bool has_hardware_mul32()      { return (_features & hardware_mul32_m) != 0; }
 135   static bool has_hardware_div32()      { return (_features & hardware_div32_m) != 0; }
 136   static bool has_hardware_fsmuld()     { return (_features & hardware_fsmuld_m) != 0; }
 137   static bool has_hardware_popc()       { return (_features & hardware_popc_m) != 0; }
 138   static bool has_vis1()                { return (_features & vis1_instructions_m) != 0; }
 139   static bool has_vis2()                { return (_features & vis2_instructions_m) != 0; }
 140   static bool has_vis3()                { return (_features & vis3_instructions_m) != 0; }
 141   static bool has_blk_init()            { return (_features & blk_init_instructions_m) != 0; }
 142   static bool has_cbcond()              { return (_features & cbcond_instructions_m) != 0; }
 143   static bool has_sparc5_instr()        { return (_features & sparc5_instructions_m) != 0; }
 144   static bool has_aes()                 { return (_features & aes_instructions_m) != 0; }




 104   static void print_features();
 105   static int  determine_features();
 106   static int  platform_features(int features);
 107 
 108   // Returns true if the platform is in the niagara line (T series)
 109   static bool is_M_family(int features) { return (features & M_family_m) != 0; }
 110   static bool is_T_family(int features) { return (features & T_family_m) != 0; }
 111   static bool is_niagara() { return is_T_family(_features); }
 112 #ifdef ASSERT
 113   static bool is_niagara(int features)  {
 114     // 'sun4v_m' may be defined on both Sun/Oracle Sparc CPUs as well as
 115     // on Fujitsu Sparc64 CPUs, but only Sun/Oracle Sparcs can be 'niagaras'.
 116     return (features & sun4v_m) != 0 && (features & sparc64_family_m) == 0;
 117   }
 118 #endif
 119 
 120   // Returns true if it is niagara1 (T1).
 121   static bool is_T1_model(int features) { return is_T_family(features) && ((features & T1_model_m) != 0); }
 122 
 123   static int maximum_niagara1_processor_count() { return 32; }
 124   static int parse_features(const char* implementation);
 125 public:
 126   // Initialization
 127   static void initialize();
 128 
 129   static void init_before_ergo()        { _features = determine_features(); }
 130 
 131   // Instruction support
 132   static bool has_v8()                  { return (_features & v8_instructions_m) != 0; }
 133   static bool has_v9()                  { return (_features & v9_instructions_m) != 0; }
 134   static bool has_hardware_mul32()      { return (_features & hardware_mul32_m) != 0; }
 135   static bool has_hardware_div32()      { return (_features & hardware_div32_m) != 0; }
 136   static bool has_hardware_fsmuld()     { return (_features & hardware_fsmuld_m) != 0; }
 137   static bool has_hardware_popc()       { return (_features & hardware_popc_m) != 0; }
 138   static bool has_vis1()                { return (_features & vis1_instructions_m) != 0; }
 139   static bool has_vis2()                { return (_features & vis2_instructions_m) != 0; }
 140   static bool has_vis3()                { return (_features & vis3_instructions_m) != 0; }
 141   static bool has_blk_init()            { return (_features & blk_init_instructions_m) != 0; }
 142   static bool has_cbcond()              { return (_features & cbcond_instructions_m) != 0; }
 143   static bool has_sparc5_instr()        { return (_features & sparc5_instructions_m) != 0; }
 144   static bool has_aes()                 { return (_features & aes_instructions_m) != 0; }


src/cpu/sparc/vm/vm_version_sparc.hpp
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